DE69926215D1 - Verfahren und Schaltung zur Minimierung von Störsignalen in Phasenregelkreisen - Google Patents

Verfahren und Schaltung zur Minimierung von Störsignalen in Phasenregelkreisen

Info

Publication number
DE69926215D1
DE69926215D1 DE69926215T DE69926215T DE69926215D1 DE 69926215 D1 DE69926215 D1 DE 69926215D1 DE 69926215 T DE69926215 T DE 69926215T DE 69926215 T DE69926215 T DE 69926215T DE 69926215 D1 DE69926215 D1 DE 69926215D1
Authority
DE
Germany
Prior art keywords
circuit
phase locked
locked loops
minimizing interference
minimizing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69926215T
Other languages
English (en)
Inventor
Antonio Magazzu
Benedetto Marco Marletta
Giuseppe Gramegna
Aquila Alessandro D
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE69926215D1 publication Critical patent/DE69926215D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
DE69926215T 1999-04-21 1999-04-21 Verfahren und Schaltung zur Minimierung von Störsignalen in Phasenregelkreisen Expired - Lifetime DE69926215D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP99830234A EP1047196B1 (de) 1999-04-21 1999-04-21 Verfahren und Schaltung zur Minimierung von Störsignalen in Phasenregelkreisen

Publications (1)

Publication Number Publication Date
DE69926215D1 true DE69926215D1 (de) 2005-08-25

Family

ID=8243367

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69926215T Expired - Lifetime DE69926215D1 (de) 1999-04-21 1999-04-21 Verfahren und Schaltung zur Minimierung von Störsignalen in Phasenregelkreisen

Country Status (3)

Country Link
US (2) US6593817B1 (de)
EP (1) EP1047196B1 (de)
DE (1) DE69926215D1 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4138264B2 (ja) 2001-03-16 2008-08-27 富士通株式会社 Ｐｌｌ周波数シンセサイザ
DE10210057A1 (de) * 2002-03-08 2003-09-18 Michael Pierschel Phasenregelkreis für die Frequenzsynthese
EP1512225B1 (de) * 2002-05-28 2006-05-31 Koninklijke Philips Electronics N.V. Pll-schaltung
US7103337B2 (en) 2002-05-31 2006-09-05 Hitachi, Ltd. PLL circuit having a multi-band oscillator and compensating oscillation frequency
GB2420922B (en) * 2002-05-31 2006-08-02 Renesas Tech Corp Semiconductor integrated circuit device for communication
GB2389254B (en) 2002-05-31 2005-09-07 Hitachi Ltd Semiconductor integrated circuit device for communication
KR100499276B1 (ko) * 2002-11-06 2005-07-01 학교법인 포항공과대학교 빠른 락시간을 가지는 디글리치 회로를 사용한 적응대역폭 위상 고정 루프
EP1458099B1 (de) * 2003-03-14 2005-12-21 STMicroelectronics S.r.l. Phasenregelschleife mit Aufbereitung des Steuerstroms durch einen schaltbaren Kondensator
FR2864732B1 (fr) * 2003-12-24 2006-08-11 Eads Telecom Boucle a asservissement de phase
US6958636B2 (en) * 2004-01-16 2005-10-25 International Business Machines Corporation Charge leakage correction circuit for applications in PLLs
JP2005328599A (ja) 2004-05-12 2005-11-24 Koninkl Philips Electronics Nv チャージポンプ回路及びこれを備えた電子回路並びにチャージポンプ回路の駆動方法
US7268600B2 (en) * 2005-11-30 2007-09-11 International Business Machines Corporation Phase- or frequency-locked loop circuit having a glitch detector for detecting triggering-edge-type glitches in a noisy signal
US7288976B2 (en) * 2006-03-31 2007-10-30 Realtek Semiconductor Corp. Charge pump circuit and method thereof
US7764759B2 (en) * 2006-06-13 2010-07-27 Gennum Corporation Linear sample and hold phase detector for clocking circuits
US7639070B2 (en) * 2008-01-28 2009-12-29 Texas Instruments Incorporated Switching circuit in a phase locked loop (PLL) to minimize current leakage in integrated circuits
US8283986B2 (en) * 2009-01-14 2012-10-09 Broadcom Corporation Method and system for reduced clock feed-through in a phase locked loop
CN101888244B (zh) * 2010-07-16 2015-07-01 上海集成电路研发中心有限公司 低功耗锁相环电路
US8854095B2 (en) 2012-11-12 2014-10-07 Stmicroelectronics International N.V. Fast lock acquisition and detection circuit for phase-locked loops
US9350366B2 (en) 2013-10-18 2016-05-24 Raytheon Company Phase-locked loop filter with coarse and fine tuning
CN104767523B (zh) * 2015-04-09 2018-04-24 哈尔滨工业大学 电荷泵锁相环中的二阶开关低通滤波器及采用该二阶开关低通滤波器实现环路的锁定方法
TWI641229B (zh) * 2018-02-26 2018-11-11 國立交通大學 電荷泵電路及鎖相迴路系統
CN110593497A (zh) * 2019-08-30 2019-12-20 徐州泰和门窗有限公司 适用于窗户的自收方雨棚

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4651037A (en) * 1983-06-07 1987-03-17 Nec Corporation Precision analog switching circuit employing MOS transistors
US4988902A (en) * 1989-05-24 1991-01-29 Harris Corporation Semiconductor transmission gate with capacitance compensation
US5920233A (en) * 1996-11-18 1999-07-06 Peregrine Semiconductor Corp. Phase locked loop including a sampling circuit for reducing spurious side bands
US6107889A (en) * 1997-11-07 2000-08-22 Analog Devices, Inc. Phase locked loop charge pump circuit

Also Published As

Publication number Publication date
US20030071689A1 (en) 2003-04-17
EP1047196B1 (de) 2005-07-20
EP1047196A1 (de) 2000-10-25
US6593817B1 (en) 2003-07-15
US6774731B2 (en) 2004-08-10

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