DE69503859D1 - Verfahren und Schaltung zur Steuerung eines Phasenregelkreises - Google Patents

Verfahren und Schaltung zur Steuerung eines Phasenregelkreises

Info

Publication number
DE69503859D1
DE69503859D1 DE69503859T DE69503859T DE69503859D1 DE 69503859 D1 DE69503859 D1 DE 69503859D1 DE 69503859 T DE69503859 T DE 69503859T DE 69503859 T DE69503859 T DE 69503859T DE 69503859 D1 DE69503859 D1 DE 69503859D1
Authority
DE
Germany
Prior art keywords
controlling
circuit
locked loop
phase locked
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69503859T
Other languages
English (en)
Other versions
DE69503859T2 (de
Inventor
Dao-Long Chen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MagnaChip Semiconductor Ltd
Original Assignee
Symbios Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Symbios Inc filed Critical Symbios Inc
Publication of DE69503859D1 publication Critical patent/DE69503859D1/de
Application granted granted Critical
Publication of DE69503859T2 publication Critical patent/DE69503859T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L1/00Stabilisation of generator output against variations of physical values, e.g. power supply
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
DE69503859T 1994-09-23 1995-09-14 Verfahren und Schaltung zur Steuerung eines Phasenregelkreises Expired - Lifetime DE69503859T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/311,469 US5463352A (en) 1994-09-23 1994-09-23 Supply voltage tolerant phase-locked loop circuit

Publications (2)

Publication Number Publication Date
DE69503859D1 true DE69503859D1 (de) 1998-09-10
DE69503859T2 DE69503859T2 (de) 1999-04-29

Family

ID=23207012

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69503859T Expired - Lifetime DE69503859T2 (de) 1994-09-23 1995-09-14 Verfahren und Schaltung zur Steuerung eines Phasenregelkreises

Country Status (5)

Country Link
US (2) US5463352A (de)
EP (1) EP0704976B1 (de)
JP (1) JP3963282B2 (de)
KR (1) KR100389686B1 (de)
DE (1) DE69503859T2 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5812004A (en) * 1996-10-23 1998-09-22 Dallas Semiconductor Corporation Current compensated clock for a microcircuit
GB2319409B (en) * 1996-11-15 1999-01-27 Nokia Telecommunications Oy Apparatus and method for stabilising the frequency of a phase locked loop
JP2000315948A (ja) 1999-04-28 2000-11-14 Nec Corp Pll周波数シンセサイザ
US6281712B1 (en) * 2000-09-05 2001-08-28 Motorola, Inc. Phase detector with frequency steering
US7012487B2 (en) * 2001-04-18 2006-03-14 Broadcom Corporation Transconductance device employing native MOS transistors
US7042277B2 (en) * 2003-10-14 2006-05-09 International Business Machines Corporation Circuit and method for reducing jitter in a PLL of high speed serial links
JP4524566B2 (ja) * 2004-01-30 2010-08-18 セイコーエプソン株式会社 非同期プロセッサ、電気光学装置、及び電子機器
US7219246B2 (en) * 2004-05-26 2007-05-15 Microchip Technology Inc. Digital system having selectable clock speed based upon available supply voltage and PLL configuration register settings
KR100598011B1 (ko) * 2004-06-29 2006-07-06 삼성전자주식회사 클럭 사용 회로 및 클럭 신호 발생 방법
US7688150B2 (en) * 2006-11-29 2010-03-30 Intel Corporation PLL with controllable bias level
US7724078B2 (en) * 2007-03-22 2010-05-25 Intel Corporation Adjusting PLL/analog supply to track CPU core supply through a voltage regulator
JP2009010498A (ja) * 2007-06-26 2009-01-15 Nec Electronics Corp 半導体回路
US8581667B2 (en) 2011-11-11 2013-11-12 Qualcomm Incorporated Tuning voltage range extension circuit and method
JP6245424B2 (ja) * 2013-08-08 2017-12-13 セイコーエプソン株式会社 発振回路の制御方法、発振用回路、発振器、電子機器及び移動体
TWI586108B (zh) * 2014-11-06 2017-06-01 To prevent multi-power system in the phase-locked circuit circuit can not afford the power supply voltage Circuit
JP6418971B2 (ja) * 2015-02-05 2018-11-07 キヤノン株式会社 情報処理装置及びその制御方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04142812A (ja) * 1990-10-04 1992-05-15 Toshiba Corp 位相同期回路
US5061907A (en) * 1991-01-17 1991-10-29 National Semiconductor Corporation High frequency CMOS VCO with gain constant and duty cycle compensation
US5175512A (en) * 1992-02-28 1992-12-29 Avasem Corporation High speed, power supply independent CMOS voltage controlled ring oscillator with level shifting circuit
JPH05335840A (ja) * 1992-05-28 1993-12-17 Fujitsu Ltd 半導体集積回路
US5302920A (en) * 1992-10-13 1994-04-12 Ncr Corporation Controllable multi-phase ring oscillators with variable current sources and capacitances
US5331295A (en) * 1993-02-03 1994-07-19 National Semiconductor Corporation Voltage controlled oscillator with efficient process compensation

Also Published As

Publication number Publication date
KR100389686B1 (ko) 2003-09-13
US5463352A (en) 1995-10-31
EP0704976B1 (de) 1998-08-05
USRE36874E (en) 2000-09-19
EP0704976A1 (de) 1996-04-03
JP3963282B2 (ja) 2007-08-22
DE69503859T2 (de) 1999-04-29
JPH08102662A (ja) 1996-04-16
KR970019096A (ko) 1997-04-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: FIENER, J., PAT.-ANW., 87719 MINDELHEIM

8327 Change in the person/name/address of the patent owner

Owner name: HYNIX SEMICONDUCTOR INC., ICHON, KYONGGI, KR

8327 Change in the person/name/address of the patent owner

Owner name: MAGNACHIP SEMICONDUCTOR, LTD., CHEONGJU, KR