DE3774369D1 - Halbleiter-speicheranordnung. - Google Patents

Halbleiter-speicheranordnung.

Info

Publication number
DE3774369D1
DE3774369D1 DE8787307369T DE3774369T DE3774369D1 DE 3774369 D1 DE3774369 D1 DE 3774369D1 DE 8787307369 T DE8787307369 T DE 8787307369T DE 3774369 T DE3774369 T DE 3774369T DE 3774369 D1 DE3774369 D1 DE 3774369D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
memory arrangement
arrangement
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787307369T
Other languages
English (en)
Inventor
Kazya Kobayasi
Kiyoshi Miyasaka
Junzi Okawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP61196529A external-priority patent/JPS6353795A/ja
Priority claimed from JP61289680A external-priority patent/JPS63142593A/ja
Priority claimed from JP61289677A external-priority patent/JPS63142592A/ja
Priority claimed from JP62009493A external-priority patent/JPH0612615B2/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3774369D1 publication Critical patent/DE3774369D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
DE8787307369T 1986-08-22 1987-08-20 Halbleiter-speicheranordnung. Expired - Fee Related DE3774369D1 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP61196529A JPS6353795A (ja) 1986-08-22 1986-08-22 多次元アクセス半導体メモリ
JP61289680A JPS63142593A (ja) 1986-12-04 1986-12-04 多次元アクセスメモリ
JP61289677A JPS63142592A (ja) 1986-12-04 1986-12-04 多次元アクセスメモリ
JP62009493A JPH0612615B2 (ja) 1987-01-19 1987-01-19 多次元アクセスメモリ

Publications (1)

Publication Number Publication Date
DE3774369D1 true DE3774369D1 (de) 1991-12-12

Family

ID=27455192

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787307369T Expired - Fee Related DE3774369D1 (de) 1986-08-22 1987-08-20 Halbleiter-speicheranordnung.

Country Status (4)

Country Link
US (2) US5379264A (de)
EP (1) EP0257987B1 (de)
KR (1) KR910004731B1 (de)
DE (1) DE3774369D1 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3293935B2 (ja) * 1993-03-12 2002-06-17 株式会社東芝 並列ビットテストモード内蔵半導体メモリ
US5497354A (en) * 1994-06-02 1996-03-05 Intel Corporation Bit map addressing schemes for flash memory
US5701143A (en) * 1995-01-31 1997-12-23 Cirrus Logic, Inc. Circuits, systems and methods for improving row select speed in a row select memory device
JP3577148B2 (ja) * 1995-11-28 2004-10-13 株式会社ルネサステクノロジ 半導体記憶装置
JP4262789B2 (ja) * 1996-12-17 2009-05-13 富士通マイクロエレクトロニクス株式会社 半導体記憶装置
DE19723990A1 (de) 1997-06-06 1998-12-10 Henkel Kgaa Schaumarmes Reinigungsmittel
US6021087A (en) * 1997-09-25 2000-02-01 Texas Instruments Incorporated Dynamic logic memory addressing circuits, systems, and methods with decoder fan out greater than 2:1
WO2001006371A1 (en) * 1998-07-21 2001-01-25 Seagate Technology Llc Improved memory system apparatus and method
JP2001043671A (ja) * 1999-07-28 2001-02-16 Oki Micro Design Co Ltd 半導体装置
US6704828B1 (en) * 2000-08-31 2004-03-09 Micron Technology, Inc. System and method for implementing data pre-fetch having reduced data lines and/or higher data rates
JP4058045B2 (ja) * 2005-01-05 2008-03-05 株式会社東芝 半導体記憶装置
US7099202B1 (en) * 2005-04-08 2006-08-29 Atmel Corporation Y-mux splitting scheme
US9323654B2 (en) * 2013-07-17 2016-04-26 Infineon Technologies Ag Memory access using address bit permutation
US20180303041A1 (en) * 2017-04-21 2018-10-25 Matthew P. Braasch Planter insert

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3643236A (en) * 1969-12-19 1972-02-15 Ibm Storage having a plurality of simultaneously accessible locations
GB1469231A (en) * 1973-02-07 1977-04-06 Mullard Ltd Memory arrangement for a page printer
US3781828A (en) * 1972-05-04 1973-12-25 Ibm Three-dimensionally addressed memory
US4051551A (en) * 1976-05-03 1977-09-27 Burroughs Corporation Multidimensional parallel access computer memory system
JPS5525860A (en) * 1978-08-15 1980-02-23 Toshiba Corp Memory system
JPS6014438B2 (ja) * 1979-08-29 1985-04-13 株式会社東芝 不揮発性半導体メモリ−
JPS56140390A (en) * 1980-04-04 1981-11-02 Nippon Electric Co Picture memory
JPS5771574A (en) * 1980-10-21 1982-05-04 Nec Corp Siemconductor memory circuit
JPS5837948A (ja) * 1981-08-31 1983-03-05 Toshiba Corp 積層半導体記憶装置
JPS58130495A (ja) * 1982-01-29 1983-08-03 Toshiba Corp 半導体記憶装置
WO1984000629A1 (en) * 1982-07-21 1984-02-16 Marconi Avionics Multi-dimensional-access memory system
DD208499A3 (de) * 1982-10-26 1984-05-02 Adw Ddr Mehrdimensionaler paralleler speicher
JPS5998365A (ja) * 1982-11-27 1984-06-06 Shigeto Suzuki 複数同時アクセス型記憶装置
JPS59180324A (ja) * 1983-03-31 1984-10-13 Fujitsu Ltd 半導体記憶装置
JPS60113396A (ja) * 1983-11-25 1985-06-19 Toshiba Corp メモリｌｓｉ
US4729119A (en) * 1984-05-21 1988-03-01 General Computer Corporation Apparatus and methods for processing data through a random access memory system
EP0166642A3 (de) * 1984-05-30 1989-02-22 Fujitsu Limited Blockunterteiltes Halbleiterspeichergerät mit unterteilten Bitzeilen
DE3586523T2 (de) * 1984-10-17 1993-01-07 Fujitsu Ltd Halbleiterspeicheranordnung mit einer seriellen dateneingangs- und ausgangsschaltung.
US4742474A (en) * 1985-04-05 1988-05-03 Tektronix, Inc. Variable access frame buffer memory
JPS62194561A (ja) * 1986-02-21 1987-08-27 Toshiba Corp 半導体記憶装置
DE3605641A1 (de) * 1986-02-21 1987-08-27 Bodmaier Stefan Vorrichtung zum aufspannen, einrichten und einwechseln von schneidwerkzeugen

Also Published As

Publication number Publication date
EP0257987B1 (de) 1991-11-06
KR910004731B1 (en) 1991-07-10
US5379264A (en) 1995-01-03
KR880003326A (ko) 1988-05-16
US5463582A (en) 1995-10-31
EP0257987A1 (de) 1988-03-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee