DE3586397T2 - Halbleiterspeicher mit testmustergenerator. - Google Patents
Halbleiterspeicher mit testmustergenerator.Info
- Publication number
- DE3586397T2 DE3586397T2 DE8585309305T DE3586397T DE3586397T2 DE 3586397 T2 DE3586397 T2 DE 3586397T2 DE 8585309305 T DE8585309305 T DE 8585309305T DE 3586397 T DE3586397 T DE 3586397T DE 3586397 T2 DE3586397 T2 DE 3586397T2
- Authority
- DE
- Germany
- Prior art keywords
- test pattern
- semiconductor memory
- pattern generator
- memory cell
- cell array
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/46—Test trigger logic
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59267460A JPS61145799A (ja) | 1984-12-20 | 1984-12-20 | メモリを内蔵した半導体集積回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3586397D1 DE3586397D1 (de) | 1992-08-27 |
DE3586397T2 true DE3586397T2 (de) | 1993-03-18 |
Family
ID=17445145
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8585309305T Expired - Fee Related DE3586397T2 (de) | 1984-12-20 | 1985-12-20 | Halbleiterspeicher mit testmustergenerator. |
Country Status (5)
Country | Link |
---|---|
US (1) | US4701919A (de) |
EP (1) | EP0186459B1 (de) |
JP (1) | JPS61145799A (de) |
KR (1) | KR900008660B1 (de) |
DE (1) | DE3586397T2 (de) |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61292755A (ja) * | 1985-06-20 | 1986-12-23 | Fujitsu Ltd | 半導体集積回路 |
JPS6221357A (ja) * | 1985-07-22 | 1987-01-29 | Toshiba Corp | メモリシステム |
JPS62140299A (ja) * | 1985-12-13 | 1987-06-23 | Advantest Corp | パタ−ン発生装置 |
JPS62195572A (ja) * | 1986-02-21 | 1987-08-28 | Mitsubishi Electric Corp | 半導体テスト装置 |
DE3773773D1 (de) * | 1986-06-25 | 1991-11-21 | Nec Corp | Pruefschaltung fuer eine speichereinrichtung mit willkuerlichem zugriff. |
US4872168A (en) * | 1986-10-02 | 1989-10-03 | American Telephone And Telegraph Company, At&T Bell Laboratories | Integrated circuit with memory self-test |
DE3634352A1 (de) * | 1986-10-08 | 1988-04-21 | Siemens Ag | Verfahren und anordnung zum testen von mega-bit-speicherbausteinen mit beliebigen testmustern im multi-bit-testmodus |
JPH0812226B2 (ja) * | 1987-01-14 | 1996-02-07 | 三菱電機株式会社 | 半導体装置 |
US4801869A (en) * | 1987-04-27 | 1989-01-31 | International Business Machines Corporation | Semiconductor defect monitor for diagnosing processing-induced defects |
DE3728521A1 (de) * | 1987-08-26 | 1989-03-09 | Siemens Ag | Anordnung und verfahren zur feststellung und lokalisierung von fehlerhaften schaltkreisen eines speicherbausteins |
JPH02166700A (ja) * | 1988-12-15 | 1990-06-27 | Samsung Electron Co Ltd | エラー検査及び訂正装置を内蔵した不揮発性半導体メモリ装置 |
JP2779538B2 (ja) * | 1989-04-13 | 1998-07-23 | 三菱電機株式会社 | 半導体集積回路メモリのためのテスト信号発生器およびテスト方法 |
US5101409A (en) * | 1989-10-06 | 1992-03-31 | International Business Machines Corporation | Checkboard memory self-test |
US5073891A (en) * | 1990-02-14 | 1991-12-17 | Intel Corporation | Method and apparatus for testing memory |
JP2882426B2 (ja) * | 1991-03-29 | 1999-04-12 | 株式会社アドバンテスト | アドレス発生装置 |
BE1004959A3 (nl) * | 1991-06-28 | 1993-03-02 | Bell Telephone Mfg | Werkwijze en inrichtingen voor het testen van atm-verbindingen. |
JPH05274895A (ja) * | 1992-03-26 | 1993-10-22 | Nec Ic Microcomput Syst Ltd | 半導体記憶装置 |
US5490115A (en) * | 1994-07-29 | 1996-02-06 | Cypress Semiconductor Corp. | Method and apparatus for writing to memory cells in a minimum number of cycles during a memory test operation |
US5790559A (en) * | 1996-03-29 | 1998-08-04 | Advantest Corporation | Semiconductor memory testing apparatus |
US6078637A (en) | 1998-06-29 | 2000-06-20 | Cypress Semiconductor Corp. | Address counter test mode for memory device |
JP2000182398A (ja) * | 1998-12-15 | 2000-06-30 | Nec Corp | 半導体装置及び半導体装置の試験方法 |
US6728910B1 (en) * | 2000-09-20 | 2004-04-27 | Lsi Logic Corporation | Memory testing for built-in self-repair system |
TW559970B (en) * | 2001-04-05 | 2003-11-01 | Kawasaki Microelectronics Inc | Test circuit, semiconductor product wafer having the test circuit, and method of monitoring manufacturing process using the test circuit |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3924181A (en) * | 1973-10-16 | 1975-12-02 | Hughes Aircraft Co | Test circuitry employing a cyclic code generator |
JPS573299A (en) * | 1980-06-06 | 1982-01-08 | Nec Corp | Memory integrated circuit |
US4541090A (en) * | 1981-06-09 | 1985-09-10 | Matsushita Electric Industrial Co., Ltd. | Semiconductor memory device |
US4519078A (en) * | 1982-09-29 | 1985-05-21 | Storage Technology Corporation | LSI self-test method |
-
1984
- 1984-12-20 JP JP59267460A patent/JPS61145799A/ja active Granted
-
1985
- 1985-12-17 KR KR1019850009485A patent/KR900008660B1/ko not_active IP Right Cessation
- 1985-12-18 US US06/810,143 patent/US4701919A/en not_active Expired - Lifetime
- 1985-12-20 EP EP85309305A patent/EP0186459B1/de not_active Expired - Lifetime
- 1985-12-20 DE DE8585309305T patent/DE3586397T2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPS61145799A (ja) | 1986-07-03 |
JPH0378720B2 (de) | 1991-12-16 |
US4701919A (en) | 1987-10-20 |
DE3586397D1 (de) | 1992-08-27 |
EP0186459B1 (de) | 1992-07-22 |
KR900008660B1 (ko) | 1990-11-26 |
EP0186459A3 (en) | 1988-06-08 |
KR860005446A (ko) | 1986-07-23 |
EP0186459A2 (de) | 1986-07-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |