JPS573299A - Memory integrated circuit - Google Patents

Memory integrated circuit

Info

Publication number
JPS573299A
JPS573299A JP7644280A JP7644280A JPS573299A JP S573299 A JPS573299 A JP S573299A JP 7644280 A JP7644280 A JP 7644280A JP 7644280 A JP7644280 A JP 7644280A JP S573299 A JPS573299 A JP S573299A
Authority
JP
Japan
Prior art keywords
circuit
cell array
memory cell
circuits
written
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7644280A
Other languages
Japanese (ja)
Inventor
Isao Ueki
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corp filed Critical Nec Corp
Priority to JP7644280A priority Critical patent/JPS573299A/en
Publication of JPS573299A publication Critical patent/JPS573299A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing

Abstract

PURPOSE:To obtain a memory integrated circuit which can be tested by adding a simple circuit, by comparing a test pattern, outputted from an address arithmetic circuit, with a readout outpt obtain by passing the said pattern through a memory. CONSTITUTION:Written data WD is passed through an input and output circuit 3 and then written in an address position in a memory cell array 1 specified by row and column selecting circuits 2 and 4, and it is also read out and outputted from the circuit 3. On the application of a test signal TE, a data selecting circuit 5 selects a test pattern signal WD, generated by an address arithmetic circuit 6, according to all or some of addresses. Then, this signal WD and data written in the memory cell array 1 via the circuits 3 and read out from the memory cell array 1 are compared mutually by a comparing circuit 7, thereby testing the memory cell array 1 by adding simple circuits 6 and 7, etc.
JP7644280A 1980-06-06 1980-06-06 Memory integrated circuit Pending JPS573299A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7644280A JPS573299A (en) 1980-06-06 1980-06-06 Memory integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7644280A JPS573299A (en) 1980-06-06 1980-06-06 Memory integrated circuit

Publications (1)

Publication Number Publication Date
JPS573299A true JPS573299A (en) 1982-01-08

Family

ID=13605261

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7644280A Pending JPS573299A (en) 1980-06-06 1980-06-06 Memory integrated circuit

Country Status (1)

Country Link
JP (1) JPS573299A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0186459A2 (en) * 1984-12-20 1986-07-02 Fujitsu Limited Semiconductor memory incorporating a test pattern generator
JPS61296600A (en) * 1985-06-24 1986-12-27 Nec Ic Microcomput Syst Ltd Storage device
JPS6366799A (en) * 1986-09-08 1988-03-25 Toshiba Corp Semiconductor memory device
EP0263312A2 (en) * 1986-09-08 1988-04-13 Kabushiki Kaisha Toshiba Semiconductor memory device with a self-testing function
JPS63102098A (en) * 1986-10-02 1988-05-06 American Telephone & Telegraph Integrated circuit

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0186459A2 (en) * 1984-12-20 1986-07-02 Fujitsu Limited Semiconductor memory incorporating a test pattern generator
JPS61145799A (en) * 1984-12-20 1986-07-03 Fujitsu Ltd Semiconductor integrated circuit incorporating memory
JPH0378720B2 (en) * 1984-12-20 1991-12-16 Fujitsu Ltd
JPS61296600A (en) * 1985-06-24 1986-12-27 Nec Ic Microcomput Syst Ltd Storage device
JPS6366799A (en) * 1986-09-08 1988-03-25 Toshiba Corp Semiconductor memory device
EP0263312A2 (en) * 1986-09-08 1988-04-13 Kabushiki Kaisha Toshiba Semiconductor memory device with a self-testing function
JPS63102098A (en) * 1986-10-02 1988-05-06 American Telephone & Telegraph Integrated circuit

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