DE3579849D1 - Eprom mit selbstjustierter geteilter steuerelektrode und verfahren zur herstellung. - Google Patents

Eprom mit selbstjustierter geteilter steuerelektrode und verfahren zur herstellung.

Info

Publication number
DE3579849D1
DE3579849D1 DE8585200749T DE3579849T DE3579849D1 DE 3579849 D1 DE3579849 D1 DE 3579849D1 DE 8585200749 T DE8585200749 T DE 8585200749T DE 3579849 T DE3579849 T DE 3579849T DE 3579849 D1 DE3579849 D1 DE 3579849D1
Authority
DE
Germany
Prior art keywords
eprom
self
production
control electrode
shared control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8585200749T
Other languages
English (en)
Inventor
Boaz Eitan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
UNITED MODULE CORP., LOS ALTOS, CALIF., US
Original Assignee
Waferscale Integration Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Waferscale Integration Inc filed Critical Waferscale Integration Inc
Application granted granted Critical
Publication of DE3579849D1 publication Critical patent/DE3579849D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
DE8585200749T 1984-05-15 1985-05-10 Eprom mit selbstjustierter geteilter steuerelektrode und verfahren zur herstellung. Expired - Lifetime DE3579849D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/610,369 US4639893A (en) 1984-05-15 1984-05-15 Self-aligned split gate EPROM

Publications (1)

Publication Number Publication Date
DE3579849D1 true DE3579849D1 (de) 1990-10-31

Family

ID=24444750

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585200749T Expired - Lifetime DE3579849D1 (de) 1984-05-15 1985-05-10 Eprom mit selbstjustierter geteilter steuerelektrode und verfahren zur herstellung.

Country Status (4)

Country Link
US (2) US4639893A (de)
EP (1) EP0164781B1 (de)
JP (2) JPH0785492B2 (de)
DE (1) DE3579849D1 (de)

Families Citing this family (75)

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US4754320A (en) * 1985-02-25 1988-06-28 Kabushiki Kaisha Toshiba EEPROM with sidewall control gate
US5225719A (en) * 1985-03-29 1993-07-06 Advanced Micro Devices, Inc. Family of multiple segmented programmable logic blocks interconnected by a high speed centralized switch matrix
IT1215380B (it) * 1987-03-12 1990-02-08 Sgs Microelettronica Spa Cella di memoria eprom a due semicelle simmetriche con gate flottante separata.
US5016215A (en) * 1987-09-30 1991-05-14 Texas Instruments Incorporated High speed EPROM with reverse polarity voltages applied to source and drain regions during reading and writing
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US4888735A (en) * 1987-12-30 1989-12-19 Elite Semiconductor & Systems Int'l., Inc. ROM cell and array configuration
US4888734A (en) * 1987-12-30 1989-12-19 Elite Semiconductor & Systems Int'l., Inc. EPROM/flash EEPROM cell and array configuration
US4861730A (en) * 1988-01-25 1989-08-29 Catalyst Semiconductor, Inc. Process for making a high density split gate nonvolatile memory cell
US5303185A (en) * 1988-02-05 1994-04-12 Emanuel Hazani EEPROM cell structure and architecture with increased capacitance and with programming and erase terminals shared between several cells
US5332914A (en) * 1988-02-05 1994-07-26 Emanuel Hazani EEPROM cell structure and architecture with increased capacitance and with programming and erase terminals shared between several cells
US5162247A (en) * 1988-02-05 1992-11-10 Emanuel Hazani Process for trench-isolated self-aligned split-gate EEPROM transistor and memory array
US4998220A (en) * 1988-05-03 1991-03-05 Waferscale Integration, Inc. EEPROM with improved erase structure
US5095344A (en) * 1988-06-08 1992-03-10 Eliyahou Harari Highly compact eprom and flash eeprom devices
US5168465A (en) * 1988-06-08 1992-12-01 Eliyahou Harari Highly compact EPROM and flash EEPROM devices
US5268319A (en) * 1988-06-08 1993-12-07 Eliyahou Harari Highly compact EPROM and flash EEPROM devices
US5268318A (en) * 1988-06-08 1993-12-07 Eliyahou Harari Highly compact EPROM and flash EEPROM devices
US5016216A (en) * 1988-10-17 1991-05-14 Waferscale Integration, Inc. Decoder for a floating gate memory
US5210048A (en) * 1988-10-19 1993-05-11 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device with offset transistor and method for manufacturing the same
US5153684A (en) * 1988-10-19 1992-10-06 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device with offset transistor
US5362662A (en) * 1989-08-11 1994-11-08 Ricoh Company, Ltd. Method for producing semiconductor memory device having a planar cell structure
US5128895A (en) * 1989-11-21 1992-07-07 Intel Corporation Method for programming a virtual ground EPROM cell including slow ramping of the column line voltage
US5027321A (en) * 1989-11-21 1991-06-25 Intel Corporation Apparatus and method for improved reading/programming of virtual ground EPROM arrays
US5572054A (en) * 1990-01-22 1996-11-05 Silicon Storage Technology, Inc. Method of operating a single transistor non-volatile electrically alterable semiconductor memory device
US5313432A (en) * 1990-05-23 1994-05-17 Texas Instruments Incorporated Segmented, multiple-decoder memory array and method for programming a memory array
US5091327A (en) * 1990-06-28 1992-02-25 National Semiconductor Corporation Fabrication of a high density stacked gate eprom split cell with bit line reach-through and interruption immunity
US5063172A (en) * 1990-06-28 1991-11-05 National Semiconductor Corporation Manufacture of a split-gate EPROM cell using polysilicon spacers
EP0463511B1 (de) * 1990-06-28 1999-03-24 National Semiconductor Corporation Verfahren zum Herstellen einer EPROM-Zelle mit geteiltem Gate und mit Polysilizium-Abstandhaltern
US5115288A (en) * 1990-06-28 1992-05-19 National Semiconductor Corporation Split-gate EPROM cell using polysilicon spacers
DE69228887T2 (de) * 1991-01-17 1999-08-26 Texas Instruments Inc. Nicht-flüchtige Speicherzellenstruktur und ihr Herstellungsverfahren
US5719806A (en) * 1991-02-18 1998-02-17 Yamane; Masatoshi Memory cell array
US5272669A (en) * 1991-02-20 1993-12-21 Sundisk Corporation Method and structure for programming floating gate memory cells
FR2677481B1 (fr) * 1991-06-07 1993-08-20 Commissariat Energie Atomique Procede de fabrication d'une cellule de memoire non volatile et cellule de memoire obtenue.
DE69432568T2 (de) * 1991-08-29 2004-02-26 Hyundai Electronics Industries Co., Ltd. Selbstjustierende flash-eeprom-zelle mit doppelbit-geteiltem gat
US5313427A (en) * 1991-09-20 1994-05-17 Texas Instruments Incorporated EEPROM array with narrow margin of voltage thresholds after erase
US5284784A (en) * 1991-10-02 1994-02-08 National Semiconductor Corporation Buried bit-line source-side injection flash memory cell
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US5526307A (en) * 1992-01-22 1996-06-11 Macronix International Co., Ltd. Flash EPROM integrated circuit architecture
US5618742A (en) * 1992-01-22 1997-04-08 Macronix Internatioal, Ltd. Method of making flash EPROM with conductive sidewall spacer contacting floating gate
DE69231356T2 (de) * 1992-01-22 2000-12-28 Macronix International Co. Ltd., Hsinchu Nichtflüchtige Speicherzelle und Anordnungsarchitektur
US5544103A (en) * 1992-03-03 1996-08-06 Xicor, Inc. Compact page-erasable eeprom non-volatile memory
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US5341342A (en) * 1992-12-18 1994-08-23 National Semiconductor Corporation Flash memory cell structure
JP2877642B2 (ja) * 1992-12-25 1999-03-31 ローム株式会社 半導体記憶装置およびその駆動方式
US5508955A (en) * 1993-05-20 1996-04-16 Nexcom Technology, Inc. Electronically erasable-programmable memory cell having buried bit line
US5496747A (en) * 1993-08-02 1996-03-05 United Microelectronics Corporation Split-gate process for non-volatile memory
US5557569A (en) * 1993-10-12 1996-09-17 Texas Instruments Incorporated Low voltage flash EEPROM C-cell using fowler-nordheim tunneling
DE69433001T2 (de) * 1993-10-12 2004-06-17 Texas Instruments Inc., Dallas Niederspannungs-Flash-EEPROM-X-Zelle mit Fowler-Nordheim-Tunneling
JP3474614B2 (ja) * 1993-12-14 2003-12-08 マクロニクス インターナショナル カンパニイ リミテッド 不揮発性半導体メモリ装置及びその動作方法
US5457652A (en) * 1994-04-01 1995-10-10 National Semiconductor Corporation Low voltage EEPROM
US5471422A (en) * 1994-04-11 1995-11-28 Motorola, Inc. EEPROM cell with isolation transistor and methods for making and operating the same
US5429969A (en) * 1994-05-31 1995-07-04 Motorola, Inc. Process for forming electrically programmable read-only memory cell with a merged select/control gate
EP0727820B1 (de) * 1995-02-17 2004-03-24 Hitachi, Ltd. Halbleiter-Speicherbauelement und Verfahren zum Herstellen desselben
EP0830684B1 (de) * 1995-06-07 2004-08-25 Macronix International Co., Ltd. Automatischer progammier-algorithmus für flash-speicher im seitenmodus mit variabler programmierimpulshöhe und -breite
US5821573A (en) * 1996-10-17 1998-10-13 Mitsubishi Semiconductor America, Inc. Field effect transistor having an arched gate and manufacturing method thereof
US6026017A (en) * 1997-04-11 2000-02-15 Programmable Silicon Solutions Compact nonvolatile memory
US6566707B1 (en) * 1998-01-08 2003-05-20 Sanyo Electric Co., Ltd. Transistor, semiconductor memory and method of fabricating the same
US6346725B1 (en) 1998-05-22 2002-02-12 Winbond Electronics Corporation Contact-less array of fully self-aligned, triple polysilicon, source-side injection, nonvolatile memory cells with metal-overlaid wordlines
US6380593B1 (en) * 1998-12-30 2002-04-30 Texas Instruments Incorporated Automated well-tie and substrate contact insertion methodology
KR100819730B1 (ko) 2000-08-14 2008-04-07 샌디스크 쓰리디 엘엘씨 밀집한 어레이 및 전하 저장 장치와, 그 제조 방법
US6897514B2 (en) * 2001-03-28 2005-05-24 Matrix Semiconductor, Inc. Two mask floating gate EEPROM and method of making
US6841813B2 (en) * 2001-08-13 2005-01-11 Matrix Semiconductor, Inc. TFT mask ROM and method for making same
US6745372B2 (en) * 2002-04-05 2004-06-01 Numerical Technologies, Inc. Method and apparatus for facilitating process-compliant layout optimization
US6570211B1 (en) * 2002-06-26 2003-05-27 Advanced Micro Devices, Inc. 2Bit/cell architecture for floating gate flash memory product and associated method
DE10241990B4 (de) * 2002-09-11 2006-11-09 Infineon Technologies Ag Verfahren zur Strukturierung von Schichten auf Halbleiterbauelementen
US7448012B1 (en) 2004-04-21 2008-11-04 Qi-De Qian Methods and system for improving integrated circuit layout
US7638850B2 (en) 2004-10-14 2009-12-29 Saifun Semiconductors Ltd. Non-volatile memory structure and method of fabrication
US7804126B2 (en) * 2005-07-18 2010-09-28 Saifun Semiconductors Ltd. Dense non-volatile memory array and method of fabrication
US7345915B2 (en) * 2005-10-31 2008-03-18 Hewlett-Packard Development Company, L.P. Modified-layer EPROM cell
JP2009021305A (ja) * 2007-07-10 2009-01-29 Denso Corp 不揮発性メモリトランジスタ
JP2009152407A (ja) * 2007-12-20 2009-07-09 Toshiba Corp 半導体記憶装置
US20140217555A1 (en) * 2013-02-06 2014-08-07 Kabushiki Kaisha Toshiba Semiconductor device and manufacturing method thereof
US9627395B2 (en) 2015-02-11 2017-04-18 Sandisk Technologies Llc Enhanced channel mobility three-dimensional memory structure and method of making thereof
US9478495B1 (en) 2015-10-26 2016-10-25 Sandisk Technologies Llc Three dimensional memory device containing aluminum source contact via structure and method of making thereof

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Also Published As

Publication number Publication date
JPH0785492B2 (ja) 1995-09-13
US5021847A (en) 1991-06-04
JPS6151880A (ja) 1986-03-14
EP0164781A2 (de) 1985-12-18
EP0164781A3 (en) 1987-08-26
JPH10125816A (ja) 1998-05-15
EP0164781B1 (de) 1990-09-26
US4639893A (en) 1987-01-27

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Legal Events

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8327 Change in the person/name/address of the patent owner

Owner name: UNITED MODULE CORP., LOS ALTOS, CALIF., US