JPS5389686A - Production of semiconductor memory element - Google Patents

Production of semiconductor memory element

Info

Publication number
JPS5389686A
JPS5389686A JP417377A JP417377A JPS5389686A JP S5389686 A JPS5389686 A JP S5389686A JP 417377 A JP417377 A JP 417377A JP 417377 A JP417377 A JP 417377A JP S5389686 A JPS5389686 A JP S5389686A
Authority
JP
Japan
Prior art keywords
memory element
production
semiconductor memory
gate
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP417377A
Other languages
Japanese (ja)
Inventor
Mitsuaki Ishikawa
Fujio Masuoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP417377A priority Critical patent/JPS5389686A/en
Publication of JPS5389686A publication Critical patent/JPS5389686A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To produce a memory element of double gate structure by perform second gate oxidation in a state where no impurity is doped to a first electrode of poly-Si and making a second gate oxide film of equal thickness on the first gate electrode and source and drain layers.
JP417377A 1977-01-18 1977-01-18 Production of semiconductor memory element Pending JPS5389686A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP417377A JPS5389686A (en) 1977-01-18 1977-01-18 Production of semiconductor memory element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP417377A JPS5389686A (en) 1977-01-18 1977-01-18 Production of semiconductor memory element

Publications (1)

Publication Number Publication Date
JPS5389686A true JPS5389686A (en) 1978-08-07

Family

ID=11577321

Family Applications (1)

Application Number Title Priority Date Filing Date
JP417377A Pending JPS5389686A (en) 1977-01-18 1977-01-18 Production of semiconductor memory element

Country Status (1)

Country Link
JP (1) JPS5389686A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53122374A (en) * 1977-03-31 1978-10-25 Fujitsu Ltd Manufacture for double gate consitution semiconductor device
JPS60134478A (en) * 1983-11-28 1985-07-17 ローム・コーポレーション Electrically programmalbe memory and method of producing same
US4735914A (en) * 1979-03-28 1988-04-05 Honeywell Inc. FET for high reverse bias voltage and geometrical design for low on resistance
US4795719A (en) * 1984-05-15 1989-01-03 Waferscale Integration, Inc. Self-aligned split gate eprom process
US4868629A (en) * 1984-05-15 1989-09-19 Waferscale Integration, Inc. Self-aligned split gate EPROM
US5021847A (en) * 1984-05-15 1991-06-04 Waferscale Integration, Inc. Split gate memory array having staggered floating gate rows and method for making same
US5098855A (en) * 1984-05-23 1992-03-24 Hitachi, Ltd. Semiconductor device and method of producing the same
US5147813A (en) * 1990-08-15 1992-09-15 Intel Corporation Erase performance improvement via dual floating gate processing
US5172200A (en) * 1990-01-12 1992-12-15 Mitsubishi Denki Kabushiki Kaisha MOS memory device having a LDD structure and a visor-like insulating layer
US5229631A (en) * 1990-08-15 1993-07-20 Intel Corporation Erase performance improvement via dual floating gate processing

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53122374A (en) * 1977-03-31 1978-10-25 Fujitsu Ltd Manufacture for double gate consitution semiconductor device
US4735914A (en) * 1979-03-28 1988-04-05 Honeywell Inc. FET for high reverse bias voltage and geometrical design for low on resistance
JPS60134478A (en) * 1983-11-28 1985-07-17 ローム・コーポレーション Electrically programmalbe memory and method of producing same
JPH0574947B2 (en) * 1983-11-28 1993-10-19 Roomu Corp
US4795719A (en) * 1984-05-15 1989-01-03 Waferscale Integration, Inc. Self-aligned split gate eprom process
US4868629A (en) * 1984-05-15 1989-09-19 Waferscale Integration, Inc. Self-aligned split gate EPROM
US5021847A (en) * 1984-05-15 1991-06-04 Waferscale Integration, Inc. Split gate memory array having staggered floating gate rows and method for making same
US5098855A (en) * 1984-05-23 1992-03-24 Hitachi, Ltd. Semiconductor device and method of producing the same
US5172200A (en) * 1990-01-12 1992-12-15 Mitsubishi Denki Kabushiki Kaisha MOS memory device having a LDD structure and a visor-like insulating layer
US5147813A (en) * 1990-08-15 1992-09-15 Intel Corporation Erase performance improvement via dual floating gate processing
US5229631A (en) * 1990-08-15 1993-07-20 Intel Corporation Erase performance improvement via dual floating gate processing

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