DE3381185D1 - Verfahren zur herstellung einer vertikalen leistungs-mosfet-struktur. - Google Patents

Verfahren zur herstellung einer vertikalen leistungs-mosfet-struktur.

Info

Publication number
DE3381185D1
DE3381185D1 DE8383400983T DE3381185T DE3381185D1 DE 3381185 D1 DE3381185 D1 DE 3381185D1 DE 8383400983 T DE8383400983 T DE 8383400983T DE 3381185 T DE3381185 T DE 3381185T DE 3381185 D1 DE3381185 D1 DE 3381185D1
Authority
DE
Germany
Prior art keywords
producing
power mosfet
vertical power
mosfet structure
vertical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8383400983T
Other languages
English (en)
Inventor
Madhukar B Vora
Vikram M Patel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fairchild Semiconductor Corp
Original Assignee
Fairchild Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fairchild Semiconductor Corp filed Critical Fairchild Semiconductor Corp
Application granted granted Critical
Publication of DE3381185D1 publication Critical patent/DE3381185D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095Body region, i.e. base region, of DMOS transistors or IGBTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725Source or drain electrodes for field effect devices
    • H01L29/41766Source or drain electrodes for field effect devices with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
DE8383400983T 1982-05-20 1983-05-17 Verfahren zur herstellung einer vertikalen leistungs-mosfet-struktur. Expired - Lifetime DE3381185D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/380,170 US4503598A (en) 1982-05-20 1982-05-20 Method of fabricating power MOSFET structure utilizing self-aligned diffusion and etching techniques

Publications (1)

Publication Number Publication Date
DE3381185D1 true DE3381185D1 (de) 1990-03-08

Family

ID=23500159

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8383400983T Expired - Lifetime DE3381185D1 (de) 1982-05-20 1983-05-17 Verfahren zur herstellung einer vertikalen leistungs-mosfet-struktur.

Country Status (4)

Country Link
US (1) US4503598A (de)
EP (1) EP0094891B1 (de)
JP (1) JPS58210678A (de)
DE (1) DE3381185D1 (de)

Families Citing this family (75)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5118631A (en) * 1981-07-10 1992-06-02 Loral Fairchild Corporation Self-aligned antiblooming structure for charge-coupled devices and method of fabrication thereof
US4567641A (en) * 1982-04-12 1986-02-04 General Electric Company Method of fabricating semiconductor devices having a diffused region of reduced length
US4625388A (en) * 1982-04-26 1986-12-02 Acrian, Inc. Method of fabricating mesa MOSFET using overhang mask and resulting structure
EP0205639A1 (de) * 1985-06-25 1986-12-30 Eaton Corporation Bidirektionaler Leistungsfeldeffekttransistor mit substratbezogener Feldplatte
DE3245457A1 (de) * 1982-12-08 1984-06-14 Siemens AG, 1000 Berlin und 8000 München Halbleiterelement mit kontaktloch
US4809047A (en) * 1983-09-06 1989-02-28 General Electric Company Insulated-gate semiconductor device with improved base-to-source electrode short and method of fabricating said short
US4587713A (en) * 1984-02-22 1986-05-13 Rca Corporation Method for making vertical MOSFET with reduced bipolar effects
JPS60196974A (ja) * 1984-03-19 1985-10-05 Toshiba Corp 導電変調型mosfet
JPS6161441A (ja) * 1984-09-03 1986-03-29 Toshiba Corp 半導体装置の製造方法
FR2570880A1 (fr) * 1984-09-27 1986-03-28 Rca Corp Procede de fabrication d'un transistor a effet de champ a grille isolee et transistor ainsi obtenu
DE3570557D1 (en) * 1984-11-27 1989-06-29 American Telephone & Telegraph Trench transistor
EP0202477A3 (de) * 1985-04-24 1988-04-20 General Electric Company Verfahren zum Herstellen elektrischer Kurzschlüsse zwischen benachbarten Gebieten in einer Halbleiteranordnung mit isoliertem Gate
US4682405A (en) * 1985-07-22 1987-07-28 Siliconix Incorporated Methods for forming lateral and vertical DMOS transistors
US4963951A (en) * 1985-11-29 1990-10-16 General Electric Company Lateral insulated gate bipolar transistors with improved latch-up immunity
JPS62132366A (ja) * 1985-12-04 1987-06-15 Nec Corp 縦型電界効果トランジスタの製造方法
EP0227894A3 (de) * 1985-12-19 1988-07-13 SILICONIX Incorporated Vertikaler DMOS-Transistor von hoher Packungsdichte
DE3688057T2 (de) * 1986-01-10 1993-10-07 Gen Electric Halbleitervorrichtung und Methode zur Herstellung.
US4877749A (en) * 1986-02-28 1989-10-31 Polyfet Re Devices, Inc. Method of forming a low loss FET
US4866492A (en) * 1986-02-28 1989-09-12 Polyfet Rf Devices, Inc. Low loss fet
US5262336A (en) * 1986-03-21 1993-11-16 Advanced Power Technology, Inc. IGBT process to produce platinum lifetime control
US4748103A (en) * 1986-03-21 1988-05-31 Advanced Power Technology Mask-surrogate semiconductor process employing dopant protective region
US5019522A (en) * 1986-03-21 1991-05-28 Advanced Power Technology, Inc. Method of making topographic pattern delineated power MOSFET with profile tailored recessed source
US5089434A (en) * 1986-03-21 1992-02-18 Advanced Power Technology, Inc. Mask surrogate semiconductor process employing dopant-opaque region
US4895810A (en) * 1986-03-21 1990-01-23 Advanced Power Technology, Inc. Iopographic pattern delineated power mosfet with profile tailored recessed source
GB2199694A (en) * 1986-12-23 1988-07-13 Philips Electronic Associated A method of manufacturing a semiconductor device
GB2193597A (en) * 1986-08-08 1988-02-10 Philips Electronic Associated Method of manufacturing a vertical DMOS transistor
EP0255970B1 (de) * 1986-08-08 1993-12-15 Philips Electronics Uk Limited Verfahren zur Herstellung eines Feldeffekttransistors mit isoliertem Gate
US4821095A (en) * 1987-03-12 1989-04-11 General Electric Company Insulated gate semiconductor device with extra short grid and method of fabrication
JPS63255971A (ja) * 1987-04-13 1988-10-24 Mitsubishi Electric Corp 半導体装置
JPH0795568B2 (ja) * 1987-04-27 1995-10-11 日本電気株式会社 半導体記憶装置
US4801985A (en) * 1987-05-19 1989-01-31 General Electric Company Monolithically integrated semiconductor device and process for fabrication
JPH0834311B2 (ja) * 1987-06-10 1996-03-29 日本電装株式会社 半導体装置の製造方法
US5179034A (en) * 1987-08-24 1993-01-12 Hitachi, Ltd. Method for fabricating insulated gate semiconductor device
JPH0766968B2 (ja) * 1987-08-24 1995-07-19 株式会社日立製作所 半導体装置及びその製造方法
JP2615667B2 (ja) * 1987-09-28 1997-06-04 日産自動車株式会社 Mos電界効果トランジスタの製造方法
JPH01236656A (ja) * 1988-03-16 1989-09-21 Rohm Co Ltd 半導体装置
JPH01300569A (ja) * 1988-05-27 1989-12-05 Mitsubishi Electric Corp 半導体装置
US4853345A (en) * 1988-08-22 1989-08-01 Delco Electronics Corporation Process for manufacture of a vertical DMOS transistor
US4963502A (en) * 1988-08-25 1990-10-16 Texas Instruments, Incorporated Method of making oxide-isolated source/drain transistor
US5084418A (en) * 1988-12-27 1992-01-28 Texas Instruments Incorporated Method of making an array device with buried interconnects
JPH02267944A (ja) * 1989-03-15 1990-11-01 Siemens Ag 電力用mosfet
US4960723A (en) * 1989-03-30 1990-10-02 Motorola, Inc. Process for making a self aligned vertical field effect transistor having an improved source contact
JPH02281662A (ja) * 1989-04-21 1990-11-19 Mitsubishi Electric Corp 半導体装置
US5216264A (en) * 1989-06-07 1993-06-01 Sharp Kabushiki Kaisha Silicon carbide MOS type field-effect transistor with at least one of the source and drain regions is formed by the use of a schottky contact
IT1231300B (it) * 1989-07-24 1991-11-28 Sgs Thomson Microelectronics Processo di definizione e realizzazione di una regione attivadi dimensioni molto ridotte in uno strato di materiale semiconduttore
EP0417457A3 (en) * 1989-08-11 1991-07-03 Seiko Instruments Inc. Method of producing field effect transistor
US4931408A (en) * 1989-10-13 1990-06-05 Siliconix Incorporated Method of fabricating a short-channel low voltage DMOS transistor
US5132238A (en) * 1989-12-28 1992-07-21 Nissan Motor Co., Ltd. Method of manufacturing semiconductor device utilizing an accumulation layer
EP0505877A2 (de) * 1991-03-27 1992-09-30 Seiko Instruments Inc. Dotierungsverfahren mittels einer adsorbierten Diffusionsquelle
US5122848A (en) * 1991-04-08 1992-06-16 Micron Technology, Inc. Insulated-gate vertical field-effect transistor with high current drive and minimum overlap capacitance
US5250450A (en) * 1991-04-08 1993-10-05 Micron Technology, Inc. Insulated-gate vertical field-effect transistor with high current drive and minimum overlap capacitance
US5338698A (en) * 1992-12-18 1994-08-16 International Business Machines Corporation Method of fabricating an ultra-short channel field effect transistor
JPH07176640A (ja) * 1993-10-26 1995-07-14 Fuji Electric Co Ltd 半導体装置の製造方法
US5466616A (en) * 1994-04-06 1995-11-14 United Microelectronics Corp. Method of producing an LDMOS transistor having reduced dimensions, reduced leakage, and a reduced propensity to latch-up
US5395777A (en) * 1994-04-06 1995-03-07 United Microelectronics Corp. Method of producing VDMOS transistors
DE4434108A1 (de) * 1994-09-23 1996-03-28 Siemens Ag Verfahren zur Erzeugung eines niederohmigen Kontaktes zwischen einer Metallisierungsschicht und einem Halbleitermaterial
US5545915A (en) * 1995-01-23 1996-08-13 Delco Electronics Corporation Semiconductor device having field limiting ring and a process therefor
JP3325736B2 (ja) * 1995-02-09 2002-09-17 三菱電機株式会社 絶縁ゲート型半導体装置
KR0143459B1 (ko) * 1995-05-22 1998-07-01 한민구 모오스 게이트형 전력 트랜지스터
US5675164A (en) * 1995-06-07 1997-10-07 International Business Machines Corporation High performance multi-mesa field effect transistor
US5858844A (en) * 1995-06-07 1999-01-12 Advanced Micro Devices, Inc. Method for construction and fabrication of submicron field-effect transistors by optimization of poly oxide process
US5731603A (en) * 1995-08-24 1998-03-24 Kabushiki Kaisha Toshiba Lateral IGBT
US5631484A (en) * 1995-12-26 1997-05-20 Motorola, Inc. Method of manufacturing a semiconductor device and termination structure
US5998266A (en) * 1996-12-19 1999-12-07 Magepower Semiconductor Corp. Method of forming a semiconductor structure having laterally merged body layer
US5886383A (en) * 1997-01-10 1999-03-23 International Rectifier Corporation Integrated schottky diode and mosgated device
US6429481B1 (en) * 1997-11-14 2002-08-06 Fairchild Semiconductor Corporation Field effect transistor and method of its manufacture
US6939776B2 (en) * 1998-09-29 2005-09-06 Sanyo Electric Co., Ltd. Semiconductor device and a method of fabricating the same
US6509241B2 (en) * 2000-12-12 2003-01-21 International Business Machines Corporation Process for fabricating an MOS device having highly-localized halo regions
US7078296B2 (en) 2002-01-16 2006-07-18 Fairchild Semiconductor Corporation Self-aligned trench MOSFETs and methods for making the same
US7745301B2 (en) 2005-08-22 2010-06-29 Terapede, Llc Methods and apparatus for high-density chip connectivity
US8957511B2 (en) 2005-08-22 2015-02-17 Madhukar B. Vora Apparatus and methods for high-density chip connectivity
TWI492277B (zh) * 2011-04-11 2015-07-11 Great Power Semiconductor Corp 具有快速切換能力之溝渠式功率金氧半導體結構之製造方法
US8546879B2 (en) * 2011-08-18 2013-10-01 Monolithic Power Systems, Inc. High density lateral DMOS with recessed source contact
CN104867830A (zh) * 2014-02-20 2015-08-26 北大方正集团有限公司 制作dmos器件的方法
CN106206300A (zh) * 2015-04-29 2016-12-07 北大方正集团有限公司 垂直双扩散金属-氧化物半导体场效应晶体管及加工方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4003126A (en) * 1974-09-12 1977-01-18 Canadian Patents And Development Limited Method of making metal oxide semiconductor devices
JPS52132684A (en) * 1976-04-29 1977-11-07 Sony Corp Insulating gate type field effect transistor
US4181542A (en) * 1976-10-25 1980-01-01 Nippon Gakki Seizo Kabushiki Kaisha Method of manufacturing junction field effect transistors
US4398339A (en) * 1977-04-15 1983-08-16 Supertex, Inc. Fabrication method for high power MOS device
JPS6034819B2 (ja) * 1978-02-14 1985-08-10 工業技術院長 記憶装置
US4219835A (en) * 1978-02-17 1980-08-26 Siliconix, Inc. VMOS Mesa structure and manufacturing process
US4296429A (en) * 1978-08-09 1981-10-20 Harris Corporation VMOS Transistor and method of fabrication
US4206469A (en) * 1978-09-15 1980-06-03 Westinghouse Electric Corp. Power metal-oxide-semiconductor-field-effect-transistor
US4384301A (en) * 1979-11-07 1983-05-17 Texas Instruments Incorporated High performance submicron metal-oxide-semiconductor field effect transistor device structure
DE3012185A1 (de) * 1980-03-28 1981-10-08 Siemens AG, 1000 Berlin und 8000 München Feldeffekttransistor
US4345265A (en) * 1980-04-14 1982-08-17 Supertex, Inc. MOS Power transistor with improved high-voltage capability
DE3016749A1 (de) * 1980-04-30 1981-11-05 Siemens AG, 1000 Berlin und 8000 München Kontakt fuer mis-halbleiterbauelement und verfahren zu seiner herstellung
US4593302B1 (en) * 1980-08-18 1998-02-03 Int Rectifier Corp Process for manufacture of high power mosfet laterally distributed high carrier density beneath the gate oxide
EP0091686B1 (de) * 1982-04-12 1989-06-28 General Electric Company Halbleiteranordnung mit diffundierter Zone mit reduzierter Länge und Verfahren zur Herstellung dieser Zone
US4419811A (en) * 1982-04-26 1983-12-13 Acrian, Inc. Method of fabricating mesa MOSFET using overhang mask

Also Published As

Publication number Publication date
EP0094891A3 (en) 1985-07-31
EP0094891A2 (de) 1983-11-23
EP0094891B1 (de) 1990-01-31
US4503598A (en) 1985-03-12
JPS58210678A (ja) 1983-12-07

Similar Documents

Publication Publication Date Title
DE3381185D1 (de) Verfahren zur herstellung einer vertikalen leistungs-mosfet-struktur.
DE3686315T2 (de) Verfahren zur herstellung einer halbleiterstruktur.
AT382780B (de) Verfahren zur herstellung einer insulinloesung
AT372281B (de) Verfahren zur herstellung einer nutriens-verbindung
DE3381128D1 (de) Verfahren zur herstellung einer isolationszone.
DE3381126D1 (de) Verfahren zur herstellung einer monokristallinen halbleiterschicht.
DE3582143D1 (de) Verfahren zur herstellung einer halbleitervorrichtung.
DE3689164D1 (de) Verfahren zur Herstellung einer elastischen Form.
DE3779802D1 (de) Verfahren zur herstellung einer halbleiteranordnung.
DE3381934D1 (de) Verfahren zur herstellung von shampoos.
DE3484526D1 (de) Verfahren zur herstellung einer halbleiteranordnung.
DE3382369D1 (de) Verfahren zur herstellung von blockcopolyamiden.
DE3580350D1 (de) Verfahren zur herstellung einer frukto-oligosaccharose.
AT389512B (de) Verfahren zur herstellung von 3-chlormethylchinuclidin
AT381060B (de) Verfahren zur herstellung von spanplatten
DE3486144D1 (de) Verfahren zur herstellung einer halbleiteranordnung.
DE3673208D1 (de) Verfahren zur herstellung einer ldd-halbleiteranordnung.
DE3578263D1 (de) Verfahren zur herstellung einer halbleiteranordnung.
DE3677899D1 (de) Verfahren zur herstellung energiereichen materials.
DE3681362D1 (de) Verfahren zur herstellung von formlingen durch schlickergiessen.
DE3783799T2 (de) Verfahren zur herstellung einer halbleiteranordnung.
DE3685220D1 (de) Verfahren zur herstellung einer abdichtung.
DE3667276D1 (de) Verfahren zur herstellung einer azidosulfonylbenzoesaeure.
AT376879B (de) Verfahren zur herstellung einer injektionsloesung
DE3668428D1 (de) Verfahren zur herstellung einer ziehmatrize.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition