DE3578263D1 - Verfahren zur herstellung einer halbleiteranordnung. - Google Patents

Verfahren zur herstellung einer halbleiteranordnung.

Info

Publication number
DE3578263D1
DE3578263D1 DE8585201077T DE3578263T DE3578263D1 DE 3578263 D1 DE3578263 D1 DE 3578263D1 DE 8585201077 T DE8585201077 T DE 8585201077T DE 3578263 T DE3578263 T DE 3578263T DE 3578263 D1 DE3578263 D1 DE 3578263D1
Authority
DE
Germany
Prior art keywords
producing
semiconductor arrangement
semiconductor
arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8585201077T
Other languages
English (en)
Inventor
Henricus Godefridus Rafae Maas
Jan Willem Slotboom
Johannes Arnoldus Appels
Kazimierz Osinksi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of DE3578263D1 publication Critical patent/DE3578263D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66946—Charge transfer devices
    • H01L29/66954—Charge transfer devices with an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42396—Gate electrodes for field effect devices for charge coupled devices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/911—Differential oxidation and etching
DE8585201077T 1984-07-13 1985-07-04 Verfahren zur herstellung einer halbleiteranordnung. Expired - Lifetime DE3578263D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL8402223A NL8402223A (nl) 1984-07-13 1984-07-13 Werkwijze ter vervaardiging van een halfgeleiderinrichting en inrichting, vervaardigd door toepassing daarvan.

Publications (1)

Publication Number Publication Date
DE3578263D1 true DE3578263D1 (de) 1990-07-19

Family

ID=19844211

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585201077T Expired - Lifetime DE3578263D1 (de) 1984-07-13 1985-07-04 Verfahren zur herstellung einer halbleiteranordnung.

Country Status (6)

Country Link
US (1) US4619039A (de)
EP (1) EP0171105B1 (de)
JP (1) JPS6140059A (de)
CA (1) CA1230430A (de)
DE (1) DE3578263D1 (de)
NL (1) NL8402223A (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8501339A (nl) * 1985-05-10 1986-12-01 Philips Nv Halfgeleiderinrichting en werkwijze ter vervaardiging daarvan.
US5017515A (en) * 1989-10-02 1991-05-21 Texas Instruments Incorporated Process for minimizing lateral distance between elements in an integrated circuit by using sidewall spacers
JPH04212472A (ja) * 1990-07-13 1992-08-04 Toshiba Corp 不揮発性半導体記憶装置の製造方法
US5236853A (en) * 1992-02-21 1993-08-17 United Microelectronics Corporation Self-aligned double density polysilicon lines for ROM and EPROM
EP0981164A3 (de) * 1998-08-18 2003-10-15 International Business Machines Corporation Füllung mit niedrigem Widerstand für Kondensator in tiefem Graben
WO2014107608A1 (en) 2013-01-04 2014-07-10 Carbo Ceramics Inc. Electrically conductive proppant and methods for detecting, locating and characterizing the electrically conductive proppant
US11008505B2 (en) 2013-01-04 2021-05-18 Carbo Ceramics Inc. Electrically conductive proppant
WO2018052473A2 (en) 2016-09-15 2018-03-22 Applied Materials, Inc. Contact integration and selective silicide formation methods

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5427113A (en) * 1977-08-02 1979-03-01 Toshiba Corp Arrangement for preventing axle-weight transfer of locomotive
US4348804A (en) * 1978-07-12 1982-09-14 Vlsi Technology Research Association Method of fabricating an integrated circuit device utilizing electron beam irradiation and selective oxidation
CA1129118A (en) * 1978-07-19 1982-08-03 Tetsushi Sakai Semiconductor devices and method of manufacturing the same
US4328611A (en) * 1980-04-28 1982-05-11 Trw Inc. Method for manufacture of an interdigitated collector structure utilizing etch and refill techniques
US4402128A (en) * 1981-07-20 1983-09-06 Rca Corporation Method of forming closely spaced lines or contacts in semiconductor devices
NL8105559A (nl) * 1981-12-10 1983-07-01 Philips Nv Werkwijze voor het aanbrengen van een smalle groef in een substraatgebied, in het bijzonder een halfgeleidersubstraatgebied.
US4424621A (en) * 1981-12-30 1984-01-10 International Business Machines Corporation Method to fabricate stud structure for self-aligned metallization
NL8202686A (nl) * 1982-07-05 1984-02-01 Philips Nv Werkwijze ter vervaardiging van een veldeffektinrichting met geisoleerde stuurelektrode, en inrichting vervaardigd volgens de werkwijze.
NL8302541A (nl) * 1983-07-15 1985-02-01 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting, en halfgeleiderinrichting vervaardigd volgens de werkwijze.
NL8400224A (nl) * 1984-01-25 1985-08-16 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting en inrichting vervaardigd door toepassing daarvan.

Also Published As

Publication number Publication date
US4619039A (en) 1986-10-28
EP0171105B1 (de) 1990-06-13
NL8402223A (nl) 1986-02-03
EP0171105A2 (de) 1986-02-12
CA1230430A (en) 1987-12-15
EP0171105A3 (en) 1986-02-19
JPS6140059A (ja) 1986-02-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee