DE3688057T2 - Halbleitervorrichtung und Methode zur Herstellung. - Google Patents

Halbleitervorrichtung und Methode zur Herstellung.

Info

Publication number
DE3688057T2
DE3688057T2 DE86117777T DE3688057T DE3688057T2 DE 3688057 T2 DE3688057 T2 DE 3688057T2 DE 86117777 T DE86117777 T DE 86117777T DE 3688057 T DE3688057 T DE 3688057T DE 3688057 T2 DE3688057 T2 DE 3688057T2
Authority
DE
Germany
Prior art keywords
manufacture
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE86117777T
Other languages
English (en)
Other versions
DE3688057D1 (de
Inventor
Mike Fu-Shing Chang
George Charles Pifer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Harris Corp
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=25223702&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE3688057(T2) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by General Electric Co filed Critical General Electric Co
Application granted granted Critical
Publication of DE3688057D1 publication Critical patent/DE3688057D1/de
Publication of DE3688057T2 publication Critical patent/DE3688057T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
    • H01L29/66333—Vertical insulated gate bipolar transistors
DE86117777T 1986-01-10 1986-12-19 Halbleitervorrichtung und Methode zur Herstellung. Expired - Fee Related DE3688057T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US81770786A 1986-01-10 1986-01-10

Publications (2)

Publication Number Publication Date
DE3688057D1 DE3688057D1 (de) 1993-04-22
DE3688057T2 true DE3688057T2 (de) 1993-10-07

Family

ID=25223702

Family Applications (1)

Application Number Title Priority Date Filing Date
DE86117777T Expired - Fee Related DE3688057T2 (de) 1986-01-10 1986-12-19 Halbleitervorrichtung und Methode zur Herstellung.

Country Status (4)

Country Link
US (1) US4810665A (de)
EP (1) EP0229362B1 (de)
JP (1) JP2551940B2 (de)
DE (1) DE3688057T2 (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01225164A (ja) * 1988-03-03 1989-09-08 Fuji Electric Co Ltd 絶縁ゲートｍｏｓｆｅｔの製造方法
JPS6449273A (en) * 1987-08-19 1989-02-23 Mitsubishi Electric Corp Semiconductor device and its manufacture
JP2604777B2 (ja) * 1988-01-18 1997-04-30 松下電工株式会社 二重拡散型電界効果半導体装置の製法
JPH0734474B2 (ja) * 1988-03-03 1995-04-12 富士電機株式会社 伝導度変調型ｍｏｓｆｅｔの製造方法
US5118638A (en) * 1988-03-18 1992-06-02 Fuji Electric Co., Ltd. Method for manufacturing MOS type semiconductor devices
KR910004318B1 (ko) * 1988-06-27 1991-06-25 현대전자산업 주식회사 수직형 d mos 트랜지스터의 셀
JPH02163974A (ja) * 1988-12-16 1990-06-25 Mitsubishi Electric Corp 絶縁ゲート型バイポーラトランジスタおよびその製造方法
JPH02281662A (ja) * 1989-04-21 1990-11-19 Mitsubishi Electric Corp 半導体装置
IT1231300B (it) * 1989-07-24 1991-11-28 Sgs Thomson Microelectronics Processo di definizione e realizzazione di una regione attivadi dimensioni molto ridotte in uno strato di materiale semiconduttore
US4931408A (en) * 1989-10-13 1990-06-05 Siliconix Incorporated Method of fabricating a short-channel low voltage DMOS transistor
IT1236994B (it) * 1989-12-29 1993-05-12 Sgs Thomson Microelectronics Processo per la fabbricazione di dispositivi semiconduttori mos di potenza e dispositivi con esso ottenuti
US5182222A (en) * 1991-06-26 1993-01-26 Texas Instruments Incorporated Process for manufacturing a DMOS transistor
US5171705A (en) * 1991-11-22 1992-12-15 Supertex, Inc. Self-aligned structure and process for DMOS transistor
US5284139A (en) * 1991-12-30 1994-02-08 Abbot Laboratories Hemometrix temperature compensation
US5248627A (en) * 1992-03-20 1993-09-28 Siliconix Incorporated Threshold adjustment in fabricating vertical dmos devices
US5426069A (en) * 1992-04-09 1995-06-20 Dalsa Inc. Method for making silicon-germanium devices using germanium implantation
JP3297129B2 (ja) * 1992-10-08 2002-07-02 株式会社東芝 半導体装置
US5369045A (en) * 1993-07-01 1994-11-29 Texas Instruments Incorporated Method for forming a self-aligned lateral DMOS transistor
EP0661755A1 (de) * 1993-12-28 1995-07-05 AT&T Corp. Hochspannung-Halbleiteranordnung mit verbesserter elektrischer Robustheit und verminderter Zellschrittweite
KR0158608B1 (ko) * 1993-12-29 1998-12-01 김광호 3단자 전력 절연 게이트 트랜지스터 및 그 제조방법
US5422288A (en) * 1994-05-19 1995-06-06 Harris Corporation Method of doping a JFET region in a MOS-gated semiconductor device
US5474946A (en) * 1995-02-17 1995-12-12 International Rectifier Corporation Reduced mask process for manufacture of MOS gated devices
JP3279151B2 (ja) * 1995-10-23 2002-04-30 トヨタ自動車株式会社 半導体装置及びその製造方法
US7736976B2 (en) * 2001-10-04 2010-06-15 Vishay General Semiconductor Llc Method for fabricating a power semiconductor device having a voltage sustaining layer with a terraced trench facilitating formation of floating islands

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52132684A (en) * 1976-04-29 1977-11-07 Sony Corp Insulating gate type field effect transistor
US4705759B1 (en) * 1978-10-13 1995-02-14 Int Rectifier Corp High power mosfet with low on-resistance and high breakdown voltage
US4364073A (en) * 1980-03-25 1982-12-14 Rca Corporation Power MOSFET with an anode region
US4345265A (en) * 1980-04-14 1982-08-17 Supertex, Inc. MOS Power transistor with improved high-voltage capability
JPS5816571A (ja) * 1981-07-23 1983-01-31 Toshiba Corp 半導体装置の製造方法
DE3240162C2 (de) * 1982-01-04 1996-08-01 Gen Electric Verfahren zum Herstellen eines doppelt-diffundierten Leistungs-MOSFET mit Source-Basis-Kurzschluß
IE55992B1 (en) * 1982-04-05 1991-03-13 Gen Electric Insulated gate rectifier with improved current-carrying capability
US4503598A (en) * 1982-05-20 1985-03-12 Fairchild Camera & Instrument Corporation Method of fabricating power MOSFET structure utilizing self-aligned diffusion and etching techniques
US4443931A (en) * 1982-06-28 1984-04-24 General Electric Company Method of fabricating a semiconductor device with a base region having a deep portion
DE3224642A1 (de) * 1982-07-01 1984-01-05 Siemens AG, 1000 Berlin und 8000 München Igfet mit injektorzone
US4466176A (en) * 1982-08-09 1984-08-21 General Electric Company Process for manufacturing insulated-gate semiconductor devices with integral shorts
US4417385A (en) * 1982-08-09 1983-11-29 General Electric Company Processes for manufacturing insulated-gate semiconductor devices with integral shorts
US4532534A (en) * 1982-09-07 1985-07-30 Rca Corporation MOSFET with perimeter channel
JPS59125664A (ja) * 1983-01-07 1984-07-20 Toshiba Corp 半導体装置の製造方法
US4587713A (en) * 1984-02-22 1986-05-13 Rca Corporation Method for making vertical MOSFET with reduced bipolar effects
JPS60196974A (ja) * 1984-03-19 1985-10-05 Toshiba Corp 導電変調型ｍｏｓｆｅｔ
US4639762A (en) * 1984-04-30 1987-01-27 Rca Corporation MOSFET with reduced bipolar effects
US4672407A (en) * 1984-05-30 1987-06-09 Kabushiki Kaisha Toshiba Conductivity modulated MOSFET
US4631564A (en) * 1984-10-23 1986-12-23 Rca Corporation Gate shield structure for power MOS device
US4641162A (en) * 1985-12-11 1987-02-03 General Electric Company Current limited insulated gate device
JP2880004B2 (ja) * 1991-08-15 1999-04-05 松下電器産業株式会社 車載用地図表示装置

Also Published As

Publication number Publication date
EP0229362A3 (en) 1989-08-30
JPS62203380A (ja) 1987-09-08
EP0229362A2 (de) 1987-07-22
DE3688057D1 (de) 1993-04-22
JP2551940B2 (ja) 1996-11-06
EP0229362B1 (de) 1993-03-17
US4810665A (en) 1989-03-07

Similar Documents

Publication Publication Date Title
DE3688057T2 (de) Halbleitervorrichtung und Methode zur Herstellung.
DE68919304D1 (de) Leitfähige Zusammensetzung und Methode zur Herstellung derselben.
DE3650323T2 (de) VLSI-Chip und Verfahren zur Herstellung.
DE3689735D1 (de) Verfahren und Gerät zur Herstellung von Halbleitervorrichtungen.
DE3888885D1 (de) Halbleiteranordnung und verfahren zur herstellung.
DE3788015D1 (de) Lautsprecherabdeckung und Verfahren zur Herstellung derselben.
DE69002432T2 (de) Diamant-Halbleiter-Bauteil und Methode zu seiner Herstellung.
ATE108067T1 (de) Impfstoff und verfahren zur herstellung.
DE3750019D1 (de) Selbstklebender Polysiloxanelastomer und Verfahren zur Herstellung.
IT8722659A0 (it) Dispositivo semiconduttore e metodo di fabbricazione dello stesso.
DE68908030T2 (de) Katheter und Methoden zur Herstellung.
GB2198285B (en) Bipolar transistor and method of manufacturing the same
DE3751206D1 (de) Dünnschicht-Elektrolumineszentenvorrichtung und Verfahren zur Herstellung derselben.
DE69224819T2 (de) Methode zur Herstellung von Halbleiterchips
DE68922965T2 (de) Methode zur Herstellung supraleitender keramischer Drähte.
DE3856150T2 (de) Halbleiteranordnung und verfahren zur herstellung
DE3776855D1 (de) Vliesstoffe und verfahren zur herstellung derselben.
DE3784518T3 (de) Medizinisches material und verfahren zur herstellung.
DE3750779D1 (de) Enzym-Sensor und Verfahren zur Herstellung desselben.
DE3788841D1 (de) Halbleiterlaservorrichtung und Verfahren zur Herstellung derselben.
DE3769498D1 (de) Methode und geraet zur durchfuehrung der elektrophorese und der anschliessenden uebertragung.
DE3764838D1 (de) Methode zur herstellung von aktiven antioxidanzien.
DE3887580D1 (de) Halbleiterlaservorrichtungen und Verfahren zur Herstellung derselben.
DE69016230D1 (de) Halbleiterlaser und Verfahren zur Herstellung desselben.
DE69031401T2 (de) Halbleiterlaser, Halbleiter-Wafer und Verfahren zur Herstellung derselben

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: HARRIS CORP., MELBOURNE, FLA., US

8339 Ceased/non-payment of the annual fee