DE3215101C2 - Verfahren zum Herstellen einer Öffnung mit abgeschrägten Kanten in einer Passivierschicht - Google Patents
Verfahren zum Herstellen einer Öffnung mit abgeschrägten Kanten in einer PassivierschichtInfo
- Publication number
- DE3215101C2 DE3215101C2 DE3215101A DE3215101A DE3215101C2 DE 3215101 C2 DE3215101 C2 DE 3215101C2 DE 3215101 A DE3215101 A DE 3215101A DE 3215101 A DE3215101 A DE 3215101A DE 3215101 C2 DE3215101 C2 DE 3215101C2
- Authority
- DE
- Germany
- Prior art keywords
- layer
- temperature
- silicon oxide
- doped
- semiconductor body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H10P95/00—
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/978—Semiconductor device manufacturing: process forming tapered edges on substrate or adjacent layers
Landscapes
- Engineering & Computer Science (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/258,431 US4349584A (en) | 1981-04-28 | 1981-04-28 | Process for tapering openings in ternary glass coatings |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE3215101A1 DE3215101A1 (de) | 1982-11-11 |
| DE3215101C2 true DE3215101C2 (de) | 1995-06-22 |
Family
ID=22980524
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE3215101A Expired - Lifetime DE3215101C2 (de) | 1981-04-28 | 1982-04-23 | Verfahren zum Herstellen einer Öffnung mit abgeschrägten Kanten in einer Passivierschicht |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US4349584A (cg-RX-API-DMAC10.html) |
| JP (1) | JPS57186343A (cg-RX-API-DMAC10.html) |
| CA (1) | CA1189426A (cg-RX-API-DMAC10.html) |
| DE (1) | DE3215101C2 (cg-RX-API-DMAC10.html) |
| GB (1) | GB2097582B (cg-RX-API-DMAC10.html) |
| IN (1) | IN155987B (cg-RX-API-DMAC10.html) |
| IT (1) | IT1218317B (cg-RX-API-DMAC10.html) |
| SE (1) | SE457179B (cg-RX-API-DMAC10.html) |
| YU (1) | YU44340B (cg-RX-API-DMAC10.html) |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4455325A (en) * | 1981-03-16 | 1984-06-19 | Fairchild Camera And Instrument Corporation | Method of inducing flow or densification of phosphosilicate glass for integrated circuits |
| US4433008A (en) * | 1982-05-11 | 1984-02-21 | Rca Corporation | Doped-oxide diffusion of phosphorus using borophosphosilicate glass |
| US4420503A (en) * | 1982-05-17 | 1983-12-13 | Rca Corporation | Low temperature elevated pressure glass flow/re-flow process |
| US4476621A (en) * | 1983-02-01 | 1984-10-16 | Gte Communications Products Corporation | Process for making transistors with doped oxide densification |
| US4575921A (en) * | 1983-11-04 | 1986-03-18 | General Motors Corporation | Silicon nitride formation and use in self-aligned semiconductor device manufacturing method |
| US4528211A (en) * | 1983-11-04 | 1985-07-09 | General Motors Corporation | Silicon nitride formation and use in self-aligned semiconductor device manufacturing method |
| US4582745A (en) * | 1984-01-17 | 1986-04-15 | Rca Corporation | Dielectric layers in multilayer refractory metallization structure |
| DE3425531A1 (de) * | 1984-07-11 | 1986-01-16 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum verfliessenlassen von dotierten sio(pfeil abwaerts)2(pfeil abwaerts)-schichten bei der herstellung von integrierten mos-halbleiterschaltungen |
| US4546016A (en) * | 1984-08-06 | 1985-10-08 | Rca Corporation | Deposition of borophosphosilicate glass |
| GB2168340B (en) * | 1984-12-13 | 1988-11-02 | Stc Plc | Contacting an integrated circuit with a metallisation pattern |
| US4743564A (en) * | 1984-12-28 | 1988-05-10 | Kabushiki Kaisha Toshiba | Method for manufacturing a complementary MOS type semiconductor device |
| ATE64237T1 (de) * | 1985-05-22 | 1991-06-15 | Siemens Ag | Verfahren zum herstellen von mit bor und phosphor dotierten siliziumoxid-schichten fuer integrierte halbleiterschaltungen. |
| GB8523373D0 (en) * | 1985-09-21 | 1985-10-23 | Stc Plc | Via profiling in integrated circuits |
| US4755479A (en) * | 1986-02-17 | 1988-07-05 | Fujitsu Limited | Manufacturing method of insulated gate field effect transistor using reflowable sidewall spacers |
| JPS6381948A (ja) * | 1986-09-26 | 1988-04-12 | Toshiba Corp | 多層配線半導体装置 |
| EP0369336A3 (en) * | 1988-11-14 | 1990-08-22 | National Semiconductor Corporation | Process for fabricating bipolar and cmos transistors on a common substrate |
| JPH0793354B2 (ja) * | 1988-11-28 | 1995-10-09 | 株式会社東芝 | 半導体装置の製造方法 |
| US5747389A (en) * | 1991-04-30 | 1998-05-05 | Intel Corporation | Crack resistant passivation layer |
| US5424570A (en) * | 1992-01-31 | 1995-06-13 | Sgs-Thomson Microelectronics, Inc. | Contact structure for improving photoresist adhesion on a dielectric layer |
| EP0562625B1 (en) * | 1992-03-27 | 1997-06-04 | Matsushita Electric Industrial Co., Ltd. | A semiconductor device and process |
| US6239017B1 (en) | 1998-09-18 | 2001-05-29 | Industrial Technology Research Institute | Dual damascene CMP process with BPSG reflowed contact hole |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3481781A (en) * | 1967-03-17 | 1969-12-02 | Rca Corp | Silicate glass coating of semiconductor devices |
| US3925572A (en) * | 1972-10-12 | 1975-12-09 | Ncr Co | Multilevel conductor structure and method |
| US3833919A (en) * | 1972-10-12 | 1974-09-03 | Ncr | Multilevel conductor structure and method |
| JPS5922378B2 (ja) * | 1975-08-13 | 1984-05-26 | 株式会社東芝 | 半導体装置の製造方法 |
| US4097889A (en) * | 1976-11-01 | 1978-06-27 | Rca Corporation | Combination glass/low temperature deposited Siw Nx Hy O.sub.z |
| US4091407A (en) * | 1976-11-01 | 1978-05-23 | Rca Corporation | Combination glass/low temperature deposited Siw Nx Hy O.sub.z |
| US4273805A (en) * | 1978-06-19 | 1981-06-16 | Rca Corporation | Passivating composite for a semiconductor device comprising a silicon nitride (Si1 3N4) layer and phosphosilicate glass (PSG) layer |
| GB2031225B (en) * | 1978-09-15 | 1983-07-20 | Westinghouse Electric Corp | Glass-sealed thyristor junctions |
| CA1174285A (en) * | 1980-04-28 | 1984-09-11 | Michelangelo Delfino | Laser induced flow of integrated circuit structure materials |
-
1981
- 1981-04-28 US US06/258,431 patent/US4349584A/en not_active Expired - Lifetime
- 1981-07-20 IN IN816/CAL/81A patent/IN155987B/en unknown
-
1982
- 1982-03-16 CA CA000398421A patent/CA1189426A/en not_active Expired
- 1982-03-29 IT IT20463/82A patent/IT1218317B/it active
- 1982-04-19 GB GB8211266A patent/GB2097582B/en not_active Expired
- 1982-04-23 DE DE3215101A patent/DE3215101C2/de not_active Expired - Lifetime
- 1982-04-26 SE SE8202597A patent/SE457179B/sv not_active IP Right Cessation
- 1982-04-27 JP JP57071123A patent/JPS57186343A/ja active Pending
- 1982-04-27 YU YU913/82A patent/YU44340B/xx unknown
Also Published As
| Publication number | Publication date |
|---|---|
| IN155987B (cg-RX-API-DMAC10.html) | 1985-04-20 |
| CA1189426A (en) | 1985-06-25 |
| SE457179B (sv) | 1988-12-05 |
| GB2097582A (en) | 1982-11-03 |
| GB2097582B (en) | 1985-10-30 |
| YU44340B (en) | 1990-06-30 |
| DE3215101A1 (de) | 1982-11-11 |
| IT8220463A0 (it) | 1982-03-29 |
| SE8202597L (sv) | 1982-10-29 |
| JPS57186343A (en) | 1982-11-16 |
| YU91382A (en) | 1985-04-30 |
| IT1218317B (it) | 1990-04-12 |
| US4349584A (en) | 1982-09-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE3215101C2 (de) | Verfahren zum Herstellen einer Öffnung mit abgeschrägten Kanten in einer Passivierschicht | |
| DE3219441C2 (cg-RX-API-DMAC10.html) | ||
| DE2808257C3 (de) | Halbleitervorrichtung und verfahren zu ihrer herstellung | |
| DE2718894C2 (de) | Verfahren zur Herstellung einer Halbleiteranordnung | |
| DE4010618C2 (de) | Verfahren zur Herstellung einer Halbleitervorrichtung | |
| DE2618445C2 (de) | Verfahren zum Herstellen eines bipolaren Transistors | |
| DE68918565T2 (de) | Verfahren zur herstellung von sonnenzellenkontakten. | |
| DE69323979T2 (de) | Verfahren zur Herstellung einer Halbleitervorrichtung | |
| DE2229457A1 (de) | Verfahren zur herstellung eines halbleiterbauelementes | |
| DE2928923C2 (cg-RX-API-DMAC10.html) | ||
| DE3618000A1 (de) | Verfahren zur herstellung von transistoren auf einem siliziumsubstrat | |
| DE3490007T1 (de) | Verfahren zur Herstellung von Solarzellen | |
| EP0000743A1 (de) | Verfahren zum Herstellen von Tantal-Kontakten auf einem aus N-leitendem Silicium bestehenden Halbleitersubstrat | |
| DE7233274U (de) | Polykristalline siliciumelektrode fuer halbleiteranordnungen | |
| DE2033532C3 (de) | Halbleiteranordnung mit einer Passivierungsschicht aus Siliziumdioxid | |
| EP0005185A1 (de) | Verfahren zum gleichzeitigen Herstellen von Schottky-Sperrschichtdioden und ohmschen Kontakten nach dotierten Halbleiterzonen | |
| DE2517690A1 (de) | Verfahren zum herstellen eines halbleiterbauteils | |
| EP0012220A1 (de) | Verfahren zur Herstellung eines Schottky-Kontakts mit selbstjustierter Schutzringzone | |
| DE2920444A1 (de) | Halbleiterbauelement und verfahren zu seiner herstellung | |
| DE3109074C2 (cg-RX-API-DMAC10.html) | ||
| DE69404593T2 (de) | Verfahren zur Herstellung einer Halbleiteranordnung, die einen Halbleiterkörper mit Feldisolierungszonen aus mit Isolierstoff gefüllten Graben enthält | |
| DE2448478A1 (de) | Verfahren zum herstellen von pn-halbleiteruebergaengen | |
| DE1589899A1 (de) | Halbleiteranordnung mit isolierender Oberflaechenschicht auf einem Halbleitersubstrat und Verfahren zu ihrer Herstellung | |
| DE2738961A1 (de) | Verfahren zur herstellung einer integrierten halbleiterschaltung mit luftisolation | |
| DE2839933A1 (de) | Integrierte schaltung mit isolierendem substrat |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8110 | Request for examination paragraph 44 | ||
| 8125 | Change of the main classification |
Ipc: H01L 21/324 |
|
| 8125 | Change of the main classification |
Ipc: H01L 21/3105 |
|
| D2 | Grant after examination | ||
| 8364 | No opposition during term of opposition |