DE3147535C2 - - Google Patents

Info

Publication number
DE3147535C2
DE3147535C2 DE3147535A DE3147535A DE3147535C2 DE 3147535 C2 DE3147535 C2 DE 3147535C2 DE 3147535 A DE3147535 A DE 3147535A DE 3147535 A DE3147535 A DE 3147535A DE 3147535 C2 DE3147535 C2 DE 3147535C2
Authority
DE
Germany
Prior art keywords
thin layer
dopant
layer
silicon
diffusion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE3147535A
Other languages
German (de)
English (en)
Other versions
DE3147535A1 (de
Inventor
Jiro Yokohama Kanagawa Jp Ohshima
Yutaka Yokosuka Kanagawa Jp Koshino
Takashi Kamakura Kanagawa Jp Ajima
Toshio Yokosuka Kanagawa Jp Yonezawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE3147535A1 publication Critical patent/DE3147535A1/de
Application granted granted Critical
Publication of DE3147535C2 publication Critical patent/DE3147535C2/de
Granted legal-status Critical Current

Links

Classifications

    • H10P30/40—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/3115—Doping the insulating layers
    • H01L21/31155—Doping the insulating layers by ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H10P30/20—
    • H10P32/141—
    • H10P32/171—

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Formation Of Insulating Films (AREA)
  • Thyristors (AREA)
  • Recrystallisation Techniques (AREA)
DE19813147535 1980-12-04 1981-12-01 Verfahren zum herstellen einer halbleitervorrichtung Granted DE3147535A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55171304A JPS5795625A (en) 1980-12-04 1980-12-04 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
DE3147535A1 DE3147535A1 (de) 1982-08-05
DE3147535C2 true DE3147535C2 (Direct) 1988-07-28

Family

ID=15920793

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19813147535 Granted DE3147535A1 (de) 1980-12-04 1981-12-01 Verfahren zum herstellen einer halbleitervorrichtung

Country Status (3)

Country Link
US (1) US4426234A (Direct)
JP (1) JPS5795625A (Direct)
DE (1) DE3147535A1 (Direct)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4804634A (en) * 1981-04-24 1989-02-14 National Semiconductor Corporation Integrated circuit lateral transistor structure
JPS58125823A (ja) * 1982-01-22 1983-07-27 Hitachi Ltd 半導体装置の製造方法
JPS5935425A (ja) * 1982-08-23 1984-02-27 Toshiba Corp 半導体装置の製造方法
JPS6215864A (ja) * 1985-07-15 1987-01-24 Hitachi Ltd 太陽電池の製造方法
JPS6393153A (ja) * 1986-10-07 1988-04-23 Toshiba Corp 半導体装置の製造方法
JPS63144517A (ja) * 1986-12-09 1988-06-16 Nec Corp 半導体装置の製造方法
JPS6427458A (en) * 1987-07-22 1989-01-30 Cubic Eng Kk Healthy drink
US6352940B1 (en) * 1998-06-26 2002-03-05 Intel Corporation Semiconductor passivation deposition process for interfacial adhesion

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS513613A (en) * 1974-06-05 1976-01-13 Idn Invention Dev Novelties Teepukasetsutooyobi sonoruijibutsunotameno horudaa
JPS5272162A (en) * 1975-12-12 1977-06-16 Toshiba Corp Production of semiconductor device
JPS55128828A (en) * 1979-03-28 1980-10-06 Matsushita Electronics Corp Manufacture of semiconductor device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2449688C3 (de) 1974-10-18 1980-07-10 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung einer dotierten Zone eines Leitfähigkeitstyps in einem Halbleiterkörper
JPS5950113B2 (ja) 1975-11-05 1984-12-06 株式会社東芝 半導体装置
US4063973A (en) 1975-11-10 1977-12-20 Tokyo Shibaura Electric Co., Ltd. Method of making a semiconductor device
US4102715A (en) 1975-12-19 1978-07-25 Matsushita Electric Industrial Co., Ltd. Method for diffusing an impurity into a semiconductor body
FR2417853A1 (fr) 1978-02-17 1979-09-14 Thomson Csf Procede de realisation d'un transistor de type mos et transistor realise selon ce procede
JPS5586151A (en) 1978-12-23 1980-06-28 Chiyou Lsi Gijutsu Kenkyu Kumiai Manufacture of semiconductor integrated circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS513613A (en) * 1974-06-05 1976-01-13 Idn Invention Dev Novelties Teepukasetsutooyobi sonoruijibutsunotameno horudaa
JPS5272162A (en) * 1975-12-12 1977-06-16 Toshiba Corp Production of semiconductor device
JPS55128828A (en) * 1979-03-28 1980-10-06 Matsushita Electronics Corp Manufacture of semiconductor device

Non-Patent Citations (5)

* Cited by examiner, † Cited by third party
Title
Patents Abstr of Japan & JP 52-072162 A *
Patents Abstr. of Japan, Bd. 4, Nr. 185, 1980, E-38 & JP 55-128 828 A *
US-Z.: J. Appl. Phys., Bd. 48, Nr. 5, 1977, S. 1815-1821 *
US-Z.: Solid-State Electronics, Bd. 18, Nr. 12-D, 1975, S. 1085-1088 *
US-Z.: Solid-State Eletronics, Bd. 20, Nr. 3-D, 1977, S. 213-217 *

Also Published As

Publication number Publication date
JPS6227727B2 (Direct) 1987-06-16
DE3147535A1 (de) 1982-08-05
US4426234A (en) 1984-01-17
JPS5795625A (en) 1982-06-14

Similar Documents

Publication Publication Date Title
DE4021377C2 (de) Verfahren zur Herstellung einer Halbleiteranordnung
DE4406849C2 (de) Verfahren zur Herstellung eines MOS-Transistors mit einem einen flachen Übergang aufweisenden Source/Drain-Bereich und einer Silicidschicht
EP0018520B1 (de) Verfahren zur vollständigen Ausheilung von Gitterdefekten in durch Ionenimplantation von Phosphor erzeugten N-leitenden Zonen einer Siliciumhalbleitervorrichtung und zugehörige Siliciumhalbleitervorrichtung
EP0022474A1 (de) Verfahren zum Herstellen von niederohmigen, diffundierten Bereichen bei der Silizium-Gate-Technologie
DE3688057T2 (de) Halbleitervorrichtung und Methode zur Herstellung.
DE2512373A1 (de) Sperrschicht-oberflaechen-feldeffekt- transistor
DE3618000A1 (de) Verfahren zur herstellung von transistoren auf einem siliziumsubstrat
EP0032550A1 (de) Verfahren zur Herstellung einer bipolaren, vertikalen PNP-Transistorstruktur
DE19605633A1 (de) Verfahren zur Herstellung von Dioden mit verbesserter Durchbruchspannungscharakteristik
DE2615754C2 (Direct)
DE2951504C2 (de) Verfahren zum Herstellen einer integrierten Schaltungsanordnung mit einem einen inneren und einen äußeren Basisbereich aufweisenden bipolaren Transistor
DE2641752B2 (de) Verfahren zur Herstellung eines Feldeffekttransistors
DE3047342A1 (de) Polykristalliner siliziumfilm und verfahren zu seiner herstellung
DE1950069A1 (de) Verfahren zur Herstellung von Halbleitervorrichtungen
DE3147535C2 (Direct)
DE2617293C3 (de) Verfahren zur Herstellung eines Halbleiterbauelements
DE4244115C2 (de) Halbleitervorrichtung und Verfahren zum Herstellen der Halbleitervorrichtung
DE69105621T2 (de) Herstellungsverfahren eines Kanals in MOS-Halbleiteranordnung.
DE1814747C2 (de) Verfahren zum Herstellen von Feldefekttransistoren
DE19608504A1 (de) Isolierschicht-Feldeffekttransistor und Herstellungsverfahren dafür
DE3540452C2 (de) Verfahren zur Herstellung eines Dünnschichttransistors
DE69023582T2 (de) Verfahren zur Herstellung eines Halbleiterelementes mittels Ionen-Implantation.
DE69025784T2 (de) Nichtflüchtige Speicher-Halbleiteranordnung
EP1050076B1 (de) Verfahren zur herstellung von dioden
DE2832153A1 (de) Verfahren zur herstellung von halbleitervorrichtungen

Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8125 Change of the main classification

Ipc: H01L 21/265

8126 Change of the secondary classification

Ipc: ENTFAELLT

8127 New person/name/address of the applicant

Owner name: KABUSHIKI KAISHA TOSHIBA, KAWASAKI, KANAGAWA, JP

D2 Grant after examination
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Free format text: BLUMBACH, KRAMER & PARTNER, 81245 MUENCHEN

8339 Ceased/non-payment of the annual fee