DE3132645C2 - - Google Patents

Info

Publication number
DE3132645C2
DE3132645C2 DE3132645A DE3132645A DE3132645C2 DE 3132645 C2 DE3132645 C2 DE 3132645C2 DE 3132645 A DE3132645 A DE 3132645A DE 3132645 A DE3132645 A DE 3132645A DE 3132645 C2 DE3132645 C2 DE 3132645C2
Authority
DE
Germany
Prior art keywords
layer
glass
sio
zno
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE3132645A
Other languages
German (de)
English (en)
Other versions
DE3132645A1 (de
Inventor
Seiichi Suwa Nagano Jp Iwamatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suwa Seikosha KK
Original Assignee
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP55115026A external-priority patent/JPS5739539A/ja
Priority claimed from JP11502780A external-priority patent/JPS5739554A/ja
Application filed by Suwa Seikosha KK filed Critical Suwa Seikosha KK
Publication of DE3132645A1 publication Critical patent/DE3132645A1/de
Application granted granted Critical
Publication of DE3132645C2 publication Critical patent/DE3132645C2/de
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02129Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291Oxides or nitrides or carbides, e.g. ceramics, glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3171Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Thin Film Transistor (AREA)
DE19813132645 1980-08-21 1981-08-18 Halbleiterelement und verfahren zur herstellung einer mehrschichtverdrahtung bei einem solchen Granted DE3132645A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP55115026A JPS5739539A (en) 1980-08-21 1980-08-21 Semiconductor device
JP11502780A JPS5739554A (en) 1980-08-21 1980-08-21 Multilayer wiring method

Publications (2)

Publication Number Publication Date
DE3132645A1 DE3132645A1 (de) 1982-06-09
DE3132645C2 true DE3132645C2 (nl) 1991-01-10

Family

ID=26453643

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19813132645 Granted DE3132645A1 (de) 1980-08-21 1981-08-18 Halbleiterelement und verfahren zur herstellung einer mehrschichtverdrahtung bei einem solchen

Country Status (4)

Country Link
DE (1) DE3132645A1 (nl)
FR (1) FR2489042B1 (nl)
GB (1) GB2082838B (nl)
NL (1) NL188775C (nl)

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL109459C (nl) * 1960-01-26
US3511703A (en) * 1963-09-20 1970-05-12 Motorola Inc Method for depositing mixed oxide films containing aluminum oxide
GB1114556A (en) * 1965-11-26 1968-05-22 Corning Glass Works Ceramic article and method of making it
US3475210A (en) * 1966-05-06 1969-10-28 Fairchild Camera Instr Co Laminated passivating structure
FR2024124A1 (nl) * 1968-11-25 1970-08-28 Ibm
US3752701A (en) * 1970-07-27 1973-08-14 Gen Instrument Corp Glass for coating semiconductors, and semiconductor coated therewith
US3887733A (en) * 1974-04-24 1975-06-03 Motorola Inc Doped oxide reflow process
JPS51144183A (en) * 1975-06-06 1976-12-10 Hitachi Ltd Semiconductor element containing surface protection film
DE2606029C3 (de) * 1976-02-14 1980-03-06 Jenaer Glaswerk Schott & Gen., 6500 Mainz Composit-Passivierungsglas auf der Basis PbO - B2 O3 - (SiO2 - Al2 O3 ) mit einem thermischen Ausdehnungskoeffizienten (20-300 Grad C) von bis zu 75 mal 10 7 /Grad C für Silicium-Halbleiterbauelemente mit
DE2611059A1 (de) * 1976-03-16 1977-09-29 Siemens Ag Gehaeuseloses halbleiterbauelement mit doppelwaermesenke
JPS583380B2 (ja) * 1977-03-04 1983-01-21 株式会社日立製作所 半導体装置とその製造方法
JPS5425178A (en) * 1977-07-27 1979-02-24 Fujitsu Ltd Manufacture for semiconductor device

Also Published As

Publication number Publication date
GB2082838B (en) 1984-07-11
NL8103007A (nl) 1982-03-16
GB2082838A (en) 1982-03-10
NL188775C (nl) 1992-09-16
DE3132645A1 (de) 1982-06-09
NL188775B (nl) 1992-04-16
FR2489042A1 (fr) 1982-02-26
FR2489042B1 (fr) 1986-09-26

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
8127 New person/name/address of the applicant

Owner name: KABUSHIKI KAISHA SUWA SEIKOSHA, SHINJUKU, TOKIO-TO

D2 Grant after examination
8380 Miscellaneous part iii

Free format text: DIE ENTGEGENGEHALTENE DRUCKSCHRIFT "US 31 13 879" AENDERN IN "US 31 13 878"

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee