JPS5739539A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5739539A
JPS5739539A JP55115026A JP11502680A JPS5739539A JP S5739539 A JPS5739539 A JP S5739539A JP 55115026 A JP55115026 A JP 55115026A JP 11502680 A JP11502680 A JP 11502680A JP S5739539 A JPS5739539 A JP S5739539A
Authority
JP
Japan
Prior art keywords
substrate
film
gate
oc2h5
sio2
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55115026A
Other languages
Japanese (ja)
Inventor
Seiichi Iwamatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP55115026A priority Critical patent/JPS5739539A/en
Priority to NLAANVRAGE8103007,A priority patent/NL188775C/en
Priority to GB8120808A priority patent/GB2082838B/en
Priority to FR8115610A priority patent/FR2489042B1/en
Priority to DE19813132645 priority patent/DE3132645A1/en
Publication of JPS5739539A publication Critical patent/JPS5739539A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

PURPOSE:To improve moisture resistant property of a semiconductor device and to make its surface smooth, by a method wherein a ZnO-SiO2-B2O3 zinc oxide glass film is provided on a protective film formed on the surface of a silicone substrate. CONSTITUTION:A field oxide film 2, a gate oxide film 3, a gate electrode 4 which consists of a polycrystalline silicone film, a source region 6 and a drain region 7 are formed on a P type silicone substrate by a conventional method. Then mixture of oxygen and the gas which consists of liquid material of Zn(C2H5)2, Si(OC2H5)4 and B(OC2H5)3 gasified by inhaling nitrogen is sprayed on the surface of the substrate heated at approximately 400 deg.C so that a highly moisture resistant ZnO-SiO2- B2O3 glass layer is formed to the thickness approximately 0.5mum. Finally aperture for source, gate and drain contact are made and the substrate is heated at 600- 700 deg.C. Then the glass layer 8 softens and the surface of the substrate becomes smooth.
JP55115026A 1980-08-21 1980-08-21 Semiconductor device Pending JPS5739539A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP55115026A JPS5739539A (en) 1980-08-21 1980-08-21 Semiconductor device
NLAANVRAGE8103007,A NL188775C (en) 1980-08-21 1981-06-22 METHOD FOR MANUFACTURING A SEMI-CONDUCTOR MULTIPLE WIRING LAYER SEPARATED BY INSULATING GLASS LAYERS.
GB8120808A GB2082838B (en) 1980-08-21 1981-07-06 Semiconductor device with a zinc oxide glass layer
FR8115610A FR2489042B1 (en) 1980-08-21 1981-08-12 SEMICONDUCTOR DEVICE HAVING A MULTI-LAYER INTERCONNECTION STRUCTURE AND MANUFACTURING METHOD THEREOF
DE19813132645 DE3132645A1 (en) 1980-08-21 1981-08-18 SEMICONDUCTOR ELEMENT AND METHOD FOR PRODUCING MULTILAYER WIRING IN SUCH A

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55115026A JPS5739539A (en) 1980-08-21 1980-08-21 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5739539A true JPS5739539A (en) 1982-03-04

Family

ID=14652378

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55115026A Pending JPS5739539A (en) 1980-08-21 1980-08-21 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5739539A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0732150B2 (en) * 1989-11-13 1995-04-10 フラウンホファー―ゲゼルシャフト ツアフェルデルング デア アンゲバンテン フォルシュング アインゲトラゲナー フェライン Method for manufacturing silicate layer of integrated circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS506143A (en) * 1973-05-21 1975-01-22
JPS5473816A (en) * 1977-11-24 1979-06-13 Hitachi Ltd Glass composition for stabilizing semiconductor device surface

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS506143A (en) * 1973-05-21 1975-01-22
JPS5473816A (en) * 1977-11-24 1979-06-13 Hitachi Ltd Glass composition for stabilizing semiconductor device surface

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0732150B2 (en) * 1989-11-13 1995-04-10 フラウンホファー―ゲゼルシャフト ツアフェルデルング デア アンゲバンテン フォルシュング アインゲトラゲナー フェライン Method for manufacturing silicate layer of integrated circuit

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