DE3132645A1 - Halbleiterelement und verfahren zur herstellung einer mehrschichtverdrahtung bei einem solchen - Google Patents

Halbleiterelement und verfahren zur herstellung einer mehrschichtverdrahtung bei einem solchen

Info

Publication number
DE3132645A1
DE3132645A1 DE19813132645 DE3132645A DE3132645A1 DE 3132645 A1 DE3132645 A1 DE 3132645A1 DE 19813132645 DE19813132645 DE 19813132645 DE 3132645 A DE3132645 A DE 3132645A DE 3132645 A1 DE3132645 A1 DE 3132645A1
Authority
DE
Germany
Prior art keywords
wiring
aluminum
glass
layer
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19813132645
Other languages
German (de)
English (en)
Other versions
DE3132645C2 (enrdf_load_stackoverflow
Inventor
Seiichi Suwa Nagano Iwamatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suwa Seikosha KK
Original Assignee
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP55115026A external-priority patent/JPS5739539A/ja
Priority claimed from JP11502780A external-priority patent/JPS5739554A/ja
Application filed by Suwa Seikosha KK filed Critical Suwa Seikosha KK
Publication of DE3132645A1 publication Critical patent/DE3132645A1/de
Application granted granted Critical
Publication of DE3132645C2 publication Critical patent/DE3132645C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Thin Film Transistor (AREA)
  • Formation Of Insulating Films (AREA)
DE19813132645 1980-08-21 1981-08-18 Halbleiterelement und verfahren zur herstellung einer mehrschichtverdrahtung bei einem solchen Granted DE3132645A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP55115026A JPS5739539A (en) 1980-08-21 1980-08-21 Semiconductor device
JP11502780A JPS5739554A (en) 1980-08-21 1980-08-21 Multilayer wiring method

Publications (2)

Publication Number Publication Date
DE3132645A1 true DE3132645A1 (de) 1982-06-09
DE3132645C2 DE3132645C2 (enrdf_load_stackoverflow) 1991-01-10

Family

ID=26453643

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19813132645 Granted DE3132645A1 (de) 1980-08-21 1981-08-18 Halbleiterelement und verfahren zur herstellung einer mehrschichtverdrahtung bei einem solchen

Country Status (4)

Country Link
DE (1) DE3132645A1 (enrdf_load_stackoverflow)
FR (1) FR2489042B1 (enrdf_load_stackoverflow)
GB (1) GB2082838B (enrdf_load_stackoverflow)
NL (1) NL188775C (enrdf_load_stackoverflow)

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3113878A (en) * 1960-01-26 1963-12-10 Corning Glass Works Thermally devitrifiable sealing glasses and composite articles
US3475210A (en) * 1966-05-06 1969-10-28 Fairchild Camera Instr Co Laminated passivating structure
US3511703A (en) * 1963-09-20 1970-05-12 Motorola Inc Method for depositing mixed oxide films containing aluminum oxide
DE1958800A1 (de) * 1968-11-25 1970-07-09 Ibm Mehrfachschutzschichten zur Passivierung von Halbleiterbauelementen und Verfahren zu ihrer Herstellung
US3752701A (en) * 1970-07-27 1973-08-14 Gen Instrument Corp Glass for coating semiconductors, and semiconductor coated therewith
US3778242A (en) * 1965-11-26 1973-12-11 Owens Illinois Inc Low temperature sealant glass for sealing integrated circuit package parts
US3887733A (en) * 1974-04-24 1975-06-03 Motorola Inc Doped oxide reflow process
DE2606029A1 (de) * 1976-02-14 1977-12-29 Jenaer Glaswerk Schott & Gen Glas zum hermetischen umhuellen und passivieren von halbleiteranordnungen
DE2809233A1 (de) * 1977-03-04 1978-09-07 Hitachi Ltd Halbleitervorrichtung und verfahren zu ihrer herstellung
DE2832740A1 (de) * 1977-07-27 1979-02-01 Fujitsu Ltd Verfahren zum herstellen einer halbleitervorrichtung

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51144183A (en) * 1975-06-06 1976-12-10 Hitachi Ltd Semiconductor element containing surface protection film
DE2611059A1 (de) * 1976-03-16 1977-09-29 Siemens Ag Gehaeuseloses halbleiterbauelement mit doppelwaermesenke

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3113878A (en) * 1960-01-26 1963-12-10 Corning Glass Works Thermally devitrifiable sealing glasses and composite articles
US3511703A (en) * 1963-09-20 1970-05-12 Motorola Inc Method for depositing mixed oxide films containing aluminum oxide
US3778242A (en) * 1965-11-26 1973-12-11 Owens Illinois Inc Low temperature sealant glass for sealing integrated circuit package parts
US3475210A (en) * 1966-05-06 1969-10-28 Fairchild Camera Instr Co Laminated passivating structure
DE1958800A1 (de) * 1968-11-25 1970-07-09 Ibm Mehrfachschutzschichten zur Passivierung von Halbleiterbauelementen und Verfahren zu ihrer Herstellung
US3752701A (en) * 1970-07-27 1973-08-14 Gen Instrument Corp Glass for coating semiconductors, and semiconductor coated therewith
US3887733A (en) * 1974-04-24 1975-06-03 Motorola Inc Doped oxide reflow process
DE2606029A1 (de) * 1976-02-14 1977-12-29 Jenaer Glaswerk Schott & Gen Glas zum hermetischen umhuellen und passivieren von halbleiteranordnungen
DE2809233A1 (de) * 1977-03-04 1978-09-07 Hitachi Ltd Halbleitervorrichtung und verfahren zu ihrer herstellung
DE2832740A1 (de) * 1977-07-27 1979-02-01 Fujitsu Ltd Verfahren zum herstellen einer halbleitervorrichtung

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Dr. Erhard Ühlein, Römpps Chemisches Wörterbuch, Stuttgart 1969 *
US-PS 4 349 584(nachveröffentlicht) *

Also Published As

Publication number Publication date
NL188775B (nl) 1992-04-16
FR2489042B1 (fr) 1986-09-26
FR2489042A1 (fr) 1982-02-26
GB2082838A (en) 1982-03-10
GB2082838B (en) 1984-07-11
NL8103007A (nl) 1982-03-16
DE3132645C2 (enrdf_load_stackoverflow) 1991-01-10
NL188775C (nl) 1992-09-16

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
8127 New person/name/address of the applicant

Owner name: KABUSHIKI KAISHA SUWA SEIKOSHA, SHINJUKU, TOKIO-TO

D2 Grant after examination
8380 Miscellaneous part iii

Free format text: DIE ENTGEGENGEHALTENE DRUCKSCHRIFT "US 31 13 879" AENDERN IN "US 31 13 878"

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee