DE3062675D1 - Semiconductor integrated circuit device with a double interconnection layer - Google Patents

Semiconductor integrated circuit device with a double interconnection layer

Info

Publication number
DE3062675D1
DE3062675D1 DE8080300661T DE3062675T DE3062675D1 DE 3062675 D1 DE3062675 D1 DE 3062675D1 DE 8080300661 T DE8080300661 T DE 8080300661T DE 3062675 T DE3062675 T DE 3062675T DE 3062675 D1 DE3062675 D1 DE 3062675D1
Authority
DE
Germany
Prior art keywords
integrated circuit
semiconductor integrated
circuit device
interconnection layer
double interconnection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8080300661T
Other languages
English (en)
Inventor
Masamichi Asano
Hiroshi Iwahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Application granted granted Critical
Publication of DE3062675D1 publication Critical patent/DE3062675D1/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528Geometry or layout of the interconnection structure
    • H01L23/5283Cross-sectional geometry
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/511Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Geometry (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)
DE8080300661T 1979-03-09 1980-03-05 Semiconductor integrated circuit device with a double interconnection layer Expired DE3062675D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2736179A JPS55120150A (en) 1979-03-09 1979-03-09 Semiconductor device

Publications (1)

Publication Number Publication Date
DE3062675D1 true DE3062675D1 (en) 1983-05-19

Family

ID=12218902

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8080300661T Expired DE3062675D1 (en) 1979-03-09 1980-03-05 Semiconductor integrated circuit device with a double interconnection layer

Country Status (3)

Country Link
EP (1) EP0016577B1 (de)
JP (1) JPS55120150A (de)
DE (1) DE3062675D1 (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56161668A (en) * 1980-05-16 1981-12-12 Hitachi Ltd Semiconductor device
DE3123348A1 (de) * 1980-06-19 1982-03-18 Tokyo Shibaura Denki K.K., Kawasaki, Kanagawa Halbleiterbaustein und verfahren zu dessen herstellung
JPS5756958A (en) * 1980-09-22 1982-04-05 Toshiba Corp Semiconductor device
JPS5756959A (en) * 1980-09-22 1982-04-05 Toshiba Corp Semiconductor device and manufacture thereof
JPS57194552A (en) * 1981-05-25 1982-11-30 Matsushita Electric Ind Co Ltd Signal transmission line
JPS57211249A (en) * 1981-06-22 1982-12-25 Nec Corp Integrated circuit device
JPS5834946A (ja) * 1981-08-27 1983-03-01 Nec Corp 半導体集積回路装置
JPS5854654A (ja) * 1981-09-28 1983-03-31 Nec Corp 半導体集積回路装置
JPS5860561A (ja) * 1981-10-06 1983-04-11 Mitsubishi Electric Corp 半導体集積回路装置
JPS5893347A (ja) * 1981-11-30 1983-06-03 Toshiba Corp Mos型半導体装置及びその製造方法
JPS58219747A (ja) * 1982-06-14 1983-12-21 Nec Corp マスタスライス型半導体装置
JPS594050A (ja) * 1982-06-30 1984-01-10 Fujitsu Ltd 半導体装置
JPS5940549A (ja) * 1982-08-30 1984-03-06 Nippon Telegr & Teleph Corp <Ntt> 多層配線構造体
JPS5952851A (ja) * 1982-09-18 1984-03-27 Mitsubishi Electric Corp 半導体集積回路
JPS60128651A (ja) * 1983-12-15 1985-07-09 Fujitsu Ltd 半導体装置
JPS60144238U (ja) * 1984-03-06 1985-09-25 富士通株式会社 半導体装置
DE3585756D1 (de) * 1984-07-02 1992-05-07 Fujitsu Ltd Halbleiterschaltungsanordnung in hauptscheibentechnik.
JPS6290950A (ja) * 1985-10-16 1987-04-25 Mitsubishi Electric Corp 半導体装置
JPH0789568B2 (ja) * 1986-06-19 1995-09-27 日本電気株式会社 集積回路装置
JPS63268258A (ja) * 1987-04-24 1988-11-04 Nec Corp 半導体装置
US5316974A (en) * 1988-12-19 1994-05-31 Texas Instruments Incorporated Integrated circuit copper metallization process using a lift-off seed layer and a thick-plated conductor layer
JPH02127042U (de) * 1990-04-12 1990-10-19
EP0482556A1 (de) * 1990-10-22 1992-04-29 Nec Corporation Widerstandselement aus Polysilizium und dieses verwendendes Halbleiterbauelement
GB2263018B (en) * 1991-03-23 1995-06-21 Sony Corp Static random access memories
GB2254487B (en) * 1991-03-23 1995-06-21 Sony Corp Full CMOS type static random access memories

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53124084A (en) * 1977-04-06 1978-10-30 Hitachi Ltd Semiconductor memory device containing floating type poly silicon layer and its manufacture

Also Published As

Publication number Publication date
EP0016577A1 (de) 1980-10-01
JPS55120150A (en) 1980-09-16
EP0016577B1 (de) 1983-04-13

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Legal Events

Date Code Title Description
8320 Willingness to grant licences declared (paragraph 23)
8327 Change in the person/name/address of the patent owner

Owner name: KABUSHIKI KAISHA TOSHIBA, KAWASAKI, KANAGAWA, JP

8339 Ceased/non-payment of the annual fee