DE3002492C2 - - Google Patents

Info

Publication number
DE3002492C2
DE3002492C2 DE3002492A DE3002492A DE3002492C2 DE 3002492 C2 DE3002492 C2 DE 3002492C2 DE 3002492 A DE3002492 A DE 3002492A DE 3002492 A DE3002492 A DE 3002492A DE 3002492 C2 DE3002492 C2 DE 3002492C2
Authority
DE
Germany
Prior art keywords
memory cell
cell
floating gate
volatile memory
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE3002492A
Other languages
German (de)
English (en)
Other versions
DE3002492A1 (de
Inventor
Richard Thomas Los Altos Calif. Us Simko
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xicor LLC
Original Assignee
Xicor LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US06/006,029 external-priority patent/US4300212A/en
Application filed by Xicor LLC filed Critical Xicor LLC
Publication of DE3002492A1 publication Critical patent/DE3002492A1/de
Application granted granted Critical
Publication of DE3002492C2 publication Critical patent/DE3002492C2/de
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C14/00Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
    • H01L29/7883Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Non-Volatile Memory (AREA)
DE19803002492 1979-01-24 1980-01-24 Nicht selbstloeschende speichereinrichtung und verfahren zum betrieb dieser einrichtung Granted DE3002492A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/006,029 US4300212A (en) 1979-01-24 1979-01-24 Nonvolatile static random access memory devices

Publications (2)

Publication Number Publication Date
DE3002492A1 DE3002492A1 (de) 1980-07-31
DE3002492C2 true DE3002492C2 (ko) 1990-12-20

Family

ID=21718940

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19803002492 Granted DE3002492A1 (de) 1979-01-24 1980-01-24 Nicht selbstloeschende speichereinrichtung und verfahren zum betrieb dieser einrichtung

Country Status (8)

Country Link
JP (1) JPS55101192A (ko)
KR (1) KR830001767B1 (ko)
BE (1) BE881329A (ko)
DE (1) DE3002492A1 (ko)
FR (1) FR2447587B1 (ko)
GB (1) GB2042296B (ko)
NL (1) NL192015C (ko)
SE (1) SE8000392L (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10211337A1 (de) * 2002-03-14 2003-10-09 Infineon Technologies Ag Schaltkreis-Anordnung und Verfahren zum Betreiben einer Schaltkreis-Anordnung

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4486769A (en) * 1979-01-24 1984-12-04 Xicor, Inc. Dense nonvolatile electrically-alterable memory device with substrate coupling electrode
JPS56500109A (ko) * 1979-03-13 1981-02-05
JPS57199264A (en) * 1981-06-03 1982-12-07 Toshiba Corp Semiconductor memory
JPS57199265A (en) * 1981-06-03 1982-12-07 Toshiba Corp Semiconductor memory
US4388704A (en) * 1980-09-30 1983-06-14 International Business Machines Corporation Non-volatile RAM cell with enhanced conduction insulators
JPS5792865A (en) * 1980-11-29 1982-06-09 Toshiba Corp Manufacture of semiconductor memory device
JPS5792490A (en) * 1980-11-29 1982-06-09 Toshiba Corp Semiconductor storage device
GB2094086B (en) * 1981-03-03 1985-08-14 Tokyo Shibaura Electric Co Non-volatile semiconductor memory system
US4630238A (en) * 1983-10-14 1986-12-16 Fujitsu Limited Semiconductor memory device
JPS60185297A (ja) * 1984-03-02 1985-09-20 Fujitsu Ltd 不揮発性ランダムアクセスメモリ装置
JPH0638502B2 (ja) * 1984-06-13 1994-05-18 セイコー電子工業株式会社 不揮発性ram
US4616245A (en) * 1984-10-29 1986-10-07 Ncr Corporation Direct-write silicon nitride EEPROM cell
JPH07120716B2 (ja) * 1985-03-30 1995-12-20 株式会社東芝 半導体記憶装置
JPS61225860A (ja) * 1985-03-30 1986-10-07 Toshiba Corp 半導体記憶装置
JPH01214993A (ja) * 1988-02-23 1989-08-29 Nissan Motor Co Ltd データ記憶装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4070655A (en) * 1976-11-05 1978-01-24 The United States Of America As Represented By The Secretary Of The Air Force Virtually nonvolatile static random access memory device
US4099196A (en) * 1977-06-29 1978-07-04 Intel Corporation Triple layer polysilicon cell
US4128773A (en) * 1977-11-07 1978-12-05 Hughes Aircraft Company Volatile/non-volatile logic latch circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10211337A1 (de) * 2002-03-14 2003-10-09 Infineon Technologies Ag Schaltkreis-Anordnung und Verfahren zum Betreiben einer Schaltkreis-Anordnung
DE10211337B4 (de) * 2002-03-14 2009-12-31 Infineon Technologies Ag Schaltkreis-Anordnung und Verfahren zum Betreiben einer Schaltkreis-Anordnung

Also Published As

Publication number Publication date
DE3002492A1 (de) 1980-07-31
GB2042296B (en) 1983-05-11
NL192015C (nl) 1996-12-03
KR830001767B1 (ko) 1983-09-03
NL192015B (nl) 1996-08-01
GB2042296A (en) 1980-09-17
BE881329A (fr) 1980-05-16
JPS55101192A (en) 1980-08-01
FR2447587B1 (fr) 1986-02-28
FR2447587A1 (fr) 1980-08-22
NL8000435A (nl) 1980-07-28
JPH0115959B2 (ko) 1989-03-22
SE8000392L (sv) 1980-07-25

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
8125 Change of the main classification

Ipc: G11C 17/06

D2 Grant after examination
8364 No opposition during term of opposition