DE3876865T2 - Elektrisch loeschbarer und programmierbarer nur-lese-speicher. - Google Patents

Elektrisch loeschbarer und programmierbarer nur-lese-speicher.

Info

Publication number
DE3876865T2
DE3876865T2 DE8888305544T DE3876865T DE3876865T2 DE 3876865 T2 DE3876865 T2 DE 3876865T2 DE 8888305544 T DE8888305544 T DE 8888305544T DE 3876865 T DE3876865 T DE 3876865T DE 3876865 T2 DE3876865 T2 DE 3876865T2
Authority
DE
Germany
Prior art keywords
memory
programmable read
electrically erasable
erasable
electrically
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8888305544T
Other languages
English (en)
Other versions
DE3876865D1 (de
Inventor
Stewart Logie
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of DE3876865D1 publication Critical patent/DE3876865D1/de
Application granted granted Critical
Publication of DE3876865T2 publication Critical patent/DE3876865T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0441Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2216/00Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/02Structural aspects of erasable programmable read-only memories
    • G11C2216/10Floating gate memory cells with a single polysilicon layer
DE8888305544T 1987-06-19 1988-06-17 Elektrisch loeschbarer und programmierbarer nur-lese-speicher. Expired - Fee Related DE3876865T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US6504087A 1987-06-19 1987-06-19

Publications (2)

Publication Number Publication Date
DE3876865D1 DE3876865D1 (de) 1993-02-04
DE3876865T2 true DE3876865T2 (de) 1993-07-22

Family

ID=22059955

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8888305544T Expired - Fee Related DE3876865T2 (de) 1987-06-19 1988-06-17 Elektrisch loeschbarer und programmierbarer nur-lese-speicher.

Country Status (3)

Country Link
EP (1) EP0295935B1 (de)
JP (1) JP2688492B2 (de)
DE (1) DE3876865T2 (de)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2663863B2 (ja) * 1994-04-19 1997-10-15 日本電気株式会社 不揮発性半導体記憶装置
US5742542A (en) * 1995-07-03 1998-04-21 Advanced Micro Devices, Inc. Non-volatile memory cells using only positive charge to store data
US5666309A (en) * 1995-11-17 1997-09-09 Advanced Micro Devices, Inc. Memory cell for a programmable logic device (PLD) avoiding pumping programming voltage above an NMOS threshold
US6201732B1 (en) 1997-01-02 2001-03-13 John M. Caywood Low voltage single CMOS electrically erasable read-only memory
US5986931A (en) 1997-01-02 1999-11-16 Caywood; John M. Low voltage single CMOS electrically erasable read-only memory
US5885871A (en) * 1997-07-31 1999-03-23 Stmicrolelectronics, Inc. Method of making EEPROM cell structure
TW449746B (en) 1998-10-23 2001-08-11 Kaitech Engineering Inc Semiconductor memory device and method of making same
US6404006B2 (en) * 1998-12-01 2002-06-11 Vantis Corporation EEPROM cell with tunneling across entire separated channels
US6214666B1 (en) 1998-12-18 2001-04-10 Vantis Corporation Method of forming a non-volatile memory device
US5969992A (en) * 1998-12-21 1999-10-19 Vantis Corporation EEPROM cell using P-well for tunneling across a channel
US6282123B1 (en) 1998-12-21 2001-08-28 Lattice Semiconductor Corporation Method of fabricating, programming, and erasing a dual pocket two sided program/erase non-volatile memory cell
US6232631B1 (en) 1998-12-21 2001-05-15 Vantis Corporation Floating gate memory cell structure with programming mechanism outside the read path
US6294810B1 (en) 1998-12-22 2001-09-25 Vantis Corporation EEPROM cell with tunneling at separate edge and channel regions
US6294809B1 (en) * 1998-12-28 2001-09-25 Vantis Corporation Avalanche programmed floating gate memory cell structure with program element in polysilicon
US6215700B1 (en) 1999-01-07 2001-04-10 Vantis Corporation PMOS avalanche programmed floating gate memory cell structure
US6294811B1 (en) 1999-02-05 2001-09-25 Vantis Corporation Two transistor EEPROM cell
US6326663B1 (en) 1999-03-26 2001-12-04 Vantis Corporation Avalanche injection EEPROM memory cell with P-type control gate
US6172392B1 (en) 1999-03-29 2001-01-09 Vantis Corporation Boron doped silicon capacitor plate
US6424000B1 (en) 1999-05-11 2002-07-23 Vantis Corporation Floating gate memory apparatus and method for selected programming thereof
DE19930586B4 (de) * 1999-07-02 2007-12-27 Infineon Technologies Ag Nichtflüchtige Speicherzelle mit separatem Tunnelfenster
US6459616B1 (en) * 2001-03-05 2002-10-01 Microchip Technology Incorporated Split common source on EEPROM array
DE10136582A1 (de) 2001-07-27 2003-02-27 Micronas Gmbh Verfahren zur Herstellung eines nichtflüchtigen Halbleiterspeichers sowie nichtflüchtiger Halbleiterspeicher
US6798693B2 (en) 2001-09-18 2004-09-28 Kilopass Technologies, Inc. Semiconductor memory cell and memory array using a breakdown phenomena in an ultra-thin dielectric
JP4599059B2 (ja) 2001-09-18 2010-12-15 キロパス テクノロジー インコーポレイテッド 超薄膜誘電体のブレークダウン現象を利用した半導体メモリセルセル及びメモリアレイ
US6700151B2 (en) 2001-10-17 2004-03-02 Kilopass Technologies, Inc. Reprogrammable non-volatile memory using a breakdown phenomena in an ultra-thin dielectric
US6777757B2 (en) 2002-04-26 2004-08-17 Kilopass Technologies, Inc. High density semiconductor memory cell and memory array using a single transistor
US6940751B2 (en) 2002-04-26 2005-09-06 Kilopass Technologies, Inc. High density semiconductor memory cell and memory array using a single transistor and having variable gate oxide breakdown
US6898116B2 (en) 2002-04-26 2005-05-24 Kilopass Technologies, Inc. High density semiconductor memory cell and memory array using a single transistor having a buried N+ connection
US6992925B2 (en) 2002-04-26 2006-01-31 Kilopass Technologies, Inc. High density semiconductor memory cell and memory array using a single transistor and having counter-doped poly and buried diffusion wordline
US7031209B2 (en) 2002-09-26 2006-04-18 Kilopass Technology, Inc. Methods and circuits for testing programmability of a semiconductor memory cell and memory array using a breakdown phenomenon in an ultra-thin dielectric
US7042772B2 (en) 2002-09-26 2006-05-09 Kilopass Technology, Inc. Methods and circuits for programming of a semiconductor memory cell and memory array using a breakdown phenomenon in an ultra-thin dielectric
US6791891B1 (en) 2003-04-02 2004-09-14 Kilopass Technologies, Inc. Method of testing the thin oxide of a semiconductor memory cell that uses breakdown voltage
US6924664B2 (en) 2003-08-15 2005-08-02 Kilopass Technologies, Inc. Field programmable gate array
US6972986B2 (en) 2004-02-03 2005-12-06 Kilopass Technologies, Inc. Combination field programmable gate array allowing dynamic reprogrammability and non-votatile programmability based upon transistor gate oxide breakdown
US9123572B2 (en) 2004-05-06 2015-09-01 Sidense Corporation Anti-fuse memory cell
US8735297B2 (en) 2004-05-06 2014-05-27 Sidense Corporation Reverse optical proximity correction method
US7755162B2 (en) 2004-05-06 2010-07-13 Sidense Corp. Anti-fuse memory cell
CA2520140C (en) 2004-05-06 2007-05-15 Sidense Corp. Split-channel antifuse array architecture
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
US8908412B2 (en) 2010-07-20 2014-12-09 Texas Instruments Incorporated Array architecture for reduced voltage, low power, single poly EEPROM

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4377857A (en) * 1980-11-18 1983-03-22 Fairchild Camera & Instrument Electrically erasable programmable read-only memory
US4654825A (en) * 1984-01-06 1987-03-31 Advanced Micro Devices, Inc. E2 prom memory cell
US4599706A (en) * 1985-05-14 1986-07-08 Xicor, Inc. Nonvolatile electrically alterable memory

Also Published As

Publication number Publication date
EP0295935B1 (de) 1992-12-23
EP0295935A1 (de) 1988-12-21
JPS649663A (en) 1989-01-12
JP2688492B2 (ja) 1997-12-10
DE3876865D1 (de) 1993-02-04

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee