JPS5792490A - Semiconductor storage device - Google Patents

Semiconductor storage device

Info

Publication number
JPS5792490A
JPS5792490A JP16862080A JP16862080A JPS5792490A JP S5792490 A JPS5792490 A JP S5792490A JP 16862080 A JP16862080 A JP 16862080A JP 16862080 A JP16862080 A JP 16862080A JP S5792490 A JPS5792490 A JP S5792490A
Authority
JP
Japan
Prior art keywords
gate
cell
erasure
line
voltage vth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16862080A
Other languages
Japanese (ja)
Other versions
JPS6226597B2 (en
Inventor
Fujio Masuoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP16862080A priority Critical patent/JPS5792490A/en
Priority to DE8181305349T priority patent/DE3175125D1/en
Priority to EP81305349A priority patent/EP0052982B1/en
Priority to US06/321,322 priority patent/US4803529A/en
Publication of JPS5792490A publication Critical patent/JPS5792490A/en
Publication of JPS6226597B2 publication Critical patent/JPS6226597B2/ja
Priority to US07/193,079 priority patent/US4910565A/en
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates

Landscapes

  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To compose one memory cell of one transistor (TR) and to enable electric erasure by providing the floating gate of a double gate type MOSTR with an erasure gate in parallel. CONSTITUTION:When data is to be written in a memory cell M1, a positive high voltage is applied to a selection line 35 and a digit line 31 respectively to cause thermoelectrons to flow from the source S of the cell M1 to the drain D, and the thermoelectrons are applied from a channel area to a floating gate FG. Consequently, the threshold voltage VTH of the cell M1 rises. For readout, the line 35 is selected and a high-level signal is applied to the control gate CG of the cell M1. In this case, when the voltage VTH falls, the cell M1 turns on and when rising, it turns off. For erasure, the lines 35 and 31 are held at 0V and a high voltage is applied to an erasure line 33; and then, electric field emission is caused between the gate FG and erasure gate EG of the cell M1 to flow accumulated electrons out of the gate FG, so that the voltage VTH is returned to the initial value.
JP16862080A 1980-11-20 1980-11-29 Semiconductor storage device Granted JPS5792490A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP16862080A JPS5792490A (en) 1980-11-29 1980-11-29 Semiconductor storage device
DE8181305349T DE3175125D1 (en) 1980-11-20 1981-11-11 Semiconductor memory device and method for manufacturing the same
EP81305349A EP0052982B1 (en) 1980-11-20 1981-11-11 Semiconductor memory device and method for manufacturing the same
US06/321,322 US4803529A (en) 1980-11-20 1981-11-13 Electrically erasable and electrically programmable read only memory
US07/193,079 US4910565A (en) 1980-11-20 1988-05-12 Electrically erasable and electrically programmable read-only memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16862080A JPS5792490A (en) 1980-11-29 1980-11-29 Semiconductor storage device

Publications (2)

Publication Number Publication Date
JPS5792490A true JPS5792490A (en) 1982-06-09
JPS6226597B2 JPS6226597B2 (en) 1987-06-09

Family

ID=15871431

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16862080A Granted JPS5792490A (en) 1980-11-20 1980-11-29 Semiconductor storage device

Country Status (1)

Country Link
JP (1) JPS5792490A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01257794A (en) * 1988-04-05 1989-10-13 Daikin Ind Ltd Vacuum pump
JPH0482395U (en) * 1990-11-29 1992-07-17

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55101192A (en) * 1979-01-24 1980-08-01 Xicor Inc Method and unit for nonnvolatile memory
JPS5715470A (en) * 1980-06-30 1982-01-26 Ibm Electrically programmable/erasable mos memory cell

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55101192A (en) * 1979-01-24 1980-08-01 Xicor Inc Method and unit for nonnvolatile memory
JPS5715470A (en) * 1980-06-30 1982-01-26 Ibm Electrically programmable/erasable mos memory cell

Also Published As

Publication number Publication date
JPS6226597B2 (en) 1987-06-09

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