DE2711895C2 - Speicher-Feldeffekttransistor mit zwei Gateelektroden und Verfahren zu dessen Herstellung - Google Patents

Speicher-Feldeffekttransistor mit zwei Gateelektroden und Verfahren zu dessen Herstellung

Info

Publication number
DE2711895C2
DE2711895C2 DE2711895A DE2711895A DE2711895C2 DE 2711895 C2 DE2711895 C2 DE 2711895C2 DE 2711895 A DE2711895 A DE 2711895A DE 2711895 A DE2711895 A DE 2711895A DE 2711895 C2 DE2711895 C2 DE 2711895C2
Authority
DE
Germany
Prior art keywords
dielectric layer
gate electrode
layer
field effect
effect transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2711895A
Other languages
German (de)
English (en)
Other versions
DE2711895A1 (de
Inventor
Eliyahou Irvine Calif. Harari
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Hughes Aircraft Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Aircraft Co filed Critical Hughes Aircraft Co
Publication of DE2711895A1 publication Critical patent/DE2711895A1/de
Application granted granted Critical
Publication of DE2711895C2 publication Critical patent/DE2711895C2/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0413—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having charge-trapping gate insulators, e.g. MNOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/6737—Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
    • H10D30/6739—Conductor-insulator-semiconductor electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H10D30/683—Floating-gate IGFETs having only two programming levels programmed by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/031—Manufacture or treatment of data-storage electrodes
    • H10D64/035—Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures

Landscapes

  • Non-Volatile Memory (AREA)
  • Thin Film Transistor (AREA)
DE2711895A 1976-03-26 1977-03-18 Speicher-Feldeffekttransistor mit zwei Gateelektroden und Verfahren zu dessen Herstellung Expired DE2711895C2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US67118376A 1976-03-26 1976-03-26

Publications (2)

Publication Number Publication Date
DE2711895A1 DE2711895A1 (de) 1977-10-06
DE2711895C2 true DE2711895C2 (de) 1987-05-27

Family

ID=24693462

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2711895A Expired DE2711895C2 (de) 1976-03-26 1977-03-18 Speicher-Feldeffekttransistor mit zwei Gateelektroden und Verfahren zu dessen Herstellung

Country Status (6)

Country Link
US (1) US4115914A (cg-RX-API-DMAC7.html)
JP (1) JPS52144981A (cg-RX-API-DMAC7.html)
DE (1) DE2711895C2 (cg-RX-API-DMAC7.html)
FR (1) FR2345813A1 (cg-RX-API-DMAC7.html)
GB (1) GB1575960A (cg-RX-API-DMAC7.html)
NL (1) NL186984C (cg-RX-API-DMAC7.html)

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US5047981A (en) * 1988-07-15 1991-09-10 Texas Instruments Incorporated Bit and block erasing of an electrically erasable and programmable read-only memory array
US5144393A (en) * 1989-04-04 1992-09-01 Mitsubishi Denki Kabushiki Kaisha Structure for a PSD type field effect transistor
DE69033438T2 (de) 1989-04-13 2000-07-06 Sandisk Corp., Santa Clara Austausch von fehlerhaften Speicherzellen einer EEprommatritze
JPH0388370A (ja) * 1989-08-31 1991-04-12 Toshiba Corp 半導体記憶装置の製造方法
US5106772A (en) * 1990-01-09 1992-04-21 Intel Corporation Method for improving the electrical erase characteristics of floating gate memory cells by immediately depositing a protective polysilicon layer following growth of the tunnel or gate oxide
JPH04257270A (ja) * 1991-02-08 1992-09-11 Fujitsu Ltd 半導体記憶装置
US5273921A (en) * 1991-12-27 1993-12-28 Purdue Research Foundation Methods for fabricating a dual-gated semiconductor-on-insulator field effect transistor
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US5508543A (en) * 1994-04-29 1996-04-16 International Business Machines Corporation Low voltage memory
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US6201732B1 (en) 1997-01-02 2001-03-13 John M. Caywood Low voltage single CMOS electrically erasable read-only memory
US5867425A (en) * 1997-04-11 1999-02-02 Wong; Ting-Wah Nonvolatile memory capable of using substrate hot electron injection
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US7378775B2 (en) 2001-10-26 2008-05-27 Nth Tech Corporation Motion based, electrostatic power source and methods thereof
US7211923B2 (en) 2001-10-26 2007-05-01 Nth Tech Corporation Rotational motion based, electrostatic power source and methods thereof
US6429109B1 (en) 2001-12-14 2002-08-06 Chartered Semiconductor Manufacturing Ltd Method to form high k dielectric and silicide to reduce poly depletion by using a sacrificial metal between oxide and gate
US6821873B2 (en) * 2002-01-10 2004-11-23 Texas Instruments Incorporated Anneal sequence for high-κ film property optimization
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Also Published As

Publication number Publication date
NL7703224A (nl) 1977-09-28
DE2711895A1 (de) 1977-10-06
JPS52144981A (en) 1977-12-02
GB1575960A (en) 1980-10-01
NL186984C (nl) 1991-04-16
US4115914A (en) 1978-09-26
NL186984B (nl) 1990-11-16
FR2345813B1 (cg-RX-API-DMAC7.html) 1980-11-21
FR2345813A1 (fr) 1977-10-21

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Legal Events

Date Code Title Description
D2 Grant after examination
8363 Opposition against the patent
8327 Change in the person/name/address of the patent owner

Owner name: HUGHES AIRCRAFT CO., LOS ANGELES, CALIF., US

8328 Change in the person/name/address of the agent

Free format text: KUHNEN, R., DIPL.-ING. WACKER, P., DIPL.-ING. DIPL.-WIRTSCH.-ING., PAT.-ANW., 8050 FREISING

8366 Restricted maintained after opposition proceedings
8305 Restricted maintenance of patent after opposition
D4 Patent maintained restricted