DE102015216619B4 - Verfahren zum Bearbeiten eines Wafers - Google Patents

Verfahren zum Bearbeiten eines Wafers Download PDF

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Publication number
DE102015216619B4
DE102015216619B4 DE102015216619.8A DE102015216619A DE102015216619B4 DE 102015216619 B4 DE102015216619 B4 DE 102015216619B4 DE 102015216619 A DE102015216619 A DE 102015216619A DE 102015216619 B4 DE102015216619 B4 DE 102015216619B4
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DE
Germany
Prior art keywords
wafer
protective film
carrier
resin
curable resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE102015216619.8A
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German (de)
English (en)
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DE102015216619A1 (de
Inventor
Karl-Heinz Priewasser
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Disco Corp
Original Assignee
Disco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Disco Corp filed Critical Disco Corp
Priority to DE102015216619.8A priority Critical patent/DE102015216619B4/de
Priority to JP2016163515A priority patent/JP6312343B2/ja
Priority to CN201610730785.7A priority patent/CN106486408B/zh
Priority to TW105127887A priority patent/TWI654716B/zh
Priority to US15/251,283 priority patent/US10256148B2/en
Priority to KR1020160111611A priority patent/KR101860210B1/ko
Publication of DE102015216619A1 publication Critical patent/DE102015216619A1/de
Application granted granted Critical
Publication of DE102015216619B4 publication Critical patent/DE102015216619B4/de
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02013Grinding, lapping
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00777Preserve existing structures from alteration, e.g. temporary protection during manufacturing
    • B81C1/00825Protect against mechanical threats, e.g. against shocks, or residues
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00865Multistep processes for the separation of wafers into individual elements
    • B81C1/00896Temporary protection during separation into individual elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • HELECTRICITY
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
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    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
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    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
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    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/94Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2201/00Manufacture or treatment of microstructural devices or systems
    • B81C2201/05Temporary protection of devices or parts of the devices during manufacturing
    • B81C2201/053Depositing a protective layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68318Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
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    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6834Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381Details of chemical or physical process used for separating the auxiliary support from a device or wafer
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/11001Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
    • H01L2224/11009Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for protecting parts during manufacture
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/1301Shape
    • H01L2224/13012Shape in top view
    • H01L2224/13014Shape in top view being circular or elliptic
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    • H01L2224/93Batch processes
    • H01L2224/94Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
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    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/146Mixed devices
    • H01L2924/1461MEMS

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Dicing (AREA)
DE102015216619.8A 2015-08-31 2015-08-31 Verfahren zum Bearbeiten eines Wafers Active DE102015216619B4 (de)

Priority Applications (6)

Application Number Priority Date Filing Date Title
DE102015216619.8A DE102015216619B4 (de) 2015-08-31 2015-08-31 Verfahren zum Bearbeiten eines Wafers
JP2016163515A JP6312343B2 (ja) 2015-08-31 2016-08-24 ウェハを処理する方法
CN201610730785.7A CN106486408B (zh) 2015-08-31 2016-08-26 处理晶片的方法
TW105127887A TWI654716B (zh) 2015-08-31 2016-08-30 處理晶圓的方法
US15/251,283 US10256148B2 (en) 2015-08-31 2016-08-30 Method of processing wafer
KR1020160111611A KR101860210B1 (ko) 2015-08-31 2016-08-31 웨이퍼 프로세싱 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102015216619.8A DE102015216619B4 (de) 2015-08-31 2015-08-31 Verfahren zum Bearbeiten eines Wafers

Publications (2)

Publication Number Publication Date
DE102015216619A1 DE102015216619A1 (de) 2017-03-02
DE102015216619B4 true DE102015216619B4 (de) 2017-08-10

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DE102015216619.8A Active DE102015216619B4 (de) 2015-08-31 2015-08-31 Verfahren zum Bearbeiten eines Wafers

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US (1) US10256148B2 (enExample)
JP (1) JP6312343B2 (enExample)
KR (1) KR101860210B1 (enExample)
CN (1) CN106486408B (enExample)
DE (1) DE102015216619B4 (enExample)
TW (1) TWI654716B (enExample)

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DE112015006857B4 (de) 2015-08-31 2023-10-05 Disco Corporation Verfahren zum Bearbeiten eines Wafers und Schutzabdeckung zur Verwendung in diesem Verfahren
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GB2551732B (en) 2016-06-28 2020-05-27 Disco Corp Method of processing wafer
JP6906843B2 (ja) * 2017-04-28 2021-07-21 株式会社ディスコ ウェーハの加工方法
JP6837717B2 (ja) * 2017-05-11 2021-03-03 株式会社ディスコ ウェーハの加工方法
JP6925714B2 (ja) * 2017-05-11 2021-08-25 株式会社ディスコ ウェーハの加工方法
DE102017208405B4 (de) * 2017-05-18 2024-05-02 Disco Corporation Verfahren zum Bearbeiten eines Wafers und Schutzfolie
JP6940217B2 (ja) * 2017-05-18 2021-09-22 株式会社ディスコ ウェハ処理に使用する為の保護シーティング、ウェハ、ウェハ及び保護シーティングの組合せの取扱いシステム
JP6914587B2 (ja) * 2017-05-25 2021-08-04 株式会社ディスコ ウェーハの加工方法
JP2019009372A (ja) * 2017-06-28 2019-01-17 株式会社ディスコ ウエーハの研削方法
JP6999322B2 (ja) * 2017-07-31 2022-01-18 株式会社ディスコ ウエーハの研削方法
JP7025171B2 (ja) 2017-10-12 2022-02-24 株式会社ディスコ 被加工物の研削方法
JP7071782B2 (ja) * 2017-12-28 2022-05-19 株式会社ディスコ ウェーハの加工方法
DE102018202254A1 (de) * 2018-02-14 2019-08-14 Disco Corporation Verfahren zum Bearbeiten eines Wafers
JP2019149451A (ja) * 2018-02-27 2019-09-05 株式会社ディスコ 板状物の加工方法
JP7034809B2 (ja) * 2018-04-09 2022-03-14 株式会社ディスコ 保護シート配設方法
JP7214364B2 (ja) * 2018-05-01 2023-01-30 株式会社ディスコ ウエーハの加工方法
DE102019110402A1 (de) 2018-05-25 2019-11-28 Infineon Technologies Ag Ein Verfahren zum Bearbeiten eines Halbleiterwafers, eine Halbleiter-Verbundstruktur und eine Stützstruktur für einen Halbleiterwafer
JP7114176B2 (ja) * 2018-06-01 2022-08-08 株式会社ディスコ 樹脂パッケージ基板の加工方法
JP2019212825A (ja) * 2018-06-06 2019-12-12 株式会社ディスコ ウェーハの加工方法
FR3085230B1 (fr) * 2018-08-27 2023-01-13 Ommic Separation d’une plaque en composants individuels
JP2020035918A (ja) * 2018-08-30 2020-03-05 株式会社ディスコ 被加工物の加工方法
JP7461298B2 (ja) * 2018-10-22 2024-04-03 リンテック株式会社 半導体装置の製造方法
FR3091621B1 (fr) 2019-01-04 2020-12-11 Commissariat Energie Atomique Procede de mise en courbure collective d’un ensemble de puces electroniques
WO2020175363A1 (ja) * 2019-02-26 2020-09-03 株式会社ディスコ 裏面研削用粘着シート及び半導体ウエハの製造方法
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JP7266953B2 (ja) 2019-08-07 2023-05-01 株式会社ディスコ 保護部材形成方法及び保護部材形成装置
JP7286250B2 (ja) * 2019-08-07 2023-06-05 株式会社ディスコ 保護部材形成装置
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JP7475232B2 (ja) 2020-07-22 2024-04-26 株式会社ディスコ 保護部材形成装置
DE102020210104B4 (de) * 2020-08-10 2025-02-06 Disco Corporation Verfahren zum bearbeiten eines substrats
JP7529478B2 (ja) * 2020-08-13 2024-08-06 株式会社ディスコ ウェーハの加工方法
JP7562333B2 (ja) * 2020-08-20 2024-10-07 株式会社東京精密 フライカット装置
JP2022035860A (ja) 2020-08-21 2022-03-04 株式会社ディスコ 保護部材形成装置
JP2022041447A (ja) * 2020-09-01 2022-03-11 株式会社ディスコ ウェーハの加工方法
JP7599982B2 (ja) 2021-02-09 2024-12-16 株式会社ディスコ シート貼着装置
JP7628369B2 (ja) 2021-05-31 2025-02-10 株式会社ディスコ 樹脂シート、樹脂シートの製造方法、及び樹脂被覆方法
DE102021209979A1 (de) 2021-09-09 2023-03-09 Disco Corporation Verfahren zur bearbeitung eines substrats
JP2023119102A (ja) * 2022-02-16 2023-08-28 株式会社ディスコ 被覆方法
DE102023208767A1 (de) * 2023-09-11 2025-03-13 Disco Corporation Werkstückunterstützung

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5320058B2 (enExample) * 1974-03-25 1978-06-24
JPS5324212B2 (enExample) * 1974-09-13 1978-07-19
US20040147120A1 (en) * 2001-05-03 2004-07-29 Michael Rogalli Process for the back-surface grinding of wafers
US20110281504A1 (en) * 2010-05-11 2011-11-17 Disco Corporation Grinding method for workpiece having a plurality of bumps
JP5324212B2 (ja) 2008-12-26 2013-10-23 株式会社ディスコ 樹脂被覆方法および樹脂被覆装置
JP5320058B2 (ja) 2008-12-26 2013-10-23 株式会社ディスコ 樹脂被覆方法および樹脂被覆装置

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6777267B2 (en) * 2002-11-01 2004-08-17 Agilent Technologies, Inc. Die singulation using deep silicon etching
CN100477139C (zh) * 2002-12-27 2009-04-08 富士通株式会社 凸块形成方法、半导体器件及其制造方法、基板处理装置和半导体制造装置
CN1808692A (zh) * 2004-12-22 2006-07-26 国家淀粉及化学投资控股公司 热熔性底部填充胶组合物及其涂覆方法
JP2007266191A (ja) * 2006-03-28 2007-10-11 Nec Electronics Corp ウェハ処理方法
JP2008060361A (ja) * 2006-08-31 2008-03-13 Nitto Denko Corp 半導体ウェハの加工方法、及びそれに用いる半導体ウェハ加工用粘着シート
JP2008159985A (ja) 2006-12-26 2008-07-10 Matsushita Electric Ind Co Ltd 半導体チップの製造方法
TWI324802B (en) * 2007-02-16 2010-05-11 Advanced Semiconductor Eng Method of thinning wafer
JP2009212300A (ja) * 2008-03-04 2009-09-17 Hitachi Chem Co Ltd 半導体ウエハのバックグラインド方法、半導体ウエハのダイシング方法、及び半導体チップの実装方法
US20110028150A1 (en) * 2009-08-03 2011-02-03 Mamadou Kone Method of Updating Management Information and Related Communication Device
JP2012079910A (ja) * 2010-10-01 2012-04-19 Disco Abrasive Syst Ltd 板状物の加工方法
JP2012099622A (ja) * 2010-11-02 2012-05-24 Panasonic Corp 半導体装置の製造方法および製造装置
JP2012119594A (ja) * 2010-12-03 2012-06-21 Disco Abrasive Syst Ltd 板状物の加工方法
WO2012124123A1 (ja) * 2011-03-17 2012-09-20 富士通株式会社 画像処理装置、画像処理方法及び画像処理プログラム
JP2013162096A (ja) * 2012-02-08 2013-08-19 Fujitsu Semiconductor Ltd 半導体チップの製造方法及びラミネート装置
JP5770677B2 (ja) * 2012-05-08 2015-08-26 株式会社ディスコ ウェーハの加工方法
JP6061590B2 (ja) 2012-09-27 2017-01-18 株式会社ディスコ 表面保護部材および加工方法
US9184083B2 (en) 2013-07-29 2015-11-10 3M Innovative Properties Company Apparatus, hybrid laminated body, method and materials for temporary substrate support

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5320058B2 (enExample) * 1974-03-25 1978-06-24
JPS5324212B2 (enExample) * 1974-09-13 1978-07-19
US20040147120A1 (en) * 2001-05-03 2004-07-29 Michael Rogalli Process for the back-surface grinding of wafers
JP5324212B2 (ja) 2008-12-26 2013-10-23 株式会社ディスコ 樹脂被覆方法および樹脂被覆装置
JP5320058B2 (ja) 2008-12-26 2013-10-23 株式会社ディスコ 樹脂被覆方法および樹脂被覆装置
US20110281504A1 (en) * 2010-05-11 2011-11-17 Disco Corporation Grinding method for workpiece having a plurality of bumps

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