JP6500230B2 - マスクパターンの形成方法および基板の加工方法ならびに素子チップの製造方法 - Google Patents
マスクパターンの形成方法および基板の加工方法ならびに素子チップの製造方法 Download PDFInfo
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
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- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68377—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support with parts of the auxiliary support remaining in the finished device
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- Microelectronics & Electronic Packaging (AREA)
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- Mechanical Treatment Of Semiconductor (AREA)
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- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
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Description
1* 基板(薄化後)
1a 第1の面
1b 第2の面
2 保護膜
2* 保護膜(露光済み)
3 フォトマスク
4、4A、40、41、42 保護シート
Claims (15)
- マスクパターンを基板に形成するマスクパターンの形成方法であって、
感光性の保護膜を第1の面に備える基板を準備する準備工程と、
前記保護膜の少なくとも一部を露光する露光工程と、
前記露光工程の後に、前記第1の面の前記保護膜に保護シートを貼付ける貼付け工程と、
前記貼付け工程の後に、前記第1の面と対向する第2の面を研削して前記基板を薄化する研削工程と、
前記研削工程の後に、前記保護シートを剥がして前記第1の面の前記保護膜を露出させる剥離工程と、
前記剥離工程の後に、露光された保護膜と露光されていない保護膜のいずれか一方を選択的に溶解させる現像液に保護膜を接触させることにより、保護膜をパターニングする現像工程と、を含み、
前記保護シートが、前記保護膜を感光させる光を透過させない透過防止層を備える、マスクパターンの形成方法。 - 前記透過防止層が金属よりなる、請求項1に記載のマスクパターンの形成方法。
- マスクパターンを基板に形成するマスクパターンの形成方法であって、
感光性の保護膜を第1の面に備える基板を準備する準備工程と、
前記準備工程の後に、前記第1の面の前記保護膜に保護シートを貼付ける貼付け工程と、
前記貼付け工程の後に、前記保護シートを透過して前記保護膜の少なくとも一部を露光する露光工程と、
前記第1の面と対向する第2の面を研削して前記基板を薄化する研削工程と、
前記研削工程の後に、前記保護シートを剥がして前記第1の面の前記保護膜を露出させる剥離工程と、
前記剥離工程の後に、露光された保護膜と露光されていない保護膜のいずれか一方を選択的に溶解させる現像液に保護膜を接触させることにより、保護膜をパターニングする現像工程と、を含む、マスクパターンの形成方法。 - 前記保護シートとして熱剥離性の保護シートを用い、
前記剥離工程において前記基板を加熱することにより前記保護シートの粘着力を低下させる、請求項1から3のいずれかに記載のマスクパターンの形成方法。 - 前記保護シートとして光硬化性の接着層を備える保護シートを用い、
前記貼付け工程において、前記基板の外縁部の前記保護膜に前記接着層によって前記保護シートを貼り付け、
前記剥離工程において、前記外縁部に前記接着層を硬化させる波長の光を照射することにより前記保護シートの粘着力を低下させる、請求項1または3のいずれかに記載のマスクパターンの形成方法。 - 基板をエッチングにより加工する基板の加工方法であって、
感光性の保護膜を第1の面に備える基板を準備する準備工程と、
前記保護膜の少なくとも一部を露光する露光工程と、
前記露光工程の後に、前記第1の面の前記保護膜に保護シートを貼付ける貼付け工程と、
前記貼付け工程の後に、前記第1の面と対向する第2の面を研削して前記基板を薄化する研削工程と、
前記研削工程の後に、前記保護シートを剥がして前記第1の面の前記保護膜を露出させる剥離工程と、
前記剥離工程の後に、露光された保護膜と露光されていない保護膜のいずれか一方を選択的に溶解させる現像液に保護膜を接触させることにより、保護膜をパターニングする現像工程と、
パターニングされた前記保護膜をマスクとして基板をエッチングするエッチング工程と、を含み、
前記保護シートが、前記保護膜を感光させる光を透過させない透過防止層を備える、基板の加工方法。 - 前記透過防止層が金属よりなる、請求項6に記載の基板の加工方法。
- 基板をエッチングにより加工する基板の加工方法であって、
感光性の保護膜を第1の面に備える基板を準備する準備工程と、
前記準備工程の後に、前記第1の面の前記保護膜に保護シートを貼付ける貼付け工程と、
前記貼付け工程の後に、前記保護シートを透過して前記保護膜の少なくとも一部を露光する露光工程と、
前記第1の面と対向する第2の面を研削して前記基板を薄化する研削工程と、
前記研削工程の後に、前記保護シートを剥がして前記第1の面の前記保護膜を露出させる剥離工程と、
前記剥離工程の後に、露光された保護膜と露光されていない保護膜のいずれか一方を選択的に溶解させる現像液に保護膜を接触させることにより、保護膜をパターニングする現像工程と、
パターニングされた前記保護膜をマスクとして基板をエッチングするエッチング工程と、を含む、基板の加工方法。 - 前記保護シートとして熱剥離性の保護シートを用い、
前記剥離工程において前記基板を加熱することにより前記保護シートの粘着力を低下させる、請求項6から8のいずれかに記載の基板の加工方法。 - 前記保護シートとして光硬化性の接着層を備える保護シートを用い、
前記貼付け工程において、前記基板の外縁部の前記保護膜に前記接着層によって前記保護シートを貼り付け、
前記剥離工程において、前記外縁部に前記接着層を硬化させる波長の光を照射することにより前記保護シートの粘着力を低下させる、請求項6または8のいずれかに記載の基板の加工方法。 - 基板をエッチングにより個片化して素子チップを製造する素子チップの製造方法であって、
感光性の保護膜を第1の面に備える基板を準備する準備工程と、
前記保護膜の少なくとも一部を露光する露光工程と、
前記露光工程の後に、前記第1の面の前記保護膜に保護シートを貼付ける貼付け工程と、
前記貼付け工程の後に、前記第1の面と対向する第2の面を研削して前記基板を薄化する研削工程と、
前記研削工程の後に、前記保護シートを剥がして前記第1の面の前記保護膜を露出させる剥離工程と、
前記剥離工程の後に、露光された保護膜と露光されていない保護膜のいずれか一方を選択的に溶解させる現像液に保護膜を接触させることにより、保護膜をパターニングする現像工程と、
パターニングされた前記保護膜をマスクとして基板をエッチングすることにより前記基板を複数の素子チップに個片化する個片化工程と、を含み、
前記保護シートが、前記保護膜を感光させる光を透過させない透過防止層を備える、素子チップの製造方法。 - 前記透過防止層が金属よりなる、請求項11に記載の素子チップの製造方法。
- 基板をエッチングにより個片化して素子チップを製造する素子チップの製造方法であって、
感光性の保護膜を第1の面に備える基板を準備する準備工程と、
前記準備工程の後に、前記第1の面の前記保護膜に保護シートを貼付ける貼付け工程と、
前記貼付け工程の後に、前記保護シートを透過して前記保護膜の少なくとも一部を露光する露光工程と、
前記第1の面と対向する第2の面を研削して前記基板を薄化する研削工程と、
前記研削工程の後に、前記保護シートを剥がして前記第1の面の前記保護膜を露出させる剥離工程と、
前記剥離工程の後に、露光された保護膜と露光されていない保護膜のいずれか一方を選択的に溶解させる現像液に保護膜を接触させることにより、保護膜をパターニングする現像工程と、
パターニングされた前記保護膜をマスクとして基板をエッチングすることにより前記基板を複数の素子チップに個片化する個片化工程と、を含む、素子チップの製造方法。 - 前記保護シートとして熱剥離性の保護シートを用い、
前記剥離工程において前記基板を加熱することにより前記保護シートの粘着力を低下させる、請求項11から13のいずれかに記載の素子チップの製造方法。 - 前記保護シートとして光硬化性の接着層を備える保護シートを用い、
前記貼付け工程において、前記基板の外縁部の前記保護膜に前記接着層によって前記保護シートを貼り付け、
前記剥離工程において、前記外縁部に前記接着層を硬化させる波長の光を照射することにより前記保護シートの粘着力を低下させる、請求項11または13のいずれかに記載の素子チップの製造方法。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015173729A JP6500230B2 (ja) | 2015-09-03 | 2015-09-03 | マスクパターンの形成方法および基板の加工方法ならびに素子チップの製造方法 |
US15/252,899 US9905452B2 (en) | 2015-09-03 | 2016-08-31 | Method of forming mask pattern, method of processing substrate, and method of fabricating element chips |
CN201610795913.6A CN106505028B (zh) | 2015-09-03 | 2016-08-31 | 掩模图案的形成方法、基板的加工方法及元件芯片的制法 |
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