CN1959843A - 用于再生存储在存储介质中的信息的装置和方法 - Google Patents
用于再生存储在存储介质中的信息的装置和方法 Download PDFInfo
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- CN1959843A CN1959843A CNA2006101429908A CN200610142990A CN1959843A CN 1959843 A CN1959843 A CN 1959843A CN A2006101429908 A CNA2006101429908 A CN A2006101429908A CN 200610142990 A CN200610142990 A CN 200610142990A CN 1959843 A CN1959843 A CN 1959843A
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- threshold value
- threshold
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1072—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in multilevel memories
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5642—Sensing or reading circuits; Data output circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C2029/0411—Online error correction
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/563—Multilevel memory reading aspects
- G11C2211/5634—Reference cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Abstract
Description
Claims (12)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005318803A JP4660353B2 (ja) | 2005-11-01 | 2005-11-01 | 記憶媒体再生装置 |
JP2005318803 | 2005-11-01 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1959843A true CN1959843A (zh) | 2007-05-09 |
CN100565703C CN100565703C (zh) | 2009-12-02 |
Family
ID=38071487
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2006101429908A Active CN100565703C (zh) | 2005-11-01 | 2006-10-26 | 用于再生存储在存储介质中的信息的装置和方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7551478B2 (zh) |
JP (1) | JP4660353B2 (zh) |
CN (1) | CN100565703C (zh) |
Families Citing this family (45)
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JP2003346432A (ja) * | 2002-05-22 | 2003-12-05 | Internatl Business Mach Corp <Ibm> | データ記憶装置およびデータ処理方法 |
JP4660353B2 (ja) | 2005-11-01 | 2011-03-30 | 株式会社東芝 | 記憶媒体再生装置 |
JP4575288B2 (ja) * | 2005-12-05 | 2010-11-04 | 株式会社東芝 | 記憶媒体、記憶媒体再生装置、記憶媒体再生方法および記憶媒体再生プログラム |
JP2008066466A (ja) * | 2006-09-06 | 2008-03-21 | Toshiba Corp | 半導体記憶装置およびその読み出し電圧の補正方法 |
US7886204B2 (en) * | 2006-09-27 | 2011-02-08 | Sandisk Corporation | Methods of cell population distribution assisted read margining |
CN101616765A (zh) * | 2007-01-08 | 2009-12-30 | 阿绍克·威施瓦那兹·赛泽 | 用于接合和脱开旋转工具架驱动的驱动连接器的启动系统 |
JP2008217857A (ja) * | 2007-02-28 | 2008-09-18 | Toshiba Corp | メモリコントローラ及び半導体装置 |
JP4564520B2 (ja) | 2007-08-31 | 2010-10-20 | 株式会社東芝 | 半導体記憶装置およびその制御方法 |
JP4538034B2 (ja) * | 2007-09-26 | 2010-09-08 | 株式会社東芝 | 半導体記憶装置、及びその制御方法 |
JP5194775B2 (ja) * | 2007-12-21 | 2013-05-08 | 日本電気株式会社 | 光チャネルモニタのデータ収集方法およびプログラムならびに伝送装置 |
CN101632068B (zh) | 2007-12-28 | 2015-01-14 | 株式会社东芝 | 半导体存储装置 |
JP4439569B2 (ja) | 2008-04-24 | 2010-03-24 | 株式会社東芝 | メモリシステム |
KR101506655B1 (ko) * | 2008-05-15 | 2015-03-30 | 삼성전자주식회사 | 메모리 장치 및 메모리 데이터 오류 관리 방법 |
KR101518199B1 (ko) * | 2008-05-23 | 2015-05-06 | 삼성전자주식회사 | 오류 정정 장치, 그 방법 및 상기 장치를 포함하는 메모리장치 |
JP2010015197A (ja) | 2008-06-30 | 2010-01-21 | Toshiba Corp | ストレージ制御装置、データ復元装置およびストレージシステム |
JP2010015195A (ja) * | 2008-06-30 | 2010-01-21 | Toshiba Corp | 記憶制御装置及び記憶制御方法 |
JP2010009548A (ja) * | 2008-06-30 | 2010-01-14 | Toshiba Corp | 記憶装置、制御装置、記憶システム、および記憶方法 |
JP5242264B2 (ja) * | 2008-07-07 | 2013-07-24 | 株式会社東芝 | データ制御装置、ストレージシステムおよびプログラム |
JP4551958B2 (ja) * | 2008-12-22 | 2010-09-29 | 株式会社東芝 | 半導体記憶装置および半導体記憶装置の制御方法 |
JP5268710B2 (ja) * | 2009-02-27 | 2013-08-21 | 株式会社東芝 | 半導体記憶装置 |
US8077515B2 (en) * | 2009-08-25 | 2011-12-13 | Micron Technology, Inc. | Methods, devices, and systems for dealing with threshold voltage change in memory devices |
KR101678909B1 (ko) * | 2009-09-17 | 2016-11-23 | 삼성전자주식회사 | 플래시 메모리 시스템 및 그것의 소거 리프레쉬 방법 |
US8576625B1 (en) | 2010-04-20 | 2013-11-05 | Marvell International Ltd. | Decoder parameter estimation using multiple memory reads |
US8572445B2 (en) * | 2010-09-21 | 2013-10-29 | Freescale Semiconductor, Inc. | Non-volatile memory (NVM) with imminent error prediction |
JP5039193B2 (ja) | 2010-09-22 | 2012-10-03 | 株式会社東芝 | 半導体記憶装置および制御方法 |
US8665650B2 (en) * | 2011-02-18 | 2014-03-04 | Marvell World Trade Ltd. | Reliability metrics management for soft decoding |
US8472274B2 (en) * | 2011-03-02 | 2013-06-25 | Apple Inc. | Using temperature sensors with a memory device |
JP2011238346A (ja) * | 2011-06-16 | 2011-11-24 | Sandisk Il Ltd | フラッシュメモリ内のエラーから復旧するための方法 |
US8687421B2 (en) | 2011-11-21 | 2014-04-01 | Sandisk Technologies Inc. | Scrub techniques for use with dynamic read |
JP5740296B2 (ja) | 2011-12-16 | 2015-06-24 | 株式会社東芝 | 半導体記憶装置、半導体記憶装置の制御方法、制御プログラム |
US9189313B2 (en) | 2012-08-27 | 2015-11-17 | Kabushiki Kaisha Toshiba | Memory system having NAND-type flash memory and memory controller with shift read controller and threshold voltage comparison module |
US10055232B2 (en) * | 2014-02-07 | 2018-08-21 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device comprising memory circuit |
US9230689B2 (en) | 2014-03-17 | 2016-01-05 | Sandisk Technologies Inc. | Finding read disturbs on non-volatile memories |
DE102014211111A1 (de) * | 2014-06-11 | 2015-12-17 | Robert Bosch Gmbh | Refresh eines Speicherbereichs einer nichtflüchtigen Speichereinheit |
US9607703B2 (en) | 2014-09-08 | 2017-03-28 | Kabushiki Kaisha Toshiba | Memory system |
US9552171B2 (en) | 2014-10-29 | 2017-01-24 | Sandisk Technologies Llc | Read scrub with adaptive counter management |
US9978456B2 (en) | 2014-11-17 | 2018-05-22 | Sandisk Technologies Llc | Techniques for reducing read disturb in partially written blocks of non-volatile memory |
US9349479B1 (en) | 2014-11-18 | 2016-05-24 | Sandisk Technologies Inc. | Boundary word line operation in nonvolatile memory |
JP6497394B2 (ja) * | 2014-11-26 | 2019-04-10 | ソニー株式会社 | メモリシステム、記憶装置、および、メモリシステムの制御方法 |
US9449700B2 (en) | 2015-02-13 | 2016-09-20 | Sandisk Technologies Llc | Boundary word line search and open block read methods with reduced read disturb |
US9786386B2 (en) | 2015-02-27 | 2017-10-10 | Microsoft Technology Licensing, Llc | Dynamic approximate storage for custom applications |
US9653154B2 (en) | 2015-09-21 | 2017-05-16 | Sandisk Technologies Llc | Write abort detection for multi-state memories |
JP6659494B2 (ja) | 2016-08-19 | 2020-03-04 | キオクシア株式会社 | 半導体記憶装置及びメモリシステム |
JP6725375B2 (ja) | 2016-09-14 | 2020-07-15 | キオクシア株式会社 | メモリシステムおよび方法 |
US10957407B1 (en) | 2019-10-30 | 2021-03-23 | International Business Machines Corporation | Calculating corrective read voltage offsets in non-volatile random access memory |
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JP2509297B2 (ja) * | 1987-08-31 | 1996-06-19 | 沖電気工業株式会社 | 自己訂正機能付半導体記憶装置及びマイクロコンピュ―タ |
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US5233559A (en) * | 1991-02-11 | 1993-08-03 | Intel Corporation | Row redundancy for flash memories |
JP2730375B2 (ja) * | 1992-01-31 | 1998-03-25 | 日本電気株式会社 | 半導体メモリ |
US5347489A (en) * | 1992-04-21 | 1994-09-13 | Intel Corporation | Method and circuitry for preconditioning shorted rows in a nonvolatile semiconductor memory incorporating row redundancy |
US5517634A (en) * | 1992-06-23 | 1996-05-14 | Quantum Corporation | Disk drive system including a DRAM array and associated method for programming initial information into the array |
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US5883903A (en) * | 1993-09-20 | 1999-03-16 | Fujitsu Limited | Semiconductor memory of XN type having parity corresponding to n×m bits |
KR0168896B1 (ko) * | 1993-09-20 | 1999-02-01 | 세키자와 다다시 | 패리티에 의해 에러를 수정할 수 있는 반도체 메모리장치 |
AU2593595A (en) * | 1994-06-02 | 1996-01-04 | Intel Corporation | Sensing schemes for flash memory with multilevel cells |
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JP4660353B2 (ja) | 2005-11-01 | 2011-03-30 | 株式会社東芝 | 記憶媒体再生装置 |
JP4575288B2 (ja) | 2005-12-05 | 2010-11-04 | 株式会社東芝 | 記憶媒体、記憶媒体再生装置、記憶媒体再生方法および記憶媒体再生プログラム |
-
2005
- 2005-11-01 JP JP2005318803A patent/JP4660353B2/ja active Active
-
2006
- 2006-09-14 US US11/531,963 patent/US7551478B2/en active Active
- 2006-10-26 CN CNB2006101429908A patent/CN100565703C/zh active Active
Also Published As
Publication number | Publication date |
---|---|
JP4660353B2 (ja) | 2011-03-30 |
US7551478B2 (en) | 2009-06-23 |
JP2007128577A (ja) | 2007-05-24 |
CN100565703C (zh) | 2009-12-02 |
US20070174740A1 (en) | 2007-07-26 |
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Address after: Tokyo Patentee after: TOSHIBA MEMORY Corp. Address before: Tokyo Patentee before: Japanese businessman Panjaya Co.,Ltd. Address after: Tokyo Patentee after: Kaixia Co.,Ltd. Address before: Tokyo Patentee before: TOSHIBA MEMORY Corp. |
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