CN1758421A - 在半导体装置中形成介电层的方法 - Google Patents
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Abstract
本发明公开了一种形成半导体装置的绝缘膜的方法。根据本发明形成绝缘膜,并然后进行退火处理,以去除在该绝缘膜中所包含的释气源。然后,通过热处理去除在该绝缘膜的表面上所形成的缺陷点、副产物或CH-基。因此,可最小化该绝缘膜的表面上的缺陷的产生,并阻止在该绝缘膜上形成如断开或薄图案的故障。因而,本发明的优点在于:可改善制备过程的可靠性和装置的电学特性。
Description
技术领域
本发明涉及一种形成半导体装置的绝缘膜的方法,以及更特别地涉及一种形成半导体装置的绝缘膜的方法,该方法可最小化在该绝膜中所产生的缺陷。
背景技术
在半导体的制备过程中,绝缘膜是用于内层绝缘或内部布线绝缘。此绝缘膜使用TEOS(原硅酸四乙酯)、BPSG(硼磷硅玻璃)、SOD(旋涂式介电材料Spin On Dielectric)等。其中,LP(低压)-TEOS膜具有好的台阶覆盖、好的厚度均匀度、好的生产率等。因此,该LP-TEOS膜已广泛地使用于不需要间隙填补或间隔物的绝缘膜。然而,该LP-TEOS膜在膜质量上不稳定并会在随后热处理中产生严重释气现象(out-gassing).
更特别地,如图1所示,如果在该LP-TEOS膜上沉积其它膜(例如布线)之后,进行热处理,则会因释气现象而产生许多点状的缺陷。图1是SEM的照片,其显示在TEOS膜上所产生的点状缺陷。在图1中,参考序号101表示TEOS膜,102表示氮化物膜,以及103表示缺陷点。
此点缺陷在形成图案的制备过程中会造成缺陷的图案例如断开。
图2是显示因缺陷点的产生所造成的缺陷图案的照片。
参考图2,如果形成TEOS膜,在该TEOS膜上沉积Ti/TiN,并进行退火及图案化处理,则会在整个晶片(wafer)中产生超过4000个像凸状及开口或变薄的缺陷。发现在约317个模具(dies)中产生了这些缺陷。
这些缺陷是由TEOS中固有的膜质量所造成的。即该LP-TEOS膜具有Si(OC2H5)4形状的分子结构并具有大量的氢碳基(CxHy-)。此LP-TEOS膜具有下列特性:在进行随后的热处理时,该LP-TEOS膜具有易挥发的特性。事实上,如果在氮气环境中于800℃进行约1小时的退火,则该LP-TEOS膜的厚度会减少约7.5%。此量符合明显高的数值。如果不能平稳地产生释气现象或形成副产物,则点状的缺陷会存在于该LP-TEOS膜的表面上。
图3是显示在该TEOS膜的表面上所存在的杂质的测量结果的特性曲线图。
从图3可看出,正如SIMS分析结果,不像一般的绝缘膜,在整个膜厚度上方的TEOS膜的表面上存在有大量的H及C成分。
在该TEOS膜中的高浓度的气体成分在随后热处理过程中作为一个无限释气源,并因而造成一贯的(consistent)问题。更特别地,如果是图案制备过程,在该TEOS膜的表面上的缺陷点或碳成分与光致抗蚀剂反应,造成导线在凸出部分上会断开或变薄的故障。
发明内容
因此,考虑到上述问题而作出了本发明,并且本发明的一个目的是提供一种形成半导体装置的绝缘膜的方法,其中以形成该绝缘膜,进行退火处理以去除包含于该绝缘膜中的释气源以及通过热处理去除在该绝缘膜的表面上所形成的缺陷点、副产物或CH-的方式,来最小化绝缘膜表面上的缺陷的产生并阻止在该绝缘膜上形成如断开或薄图案的故障,因而可改善制备过程的可靠度及该装置的电学特性。
为了完成上述目的,根据本发明的一个实施方案提供了一种在半导体装置中形成绝缘膜的方法,其包括下列步骤:在半导体衬底上形成内层绝缘膜,并进行热处理等以便去除包含在该内层绝缘膜中的释气源。
在上述中,该内层绝缘膜是由LP-TEOS、BPSG及SOD中任何一个所构成。
该热处理可以在氧气气氛中、N2O气体气氛中或真空状态中以快速热处理(RTP)模式进行。在此时,该RTP优选是在700℃-1000℃的温度范围内进行20-100秒。
同时,该热处理可以在氧气气氛中、N2O气体气氛中或真空状态中在反应炉中进行。在此时,该热处理优选在700℃-1000℃的温度范围内进行30分钟至1小时。
该方法可进一步包括下列步骤:在进行该热处理之后,对该内层绝缘膜进行表面处理,以去除该内层绝缘膜表面上所吸收的释气源或副产物或者该内层绝缘膜的表面上所形成的点缺陷。
在此时,该表面处理可在氧气等离子处理模式、等离子回蚀刻模式(plasma etch-back mode)、湿式回蚀刻模式或化学机械抛光模式中进行。
在此时,该氧气等离子处理模式的表面处理可进行10-60秒,同时施加200-1000W的电浆功率(plasma power)并供应300-700sccm的氧气。
该等离子回蚀刻模式的表面处理可使用CxFy-基或NF-基的含氟气体进行10-50秒,同时在10mTorr-50mTorr压力下施加300-500W的偏压。在此时,该含氟气体可使用CHF3、CF4及C3F8中之一或其至少一种的混合气体,并可将该含氟气体的流率设定为10-200sccm。
该湿式蚀刻模式的表面处理可使用NH4F-基或NF-基的含氟溶液作为蚀刻剂在常温至70℃的温度下进行1-10分钟。在此时,该含氟溶液优选使用DHF溶液,该DHF溶液以50∶1至200∶1的比率混合H2O及HF,或者使用BOE溶液,该BOE溶液以100∶1至300∶1的比率混合NH4F及DHF。
在CMP模式的表面处理中,优选将目标抛光厚度设定至100以下,浆料使用二氧化硅基的浆料。
附图说明
图1是SEM照片,其显示在TEOS膜上所产生的点状的缺陷;
图2是显示因缺陷点的产生所造成的缺陷图案的照片。
图3是显示在TEOS膜的表面上所存在的杂质的测量结果的特性曲线图。
图4A至4D是用以说明根据本发明的一个实施方案的半导体装置中形成绝缘膜的方法的剖面图;
图5是显示在进行热处理之后在内层绝缘膜的表面上的缺陷的照片;以及
图6是显示进行表面处理之后在内层绝缘膜的表面上的缺陷的照片。
具体实施方式
现在,将参考附图来描述本发明的优选实施方案。因为为了要使本领域一般技术人员能理解本发明而提供了优选的实施方案,所以可以不同方式来修改优选实施方案,并且本发明的范围并非局限于稍后所描述的优选实施方案。此外,在附图中,为了便于说明及清楚而夸大了每层的厚度及尺寸。相同序号是用以识别相同或相似部分。同时,如果描述一膜位于另一膜或半导体衬底″上″,该膜可与另一膜或该半导体衬底直接接触,或者第三膜可介于该膜与该另一膜或该半导体衬底之间。
图4A至4D是用以说明根据本发明的一个实施方案的半导体装置中形成绝缘膜的方法的剖面图。
参考图4A,在半导体衬底401上形成内层绝缘膜402,其中在该半导体衬底上具有用以形成半导体装置的各种元件(未示出),例如晶体管、电容器、闪存单元及金属布线(metal wiring)。
在此时,该内层绝缘膜402可通过LP-TEOS、BPSG或SOD来形成。现将以由LP-TEOS所形成的内层绝缘膜402为实例进行描述。
参考图4B,在形成该内层绝缘膜402之后,进行退火处理,以便去除包含在该内层绝缘膜402中的释气源。
该内层绝缘膜402包含例如碳、氢和CxHy-基的大量成分。这些成分都会变成释气源。如果无法使大量包含在该内层绝缘膜402中的释气源平缓地进行释气源的释气,则会在该内层绝缘膜402的表面上形成副产物。因此,会形成大量具有点状的缺陷。
为了防止此问题,在形成该内层绝缘膜402之后,进行退火处理。
此热处理可在快速热处理(RTP)模式中或在高于沉积该内层绝缘膜402的温度下的反应炉中进行。
具体地,如果在该RTP模式下进行退火处理,则该退火处理可在O2或N2O气体环境中或者在真空状态中,在700℃-1000℃的温度范围进行20-100秒。
如果在该反应炉中进行退火处理,则该退火处理可在O2或N2O气体环境中或者在真空状态中,在700℃-1000℃的温度范围进行30分钟至1小时。
参考图4C,如果通过RTP来排放在该内层绝缘膜402中所包含的释气源,则可大量减少该内层绝缘膜402中所包含的释气源。然而,在该内层绝缘膜402的表面上可残留该释气源或副产物,或者会形成例如点状的缺陷。
图5是显示在实施该热处理之后,该内层绝缘膜表面上的缺陷的照片。
从图5可看出虽然在形成该内层绝缘膜402之后进行了热处理,但是也会产生例如凸部和开口或变薄的缺陷。然而,可看出晶片中的缺陷总数已明显减少为377,并且具有缺陷的模具数几乎减少一半为155。
参考图4D,为了去除图4C中所述的例如释气源、副产物或点状的缺陷,可将该内层绝缘膜402进行表面处理。
此表面处理可在O2等离子处理模式、等离子回蚀刻模式、湿式回蚀刻模式或CMP模式中进行。
如果表面处理是在O2等离子处理模式中进行的,则该表面处理可进行10-60秒,同时施加200-1000W的电浆功率并供应300-700sccm的氧气。
如果表面处理是在等离子回蚀刻模式中进行的,则该表面处理可使用CxFy-基或NF-基的含氟气体进行10-50秒,同时在10mTorr-50mTorr的压力下施加300-500W的偏压。在此时,该含氟气体可使用CHF3、CF4及C3F8中之一或其至少一种的混合气体,并可将该含氟气体的流速设定为10-200sccm。
如果表面处理是在湿式回蚀刻模式中进行的,则该表面处理可使用NH4F-基或NF-基的含氟溶液作为蚀刻剂在常温至70℃的温度下进行1-10分钟。在此时,该含氟溶液可使用DHF溶液,该DHF溶液以50∶1至200∶1的比率混合H2O和HF,或者使用BOE溶液,该BOE溶液以100∶1至300∶1的比率混合NH4F和DHF。
如果表面处理是在CMP模式中进行的,则因为此处理的实施是为了表面处理或缺陷的去除而非抛光,所以优选将目标抛光厚度设定在100以下。在此时,如果要抛光的膜为TEOS-基氧化物膜,则浆料优选使用二氧化硅(SiO2)基的浆料。
图6是显示在进行表面处理之后,在内层绝缘膜表面上的缺陷的照片。
由图6可看出虽然在形成该内层绝缘膜402之后,进行了热处理,但是也会产生例如凸部和开口或变薄的缺陷。然而,可看出晶片中的缺陷总数已明显减少为144,并且具有缺陷的模具数明显减少为137。
如上所述,依据本发明,形成了绝缘膜,并然后进行退火处理,以去除在该绝缘膜中所包含的释气源。然后,通过热处理去除在该绝缘膜的表面上所形成的缺陷点、副产物或CH-基。因此,可最小化该绝缘膜表面上的缺陷的产生,并防止该绝缘膜上所形成的例如断开或薄图案的故障。因此,本发明的优点在于:可改善制备过程的可靠性和装置的电学特性。
虽然已参考优选的实施方案进行了上述的描述,但是应当理解本领域一般技术人员在不脱离本发明的精神及范围和所附权利要求范围的条件下可对本发明进行变更和修改。
Claims (15)
1.一种在半导体装置中形成绝缘膜的方法,所述方法包括下列步骤:
在半导体衬底上形成内层绝缘膜;和
进行热处理,以去除包含在该内层绝缘膜中的释气源。
2.根据权利要求1所述的方法,其中该内层绝缘膜是由LP-TEOS、BPSG和SOD中的任何一个组成。
3.根据权利要求1所述的方法,其中该热处理是在O2气体环境、N2O气体环境或真空状态中以快速热处理(RTP)模式进行的。
4.根据权利要求3所述的方法,其中该RTP是在700℃-1000℃的温度范围进行20-100秒。
5.根据权利要求3所述的方法,其中该热处理是在O2气体环境中、N2O气体环境或真空状态中在反应炉中进行的。
6.根据权利要求5所述的方法,其中该热处理是在700℃-1000℃的温度范围进行30分钟至1小时。
7.根据权利要求1所述的方法,进一步包括下列步骤:在进行热处理之后,对该内层绝缘膜施加表面处理,以去除在该内层绝缘膜的表面上所吸收的释气源或副产物或者在该内层绝缘膜的表面上所形成的点缺陷。
8.根据权利要求7所述的方法,其中该表面处理是在氧气等离子处理模式、等离子回蚀刻模式、湿式回蚀刻模式或化学机械抛光模式中进行的。
9.根据权利要求8所述的方法,其中该氧气等离子处理模式的表面处理进行10-60秒,同时施加200-1000W的电浆功率并供应300-700sccm的氧气。
10.根据权利要求8所述的方法,其中该等离子回蚀刻模式的表面处理是使用CxFy-基或NF-基的含氟气体进行10-50秒,同时在10mTorr-50mTorr压力下施加300-500W的偏压。
11.根据权利要求10所述的方法,其中该含氟气体使用CHF3、CF4及C3F8中之一或其至少一种的混合气体。
12.根据权利要求11所述的方法,其中将该含氟气体的流速设定为10-200sccm。
13.根据权利要求7所述的方法,其中该湿式回蚀刻模式的表面处理可使用NH4F-基或NF-基的含氟溶液作为蚀刻剂在常温至70℃的温度下进行1-10分钟。
14.根据权利要求13所述的方法,其中该含氟溶液使用DHF溶液,该DHF溶液以50∶1至200∶1的比率混合H2O和HF,或者使用BOE溶液,该BOE溶液以100∶1至300∶1的比率混合NH4F和DHF。
15.根据权利要求7所述的方法,其中在CMP模式的表面处理中,将目标抛光厚度设定至100以下,并且浆料使用二氧化硅基的浆料。
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JP (1) | JP2006108607A (zh) |
KR (1) | KR100616187B1 (zh) |
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CN104752315A (zh) * | 2013-12-25 | 2015-07-01 | 旺宏电子股份有限公司 | 半导体元件及其制造方法 |
CN110699663A (zh) * | 2019-09-09 | 2020-01-17 | 长江存储科技有限责任公司 | 金属薄膜沉积方法 |
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DE102004031453B4 (de) * | 2004-06-29 | 2009-01-29 | Qimonda Ag | Verfahren zur Erzeugung eines Dielektrikums und Halbleiterstruktur |
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CN104752315A (zh) * | 2013-12-25 | 2015-07-01 | 旺宏电子股份有限公司 | 半导体元件及其制造方法 |
CN104752315B (zh) * | 2013-12-25 | 2018-03-06 | 旺宏电子股份有限公司 | 半导体元件及其制造方法 |
CN110699663A (zh) * | 2019-09-09 | 2020-01-17 | 长江存储科技有限责任公司 | 金属薄膜沉积方法 |
CN110699663B (zh) * | 2019-09-09 | 2022-11-22 | 长江存储科技有限责任公司 | 金属薄膜沉积方法 |
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