CN1738023A - 三维集成电路及其设计方法 - Google Patents
三维集成电路及其设计方法 Download PDFInfo
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- CN1738023A CN1738023A CN200510078803.XA CN200510078803A CN1738023A CN 1738023 A CN1738023 A CN 1738023A CN 200510078803 A CN200510078803 A CN 200510078803A CN 1738023 A CN1738023 A CN 1738023A
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0688—Integrated circuits having a three-dimensional layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
Description
Claims (32)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/919,121 US7312487B2 (en) | 2004-08-16 | 2004-08-16 | Three dimensional integrated circuit |
US10/919,121 | 2004-08-16 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1738023A true CN1738023A (zh) | 2006-02-22 |
CN100424853C CN100424853C (zh) | 2008-10-08 |
Family
ID=35799172
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB200510078803XA Expired - Fee Related CN100424853C (zh) | 2004-08-16 | 2005-06-20 | 三维集成电路及其设计方法 |
Country Status (3)
Country | Link |
---|---|
US (3) | US7312487B2 (zh) |
CN (1) | CN100424853C (zh) |
TW (1) | TW200629538A (zh) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100440513C (zh) * | 2004-10-15 | 2008-12-03 | 中国科学院上海微系统与信息技术研究所 | 一种三维互补金属氧化物半导体器件结构的制备方法 |
CN101866371B (zh) * | 2009-04-16 | 2012-05-02 | 奇景光电股份有限公司 | 立体集成电路的验证方法 |
CN103681609A (zh) * | 2012-09-25 | 2014-03-26 | 英飞凌科技股份有限公司 | 集成电路、芯片封装以及用于制造集成电路的方法 |
CN103853861A (zh) * | 2012-11-30 | 2014-06-11 | 国际商业机器公司 | 评估3d ic的电源供应的方法和装置 |
CN104617101A (zh) * | 2013-11-05 | 2015-05-13 | 台湾积体电路制造股份有限公司 | 具有多个半导体器件层的半导体结构的系统和方法 |
CN106463522A (zh) * | 2014-01-14 | 2017-02-22 | 麻省理工学院 | 形成集成电路的方法及相关的集成电路 |
CN113809070A (zh) * | 2021-08-11 | 2021-12-17 | 中国科学院微电子研究所 | 一种基带rf一体化集成结构及集成方法 |
Families Citing this family (296)
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US6724655B2 (en) * | 2000-06-22 | 2004-04-20 | Progressant Technologies, Inc. | Memory cell using negative differential resistance field effect transistors |
US7262495B2 (en) * | 2004-10-07 | 2007-08-28 | Hewlett-Packard Development Company, L.P. | 3D interconnect with protruding contacts |
JP4745697B2 (ja) * | 2005-03-29 | 2011-08-10 | 富士通セミコンダクター株式会社 | 複数の配線層を有する半導体回路の端子層設定方法、端子層設定プログラム、配線端子延長処理プログラム、および、その端子層を設定に用いられる端子延長用コンポーネント |
US20070161150A1 (en) * | 2005-12-28 | 2007-07-12 | Intel Corporation | Forming ultra dense 3-D interconnect structures |
US7670927B2 (en) * | 2006-05-16 | 2010-03-02 | International Business Machines Corporation | Double-sided integrated circuit chips |
US8013342B2 (en) | 2007-11-14 | 2011-09-06 | International Business Machines Corporation | Double-sided integrated circuit chips |
JP5380305B2 (ja) * | 2007-01-18 | 2014-01-08 | 株式会社テラセミコン | 半導体素子の製造方法 |
KR100857165B1 (ko) * | 2007-04-13 | 2008-09-05 | 삼성전기주식회사 | 회로기판 제조방법 |
EP1993130A3 (en) * | 2007-05-17 | 2011-09-07 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
US8513791B2 (en) * | 2007-05-18 | 2013-08-20 | International Business Machines Corporation | Compact multi-port CAM cell implemented in 3D vertical integration |
US20080288720A1 (en) * | 2007-05-18 | 2008-11-20 | International Business Machines Corporation | Multi-wafer 3d cam cell |
JP5498670B2 (ja) * | 2007-07-13 | 2014-05-21 | 株式会社半導体エネルギー研究所 | 半導体基板の作製方法 |
US20090026524A1 (en) * | 2007-07-27 | 2009-01-29 | Franz Kreupl | Stacked Circuits |
JP5460984B2 (ja) * | 2007-08-17 | 2014-04-02 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
JP2009076879A (ja) | 2007-08-24 | 2009-04-09 | Semiconductor Energy Lab Co Ltd | 半導体装置 |
JP5268305B2 (ja) | 2007-08-24 | 2013-08-21 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
US8232598B2 (en) * | 2007-09-20 | 2012-07-31 | Semiconductor Energy Laboratory Co., Ltd. | Display device and method for manufacturing the same |
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JP5394043B2 (ja) * | 2007-11-19 | 2014-01-22 | 株式会社半導体エネルギー研究所 | 半導体基板及びそれを用いた半導体装置、並びにそれらの作製方法 |
JP4600576B2 (ja) * | 2008-05-08 | 2010-12-15 | 株式会社デンソー | 半導体装置およびその製造方法 |
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2007
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CN103853861B (zh) * | 2012-11-30 | 2016-12-21 | 国际商业机器公司 | 评估3d ic的电源供应的方法和装置 |
CN104617101A (zh) * | 2013-11-05 | 2015-05-13 | 台湾积体电路制造股份有限公司 | 具有多个半导体器件层的半导体结构的系统和方法 |
CN106463522A (zh) * | 2014-01-14 | 2017-02-22 | 麻省理工学院 | 形成集成电路的方法及相关的集成电路 |
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CN106463522B (zh) * | 2014-01-14 | 2019-12-03 | 麻省理工学院 | 形成集成电路的方法及相关的集成电路 |
CN113809070A (zh) * | 2021-08-11 | 2021-12-17 | 中国科学院微电子研究所 | 一种基带rf一体化集成结构及集成方法 |
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US7723207B2 (en) | 2010-05-25 |
US20060033110A1 (en) | 2006-02-16 |
US20080042140A1 (en) | 2008-02-21 |
US20070287224A1 (en) | 2007-12-13 |
US7312487B2 (en) | 2007-12-25 |
TW200629538A (en) | 2006-08-16 |
CN100424853C (zh) | 2008-10-08 |
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