JP5380305B2 - 半導体素子の製造方法 - Google Patents
半導体素子の製造方法 Download PDFInfo
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- JP5380305B2 JP5380305B2 JP2009546327A JP2009546327A JP5380305B2 JP 5380305 B2 JP5380305 B2 JP 5380305B2 JP 2009546327 A JP2009546327 A JP 2009546327A JP 2009546327 A JP2009546327 A JP 2009546327A JP 5380305 B2 JP5380305 B2 JP 5380305B2
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- 238000004519 manufacturing process Methods 0.000 title claims description 47
- 239000004065 semiconductor Substances 0.000 title claims description 41
- 239000002184 metal Substances 0.000 claims description 92
- 229910052751 metal Inorganic materials 0.000 claims description 92
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 59
- 238000000034 method Methods 0.000 claims description 57
- 238000010438 heat treatment Methods 0.000 claims description 49
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 45
- 229920005591 polysilicon Polymers 0.000 claims description 45
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 29
- 229910052710 silicon Inorganic materials 0.000 claims description 29
- 239000010703 silicon Substances 0.000 claims description 29
- 229910021332 silicide Inorganic materials 0.000 claims description 19
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 19
- 238000002425 crystallisation Methods 0.000 claims description 14
- 230000008025 crystallization Effects 0.000 claims description 14
- 238000005229 chemical vapour deposition Methods 0.000 claims description 8
- 239000011261 inert gas Substances 0.000 claims description 8
- 239000000758 substrate Substances 0.000 claims description 8
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 6
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- 229910052802 copper Inorganic materials 0.000 claims description 6
- 229910052759 nickel Inorganic materials 0.000 claims description 6
- 229910052787 antimony Inorganic materials 0.000 claims description 5
- 238000000231 atomic layer deposition Methods 0.000 claims description 5
- 229910052737 gold Inorganic materials 0.000 claims description 5
- 229910052763 palladium Inorganic materials 0.000 claims description 5
- 229910052709 silver Inorganic materials 0.000 claims description 5
- 229910052719 titanium Inorganic materials 0.000 claims description 5
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 3
- 239000011259 mixed solution Substances 0.000 claims description 3
- 239000000243 solution Substances 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 142
- 239000011229 interlayer Substances 0.000 description 16
- 239000003054 catalyst Substances 0.000 description 14
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 11
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 7
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 5
- 230000007423 decrease Effects 0.000 description 4
- 238000007796 conventional method Methods 0.000 description 3
- 230000010354 integration Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000007429 general method Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 229910005883 NiSi Inorganic materials 0.000 description 1
- 229910005881 NiSi 2 Inorganic materials 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 229910021334 nickel silicide Inorganic materials 0.000 description 1
- RUFLMLWJRZAWLJ-UHFFFAOYSA-N nickel silicide Chemical compound [Ni]=[Si]=[Ni] RUFLMLWJRZAWLJ-UHFFFAOYSA-N 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000007790 solid phase Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
- H01L21/76889—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances by forming silicides of refractory metals
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
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- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Semiconductor Memories (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
Description
21、31 ゲート
22、32 ソース/ドレイン
23、33 層間絶縁層
24、34 コンタクトホール
25 シリコン層
26、35 金属層
27、36 金属シリサイド層
28、37 非晶質シリコン層
29、38 ポリシリコン層
Claims (15)
- 半導体素子の製造方法であって、
半導体基板上に前記半導体素子内に含まれるトランジスタを形成するステップと、
前記トランジスタ上に絶縁層を形成するステップと、
前記絶縁層を選択的に除去してコンタクトホールを形成し、前記コンタクトホールを介して前記トランジスタの所定の領域を露出させるステップと、
前記コンタクトホール内にシリコン層を形成するステップと、
前記絶縁層及び前記シリコン層上に金属層を形成するステップと、
前記シリコン層及び前記金属層を熱処理して金属シリサイド層を形成するステップと、
前記金属層を除去するステップと、
前記絶縁層及び前記金属シリサイド層上に非晶質シリコン層を形成するステップと、
前記非晶質シリコン層を熱処理し、前記金属シリサイド層により前記非晶質シリコン層の結晶化を促進させてポリシリコン層を形成するステップとを含むことを特徴とする半導体素子の製造方法。 - 半導体素子の製造方法であって、
半導体基板上に前記半導体素子内に含まれるトランジスタを形成するステップと、
前記トランジスタ上に絶縁層を形成するステップと、
前記絶縁層を選択的に除去してコンタクトホールを形成し、前記コンタクトホールを介して前記トランジスタのシリコン層を露出させるステップと、
前記絶縁層上及び前記コンタクトホール内に金属層を形成するステップと、
前記金属層及び前記コンタクトホールを介して露出された前記シリコン層を熱処理して金属シリサイド層を形成するステップと、
前記金属層を除去するステップと、
前記絶縁層上及び前記コンタクトホール内に非晶質シリコン層を形成するステップと、
前記非晶質シリコン層を熱処理し、前記金属シリサイド層により前記非晶質シリコン層の結晶化を促進させてポリシリコン層を形成するステップとを含むことを特徴とする半導体素子の製造方法。 - 前記金属層は、Ni、Al、Ti、Ag、Au、Co、Sb、Pd、Cuのうちの少なくとも1つの金属を含むことを特徴とする請求項1又は2に記載の半導体素子の製造方法。
- 前記金属層は、化学蒸着法により形成されることを特徴とする請求項1又は2に記載の半導体素子の製造方法。
- 前記金属層は、原子層蒸着法により形成されることを特徴とする請求項4に記載の半導体素子の製造方法。
- 前記金属層の厚さは、前記非晶質シリコン層の厚さによって決定されることを特徴とする請求項1又は2に記載の半導体素子の製造方法。
- 前記金属シリサイド層を形成する前記ステップにおいて、
熱処理中の温度は250℃から500℃、熱処理に必要な時間は30分から60分、熱処理に必要な雰囲気は不活性ガス雰囲気であることを特徴とする請求項1又は2に記載の半導体素子の製造方法。 - 前記金属層は、SPM溶液(硫酸と過酸化水素水の混合液)により除去されることを特徴とする請求項1又は2に記載の半導体素子の製造方法。
- 前記ポリシリコン層を形成する前記ステップにおいて、
熱処理中の温度は400℃から700℃、熱処理に必要な時間は1時間から10時間、熱処理に必要な雰囲気は不活性ガス雰囲気であることを特徴とする請求項1又は2に記載の半導体素子の製造方法。 - 半導体素子の製造方法であって、
半導体基板上に前記半導体素子内に含まれるトランジスタを形成するステップと、
前記トランジスタ上に絶縁層を形成するステップと、
前記絶縁層を選択的に除去してコンタクトホールを形成し、前記コンタクトホールを介して前記トランジスタのシリコン層を露出させるステップと、
前記絶縁層上及び前記コンタクトホール内にドープされた非晶質シリコン層を形成するステップと、
前記非晶質シリコン層上に金属層を形成するステップと、
前記非晶質シリコン層を熱処理し、前記金属層により前記非晶質シリコン層の結晶化を促進させて、配線層として機能するポリシリコン層を形成するステップとを含むことを特徴とする半導体素子の製造方法。 - 前記金属層は、Ni、Al、Ti、Ag、Au、Co、Sb、Pd、Cuのうちの少なくとも1つの金属を含むことを特徴とする請求項10に記載の半導体素子の製造方法。
- 前記金属層は、化学蒸着法により形成されることを特徴とする請求項10に記載の半導体素子の製造方法。
- 前記金属層の厚さは、前記非晶質シリコン層の厚さによって決定されることを特徴とする請求項10に記載の半導体素子の製造方法。
- 前記非晶質シリコン層を熱処理してポリシリコン層を形成する前記ステップにおいて、
熱処理中の温度は400℃から700℃、熱処理に必要な時間は1時間から10時間、熱処理に必要な雰囲気は不活性ガス雰囲気であることを特徴とする請求項10に記載の半導体素子の製造方法。 - 前記非晶質シリコン層を熱処理してポリシリコン配線層を形成する前記ステップにおいて、
前記ポリシリコン配線層と前記トランジスタの前記シリコン層との間の境界領域内に金属シリサイド層が形成されることを特徴とする請求項10に記載の半導体素子の製造方法。
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KR1020070005514A KR100861796B1 (ko) | 2007-01-18 | 2007-01-18 | 반도체 소자의 배선 형성 방법 |
KR10-2007-0005514 | 2007-01-18 | ||
KR10-2007-0011375 | 2007-02-05 | ||
KR1020070011375A KR100851438B1 (ko) | 2007-02-05 | 2007-02-05 | 반도체 소자의 제조 방법 |
PCT/KR2008/000340 WO2008088199A1 (en) | 2007-01-18 | 2008-01-18 | Method for fabricating semiconductor device |
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KR20180031077A (ko) * | 2009-09-24 | 2018-03-27 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 그 제조 방법 |
WO2011043163A1 (en) | 2009-10-05 | 2011-04-14 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
KR102142450B1 (ko) | 2009-10-30 | 2020-08-10 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 반도체 장치의 제작방법 |
WO2014002353A1 (ja) * | 2012-06-27 | 2014-01-03 | パナソニック株式会社 | 固体撮像素子及びその製造方法 |
US20160276156A1 (en) * | 2015-03-16 | 2016-09-22 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor device and manufacturing process thereof |
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2008
- 2008-01-18 WO PCT/KR2008/000340 patent/WO2008088199A1/en active Application Filing
- 2008-01-18 US US12/523,306 patent/US7928008B2/en not_active Expired - Fee Related
- 2008-01-18 JP JP2009546327A patent/JP5380305B2/ja not_active Expired - Fee Related
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US20100035429A1 (en) | 2010-02-11 |
US7928008B2 (en) | 2011-04-19 |
WO2008088199A1 (en) | 2008-07-24 |
JP2010517264A (ja) | 2010-05-20 |
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