CN1524824A - 电介质瓷体组合物、电子部件及其制造方法 - Google Patents

电介质瓷体组合物、电子部件及其制造方法 Download PDF

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CN1524824A
CN1524824A CNA200310124747XA CN200310124747A CN1524824A CN 1524824 A CN1524824 A CN 1524824A CN A200310124747X A CNA200310124747X A CN A200310124747XA CN 200310124747 A CN200310124747 A CN 200310124747A CN 1524824 A CN1524824 A CN 1524824A
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porcelain body
dielectric medium
oxide
mole
converted
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��ľ����
佐佐木洋
丹羽康夫
渡边松巳
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TDK Corp
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TDK Corp
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Abstract

电介质瓷体组合物,其主成分包含:换算成MgO为53.00-80.00摩尔%的氧化镁,换算成TiO2为19.60-47.00摩尔%的氧化钛,换算成MnO为0.05-0.85摩尔%的氧化锰。该电介质瓷体组合物,还可以含有氧化钒、氧化钇、氧化镱、氧化钬之中的至少任何一种作为副成分,其含量分别换算成V2O5、Y2O3、Yb2O3、Ho2O3为0.00~0.20摩尔%。

Description

电介质瓷体组合物、电子部件及其制造方法
技术领域
本发明涉及电介质瓷体组合物、电子部件及其制造方法,更具体地讲,涉及以贱金属为内部电极的叠层陶瓷电容器等电子部件所适用的非还原性温度补偿用电介质瓷体组合物。
背景技术
叠层陶瓷电容器作为电子部件得到广泛利用,一台电子机器中使用的个数也会达到多个。制造叠层陶瓷电容器通常是利用薄片法或印刷法等层叠内部电极层用的浆料和电介质层用的浆料,同时进行烧结。
但是,以往的叠层陶瓷电容器等使用的电介质瓷体材料,如果在还原性气氛下进行烧结,则发生还原,具有所谓的半导体化的性质。因此,作为内部电极的材料使用Pd等贵金属,这些贵金属在电介质瓷体材料的烧结温度下不会熔融,并且即使在不使电介质瓷体材料半导体化的高氧分压下烧结,也不会氧化。
但是,由于Pd等贵金属价格高,成为期望叠层陶瓷电容器低价格化的主要障碍。这样,使用比较廉价的Ni或Ni合金等贱金属作为内部电极已经成为主流。
然而,使用贱金属作为内部电极的导电材料时,如果在大气中进行烧结,则内部电极层就会氧化。因而,必须在还原性气氛中同时进行电介质层和内部电极层的烧结。
但是,如果在还原性气氛中烧结,则电介质层发生还原,绝缘电阻就会降低。因此,提出了非还原性电介质材料。例如Mg-Ti-O系电介质瓷体组合物的介电率温度特性优异,作为温度补偿用瓷体电容器得到广泛使用。
可是,已有报道这些Mg-Ti-O系电介质瓷体组合物如果在还原性气氛下烧结,则会还原,成为半导体化,低电阻化的性质变大(参见非专利文献1,Journalof the Ceramic Society of Japan 100[10]1992的“通过还原中处理的MgTiO3陶瓷的相·微结构的变化”)。而且,Mg-Ti-O系电介质瓷体组合物在烧结时产生富钛异相(针状结晶)的析出,难以控制组成。
专利文献1:特开平11-240753号公报、专利文献2:特开平11-278925号公报、专利文献3:特开平8-45348中公开了以MgTiO3为主成分的电介质瓷体组合物。但是,这些专利文献1-3中记载的电介质瓷体组合物,不是仅能够与Ni内部电极对应的非还原性电介质瓷体组合物。
发明内容
针对这种现状,本发明的目的在于提供一种相对介电常数高、介电损耗小的非还原性电介质瓷体组合物,适用于以Ni等贱金属作为内部电极的叠层陶瓷电容器,即使在还原性气氛中烧结也难以低电阻化。
为了实现上述目的,本发明人等根据锐意研究的结果,发现含有以换算成MgO为53.00-80.00摩尔%的氧化镁,换算成TiO2为19.60-47.00摩尔%的氧化钛,换算成MnO为0.05-0.85摩尔%的氧化锰为主成分的电介质瓷体组合物,即使在还原性气氛中烧结时也难以低电阻化,相对介电常数高,介电损耗小,据此完成了本发明。
亦即,根据本发明的电介质瓷体组合物,含有的主成分为,换算成MgO为53.00-80.00摩尔%的氧化镁、优选是60.00-70.00摩尔%,换算成TiO2为19.60-47.00摩尔%的氧化钛、优选是29.60-39.90摩尔%,换算成MnO为0.05-0.85摩尔%的氧化锰、优选是0.20-0.60摩尔%。
如果氧化镁含量过少,则在还原气氛中烧结时存在还原并半导体化的倾向;如果含量过多,则存在相对介电常数降低的倾向。
如果氧化钛的含量过少,则存在相对介电常数降低的倾向;如果含量过多,则存在易于还原并半导体化的倾向。
如果氧化锰含量过少,则存在易于还原并半导体化的倾向;如果含量过多,则存在易于发生与含有镍等贱金属的内部电极材料的偏析(Mn-Ni-O等的偏析),接触不良,可靠性降低的倾向。
本发明的电介质瓷体组合物,优选含有氧化钒、氧化钇、氧化镱、氧化钬之中的至少一种作为副成分,相对于电介质瓷体组合物整体,其含量分别换算成V2O5、Y2O3、Yb2O3、Ho2O3为0.00~0.20摩尔%,优选含有0.00~0.05摩尔%,
这些副成分与氧化锰一样是赋予耐还原性的材料。这些副成分的添加量如果过多,则存在易于产生偏析、形成接触不良、可靠性降低的倾向。
本发明的电介质瓷体组合物的制造方法,包括以下工序:
准备上述电介质瓷体组合物的原料的工序,
在1300℃以下,优选在1150~1300℃、更优选在1250~1300℃的温度对所述原料进行烧结,获得所述电介质瓷体组合物的工序。
如果烧结温度过高,则存在晶粒急剧生长、异相(富钛相)易于析出、易于半导体化、可靠性(高温负载试验)降低的倾向。
所述原料优选在还原气氛中烧结后,进行退火处理(再氧化处理)。通过进行退火处理,提高绝缘电阻。而且,烧结时的还原气氛的氧分压优选是10-9~10-13MPa(10-8~10-12atm)。退火温度优选是1150℃以下,其气氛中的氧分压优选是10-6~10-9MPa(10-5~10-8atm)。
根据本发明的电子部件是具有电介质层的电子部件,所述的电介质层由上述的电介质瓷体组合物构成。
本发明的电子部件优选是内部电极和电介质层交替层叠的叠层陶瓷电容器等的电子部件。
根据本发明,内部电极在至少含有镍等贱金属时为较佳。
根据本发明的电子部件的制造方法,其特征在于所述内部电极和电介质层同时在1300℃以下烧结。
附图说明
以下,根据附图展示的实施例对本发明予以说明。
图1是根据本发明一个实施方式的叠层陶瓷电容器的剖面图。
图2A是根据本发明实施例的电介质瓷体组合物的SEM照片。
图2B是根据比较例的电介质瓷体组合物的SEM照片。
具体实施方式
叠层陶瓷电容器
如图1所示,作为根据本发明一个实施方式的电子部件的叠层陶瓷电容器1,具有电介质层2和内部电极层3交替层叠构成的电容器元件本体10。在该电容器元件本体10的两端,形成有与在元件本体10内部交替配置的内部电极层3分别导通的一对外部电极4。对电容器元件本体10的形状没有特别的限制,但是通常形成长方体。而且,对其尺寸也没有特别的限制,应根据用途确定适当的尺寸,通常在(0.6~5.6mm)×(0.3~5.0mm)×(0.3~1.9mm)左右。
内部电极层3是层叠的,使其各端面在电容器元件本体10的对置两端的表面交替露出。一对外部电极4形成在电容器元件本体10的两端部,与交替配置的内部电极层3的露出端面连接,构成电容器电路。
电介质层2
电介质层2含有本发明的电介质瓷体组合物。
本发明的电介质瓷体组合物的主成分含有:氧化镁,换算成MgO为53.00-80.00摩尔%、优选是60.00-70.00摩尔%;氧化钛,换算成TiO2为19.60-47.00摩尔%、优选是29.60-39.90摩尔%;氧化锰,换算成MnO为0.05-0.85摩尔%、优选是0.20-0.60摩尔%。
如果氧化镁含量过少,则在还原气氛中烧结时存在还原并半导体化的倾向;如果含量过多,则存在相对介电常数降低的倾向。
如果氧化钛的含量过少,则存在相对介电常数降低的倾向;如果含量过多,则存在易于还原并半导体化的倾向。
如果氧化锰含量过少,则存在易于还原并半导体化的倾向;如果含量过多,则存在易于发生与含有镍等贱金属的内部电极材料的偏析(Mn-Ni-O等的偏析),接触不良,可靠性降低的倾向。
本发明的电介质瓷体组合物,优选含有氧化钒、氧化钇、氧化镱、氧化钬之中的至少一种作为副成分,相对于电介质瓷体组合物整体,其含量分别换算成V2O5、Y2O3、Yb2O3、Ho2O3为0.00~0.20摩尔%,优选含有0.00~0.05摩尔%。
这些副成分与氧化锰一样是赋予耐还原性的材料。这些副成分的添加量如果过多,则存在易于产生偏析、形成接触不良、可靠性降低的倾向。
而且,图1所示的电介质层2的层数和厚度等诸条件,应根据目的和用途适当决定。而且,电介质层2由结晶晶粒和晶界相构成,电介质层2的结晶晶粒的平均粒径优选在3.0μm以下。该晶界相其成分通常是构成电介质材料或者内部电极材料的材质的氧化物、或者其它用途添加的材质的氧化物、甚至作为工序中杂质混入的材质的氧化物,通常由玻璃或者玻璃材质构成。
内部电极层3
对内部电极层3含有的导电材料没有特别的限制,但是由于电介质层2的构成材料具有耐还原性,所以可以使用贱金属。作为用于导电材料的贱金属,优选是镍或者镍合金。作为镍合金,优选是选自Mn、Cr、Co和Al之中的一种以上的元素和镍的合金,合金中的镍含量优选在95重量%以上。而且,镍或者镍合金中也可以含有0.1重量%左右以下的P、Fe、Mg等各种微量成分。
内部电极层的厚度应根据用途等适当决定,通常在0.5~5μm左右,优选在1~2.5μm左右。
外部电极4
对外部电极4含有的导电材料没有特别的限制,通常使用铜或铜合金、或者镍或镍合金等。而且,当然也可以使用银或Ag-Pd合金等。本实施方式中使用廉价的镍、铜、或者它们的合金。应根据用途等适当决定外部电极的厚度,通常优选在10~50μm左右。
叠层陶瓷电容器的制造方法
采用本发明的电介质瓷体组合物的叠层陶瓷电容器,与已有的叠层陶瓷电容器同样,通过使用浆料的通常印刷法或者薄片法,制备生坯芯片(グリ一ンチツブ),对其进行烧结后,通过印刷或者转印、烧结来制造外部电极。以下将对制造方法做具体说明。
首先,分别制造电介质层用浆料、内部电极用浆料、外部电极用浆料。
电介质层用浆料
电介质层用浆料可以是电介质原料和有机媒液混练的有机系涂料,也可以是水系涂料。
就电介质原料而言,根据所述的本发明的电介质瓷体组合物的组成,使用构成主成分和副成分的原料。而且,对原料形态没有特别的限制,使用构成主成分和副成分的氧化物和/或通过烧结成为氧化物的化合物,这些原料也可以是通过液相合成法或者固相法等获得的粉末体。
而且,作为通过烧结成为氧化物的化合物,列举有碳酸盐、硝酸盐、草酸盐、有机金属化合物等。当然,氧化物和通过烧结成为氧化物的化合物也可以并用。应按烧结后形成上述电介质瓷体组合物的组成来决定电介质原料中的各种化合物的含量。本实施方式中使用的这些原料粉末的平均粒径在0.0005~2.0μm左右。
有机媒液是将粘合剂溶解在有机溶剂中所得的,对有机媒液所用的粘合剂没有特别的限制,可以从乙基纤维素、聚乙烯醇缩丁醛等通常的各种粘合剂中适当选取。而且,对此时使用的有机溶剂也没有特别的限制,可以根据印刷法或薄片法等使用方法,从萜品醇、丁基卡必醇、丙酮、甲苯等有机溶剂中适当选取。
作为水溶系涂料是将水溶性粘合剂、分散剂等溶解在水中而得的,对水溶系粘合剂没有特别的限制,可以从聚乙烯醇、纤维素、水溶性丙烯酸树脂、乳胶等中适当选取。
在本实施方式中,对上述电介质原料粉末称重后,加入作为媒介的水,混合1 0~40小时左右后,使混合物干燥,然后在优选的1100℃~1300℃、2~4小时的条件下对该干燥物煅烧(饭烧成)。之后,采用球磨等对锻烧物进行湿法粉碎再干燥,随后,与上述媒液混合,调和成浆料,形成电介质浆料。
内部电极用浆料,外部电极用浆料
内部电极用浆料是将上述各种导电性金属或合金构成的导电材料或者经烧结后由上述导电材料构成的各种氧化物、有机金属化合物、树脂酸盐(レジネ一ト)等与上述有机媒液混练调制。而且,外部电极用浆料也是与内部电极用浆料同样调制。
对上述各浆料的有机媒液含量没有特别的限制,通常的含量例如可以是粘合剂1~5重量%左右,溶剂10~50重量%左右。各浆料中可以根据需要含有选自各种分散剂、增塑剂、电介质、绝缘体等之中的添加物。
在采用印刷法时,在聚对苯二甲酸乙二醇酯等基片上层叠印刷电介质浆料和内部电极用浆料,通过切断成预定形状后与基片剥离,形成生坯芯片。与此相对,在采用薄片法时,使用电介质浆料形成生坯薄片(グリ一ンシ一ト),在其上印刷内部电极浆料后,将它们层叠,形成生坯芯片。
然后,对该生坯芯片进行脱粘合剂处理和烧结。
脱粘合剂处理
脱粘合剂处理可以在通常的条件下进行,但是在内部电极层的导电材料使用镍或镍合金等贱金属的情形,是在空气气氛中进行,升温速度为5~300℃/小时,10~100℃/小时更优选,保温温度为180~400℃,200~300℃更优选,保温时间为05~24小时,5~20小时更优选。
烧结
生坯芯片的烧结气氛应根据内部电极用浆料中的导电材料种类适当决定,在导电材料使用镍或镍合金等贱金属的情形,优选形成还原气氛,烧结气氛的氧分压优选10-9~10-16MPa(10-8~10-15atm),在10-9~10-13MPa(10-8~10-12atm)更优选。烧结时的氧分压如果过低,则存在内部电极的导电材料出现异常烧结而断路的倾向,氧分压如果过高,则存在内部电极被氧化的倾向。
烧结的保温温度在1300℃以下,较优选在1000~1300℃,更优选在1200~1300℃。保温温度如果过低,则存在致密化不充分的倾向,保温温度如果过高,则存在内部电极的异常烧结引起的电极断路或者内部电极材质的扩散引起电容温度特性劣化的倾向。
作为除此之外的烧结条件,升温速度为50~500℃/小时,200~300℃/小时更优选,保温时间为0.5~8小时,1~3小时更优选,冷却速度为50~500℃/小时,200~300℃/小时更优选,烧结气氛优选还原性气氛,气氛气体例如优选氮气气体和氢气气体的混合气体加湿后使用。
在还原性气氛烧结时,优选对电容器芯片的烧结体进行退火(热处理)。
退火(热处理)
退火是用于将电介质层再氧化的处理,由此可以增加绝缘电阻。退火气氛的氧分压优选在10-10MPa(10-9atm)以上,在10-6~10-9MPa(10-5~10-8atm)更优选。氧分压如果过低,则存在电介质层2的再氧化困难的倾向,氧分压如果过高,则存在内部电极层3被氧化的倾向。
退火时的保温温度在1150℃以下,在500~1100℃更优选。保温温度如果过低,则存在电介质层的再氧化不充分、绝缘电阻劣化、其加速寿命也短的倾向。而且,保温温度如果过高,则存在不但内部电极被氧化、电容降低,而且还发生与电介质基体反应、电容温度特性、绝缘电阻及其加速寿命劣化的倾向。而且,退火可以仅由升温行程和降温行程构成。在这种情形,保温时间为零,保温温度与最高温度是同一含义。
作为除此之外的退火条件,保温时间为0~20小时,6~10小时更好,冷却速度为50~500℃/小时,100~300℃/小时更好,退火气氛的气体例如优选氮气气体加湿后使用。
而且,与上述烧结同样地,在所述脱粘合剂处理和退火工序中,由于对氮气气体或混合气体加湿,例如可以使用润湿剂等,此时的水温希望在5~75℃。
而且,这些脱粘合剂处理、烧结和退火可以连续进行,也可以相互独立地进行。在连续进行这些处理的情形,更优选的是,脱粘合剂处理之后不冷却,而是改变气氛,继续升温直到烧结时的保温温度,进行烧结,接着冷却,达到退火的保温温度,然后改变气氛,进行退火处理。另一方面,在独立进行这些处理的情形,关于烧结,在氮气气体或者加湿的氮气气体气氛下,升温直到脱胶处理时的保温温度后,优选改变气氛继续进一步升温,冷却到退火的保温温度后,优选再次改变为氮气气体或者加湿的氮气气体气氛继续冷却。而且,关于退火,可以在氮气气体气氛下升温到保温温度后改变气氛,也可以在加湿的氮气气体气氛下进行退火全工序。
例如通过滚筒研磨或喷沙对以上所得电容器烧结体进行端面研磨,印刷或转印外部电极用浆料并进行烧结,形成外部电极4。外部电极用浆料的烧结条件例如优选在加湿的氮气气体和氢气气体的混合气体中、于600~800℃进行10分钟~1小时左右。而且,根据需要可以在外部电极4的表面通过电镀形成被覆层(焊盘(パツド)层)。
这样制造的本实施方式的陶瓷电容器1通过焊锡等安装在印刷基片上,用于各种电子机器。
本发明并不限于上述实施方式,在本发明的范围内可以做出各种改变。
例如,在上述实施方式中,作为根据本发明的电子部件举例说明了叠层陶瓷电容器,但是作为根据本发明的电子部件,并不限于叠层陶瓷电容器,由上述组成的电介质瓷体组合物构成的电介质层可以用于其它部件。
【实施例】
以下,将列举本发明更具体化的实施例,对本发明做更详细的说明。但是,本发明并不仅限于这些实施例。
实施例1
首先,准备平均粒径分别为0.1~1.0μm的主成分原料(MgO、TiO2、MnCO3),以及副成分原料(V2O5、Y2O3、Yb2O3、Ho2O3),作为制作电介质材料的原材料。
按烧结后的组成成为下列表1所示组成那样对这些原料称量后,在这些原料中加入作为媒介的水,进行16小时的球磨混合,之后,干燥该混合物,在1200℃和2小时的条件下对该干燥物煅烧。然后,将所得煅烧物进行球磨湿法粉碎,干燥。
这样所得干燥后的电介质原料100重量份、丙烯酸树脂5.4重量份、MEK(甲基醚酮)16重量份、丙酮45重量份、矿物油精6重量份、甲苯4重量份在球磨机中混合成浆料,获得电介质层用浆料。
然后,平均粒径为0.8μm的镍颗粒100重量份、有机媒液(8重量份的乙基纤维素溶解在92重量份的丁基卡必醇中)35重量份、丁基卡必醇7重量份利用三个辊子进行混练,浆料化,获得内部电极用浆料。
随后,对平均粒径为0.5μm的铜颗粒100重量份、有机媒液(8重量份的乙基纤维素树脂溶解在92重量份的丁基卡必醇中)35重量份、丁基卡必醇7重量份进行混练,浆料化,获得内部电极用浆料。
首先,使用上述电介质层用浆料,在PET薄膜上形成厚25μm的生坯薄片,在其上印刷内部电极用浆料后,从PET薄膜剥离生坯薄片。然后,将这些生坯薄片与保护用生坯薄片(未印刷内部电极用浆料的薄片)层叠压接,获得生坯芯片。具有内部电极的薄片的层叠数量为4层。
之后,按预定尺寸切断生坯芯片,进行脱粘合剂处理、烧结和退火(热处理),获得叠层陶瓷烧结体。脱粘合剂处理的条件是,升温速度为15℃/小时,保温温度280℃,保温时间8小时,空气气氛。而且,烧结条件是,升温速度200℃/小时,保温温度1300℃,保温时间2小时,冷却速度300℃/小时,加湿的N2+H2混合气体气氛(氧分压10-9~10-13MPa(10-8~10-12atm))。退火条件是,保温温度1100℃,保温时间3小时,冷却速度300℃/小时,加湿的N2气体气氛(氧分压10-6MPa(10-5atm))。烧结和退火时的气氛气体的加湿是使用35℃的水作为加湿剂。
然后,通过喷沙对叠层陶瓷烧结体的端面进行研磨后,在端面转印外部电极用浆料,在加湿的N2+H2气氛中,在80℃烧结10分钟,形成外部电极,获得图1所示构成的叠层陶瓷电容器的样品。
如此获得的各样品的尺寸是3.2mm×1.6mm×0.6mm,夹持内部电极层的电介质层的数量是4,其厚度是15μm,内部电极层的厚度是2μm。对各样品进行以下的特性评价。
相对介电常数(εr)、介质损耗角正切(tanδ)、绝缘电阻(IR)
在基准温度25℃下,采用数字LCR仪(YHP公司制造4274A),在频率1kHz、输入信号电平(测定电压)1Vrms的条件下,测量电容器样品的静电电容。而且,由所得的静电电容和电容器样品的电极尺寸以及电极间距算出相对介电常数(无单位)。
并且,在25℃和1kHz的条件下,利用相对介电常数测定用的LCR仪测定电容器样品的介质损耗角正切(单位是%)。
采用绝缘电阻计(アドバンテスト公司制造R8340A)在25℃和DC50V的条件下,测定绝缘电阻(单位Ω)。结果如表1所示。
【表1】
               组成[mol%]                添加物[mol%]                  电气特性
    MgO     TiO2     MnO     V2O5     Y2O3     Yb2O3     Ho2O3     εs   tanδ[%]      IR[Ω]
    ※1     49.79     49.79     0.42     0.00     0.00     0.00     0.00     27      3.51     不能测定
    ※2     50.00     50.00     0.00     0.00     0.00     0.00     0.00     32      6.04     不能测定
    ※3     66.67     33.33     0.00     0.00     0.00     0.00     0.00     21      0.10     不能测定
    4     66.62     33.31     0.08     0.00     0.00     0.00     0.00     17      0.08     5*1010
    5     66.52     33.26     0.23     0.00     0.00     0.00     0.00     17      0.07     6*1010
    6     66.42     33.21     0.38     0.00     0.00     0.00     0.00     19      0.05     3*1010
    7     66.27     33.13     0.60     0.00     0.00     0.00     0.00     19      0.05     7*1010
    8     66.17     33.08     0.75     0.00     0.00     0.00     0.00     20      0.05     8*1010
    9     66.13     33.06     0.81     0.00     0.00     0.00     0.00     19      0.05     8*1010
    ※10     66.09     33.05     0.86     0.00     0.00     0.00     0.00     6      1.50     3*1013
    ※11     52.16     47.42     0.42     0.00     0.00     0.00     0.00     26      3.08     3*107
    12     54.32     45.27     0.41     0.00     0.00     0.00     0.00     20      0.09     5*1010
    13     79.73     19.93     0.34     0.00     0.00     0.00     0.00     14      0.04     7*1010
    ※14     80.12     19.54     0.34     0.00     0.00     0.00     0.00     8      0.05     9*1010
    15     66.42     33.21     0.28     0.10     0.00     0.00     0.00     19      0.05     3*1010
    16     66.42     33.21     0.18     0.20     0.00     0.00     0.00     18      0.05     1*1010
    ※17     66.42     33.21     0.13     0.25     0.00     0.00     0.00     16      0.09     1*1010
    18     66.42     33.21     0.28     0.00     0.10     0.00     0.00     19      0.05     1*1010
    19     66.42     33.21     0.28     0.00     0.00     0.10     0.00     19      0.05     5*1010
    20     66.42     33.21     0.28     0.05     0.05     0.00     0.00     19      0.05     2*1010
    21     66.42     33.21     0.28     0.00     0.05     0.05     0.00     19      0.05     2*1010
    22     66.42     33.21     0.28     0.03     0.03     0.03     0.00     19      0.05     2*1010
    23     66.42     33.21     0.18     0.20     0.00     0.00     0.10     19      0.05     4*1010
    24     66.42     33.21     0.28     0.03     0.00     0.00     0.00     20      0.04     3*1011
    25     66.42     33.21     0.28     0.00     0.03     0.00     0.00     20      0.04     3*1011
    26     66.42     33.21     0.28     0.00     0.00     0.03     0.00     20      0.04     3*1011
    27     66.42     33.21     0.28     0.00     0.00     0.00     0.03     20      0.04     3*1011
※表示范围外。
在表1中,试样编号标有※的表示处于本发明优选组成范围之外的试样编号。其它的表也相同。
评价1
如表1所示,通过对比试样编号1~14,可以确认电介质瓷体组合物优选含有:氧化镁换算成MgO为53.00-80.00摩尔%、优选是60.00-70.00摩尔%,氧化钛换算成TiO2为19.60-47.00摩尔%、优选是29.60-39.90摩尔%,氧化锰换算成MnO为0.05-0.85摩尔%、优选是0.20-0.60摩尔%。亦即,可以确认,在这些组成比例的情形,即使在还原性气氛中烧结,也难以造成低电阻化,相对介电常数较高,介电损耗较少。
此外,比较试样编号15~23,可以确认,作为电介质瓷体组合物的副成分,优选是含有氧化钒、氧化钇、氧化镱、氧化钬中的至少任何一种,相对于电介质瓷体组合物整体,其含量分别换算成V2O5、Y2O3、Yb2O3、Ho2O3为0.00~0.20摩尔%。即,由于按预定的摩尔%含有这些副成分,因而即使在还原性气氛中烧结,也难以造成低电阻化,介电常数较高,介电损耗较少。
而且,通过对比试样编号24~27和试样编号15,可以确认,在上述0.00~0.20摩尔%之中,以0.00~0.05摩尔%为特别优选。
实施例2
除了烧结温度在1250℃或者1350℃之外,其余与实施例1的试样编号6相同,制造电容器样品。与实施例1相同地进行绝缘电阻的试验。而且,实施例2进行高温负载试验,还测定其不合格率,同时观察电容器样品的电介质层的剖面SEM照片,调查有无异相(富钛相),结果如表2所示。
【表2】
  烧结温度(℃)  异相(富钛相)    电气特性IR[Ω]  高温负载试验不合格率[%]
    24     1250     无     2×1010      0.0
    6     1300     无     3×1010      0.0
    ※25     1350     有     不能测定      100.0
高温负载试验是对相同条件制造的20个电容器样品在150℃下施加DC100V,在此状态下放置1000小时,之后测定绝缘电阻(IR)。对20个电容器样品分别判断绝缘电阻(IR)不足1×108Ω的不合格品,求出其不合格率。
图2(A)展示了试样编号6的电介质层的剖面SEM照片,试样编号26的电介质层的剖面SEM照片。根据是否观察到图2(B)所示的异相,判断有无异相。
评价2
如表2所示,通过对比试样编号6、24、25,可以确认,烧结温度优选在1300℃以下,例如在1250℃烧结。而且,从表2所示结果可以确认,在产生异相的场合,电介质层发生半导体化,可靠性降低。
实施例3
除了进行退火处理之外,其余与实施例1的试样编号6相同地制造电容器样品,与实施例1相同地进行绝缘电阻的试验。结果如表3所示。
【表3】
  退火(仅仅N2)   电气特性IR[Ω]
    26       无      4×109
    6       有      3×1010
评价3
如表3所示,通过比较试样编号26和试样编号6,可以确认,通过进行退火处理提高了绝缘电阻。
如以上说明,根据本发明,可以提供适用于以镍等贱金属作为内部电极的叠层陶瓷电容器、即使在还原性气氛中烧结也难以发生低电阻化、且相对介电常数高、介电损耗低的非还原性电介质瓷体组合物。

Claims (11)

1.电介质瓷体组合物,其主成分包含:换算成MgO为53.00-80.00摩尔%的氧化镁,换算成TiO2为19.60-47.00摩尔%的氧化钛,换算成MnO为0.05-0.85摩尔%的氧化锰。
2.根据权利要求1的电介质瓷体组合物,其主成分包含:换算成MgO为60.00-70.00摩尔%的所述氧化镁,换算成TiO2为29.60-39.90摩尔%的所述氧化钛,换算成MnO为0.20-0.60摩尔%的所述氧化锰。
3.根据权利要求1的电介质瓷体组合物,进一步含有氧化钒、氧化钇、氧化镱、氧化钬之中的至少任何一种作为副成分,相对于电介质瓷体组合物整体,其含量分别换算成V2O5、Y2O3、Yb2O3、Ho2O3为0.00~0.20摩尔%。
4.根据权利要求3的电介质瓷体组合物,含有所述氧化钒、氧化钇、氧化镱、氧化钬之中的至少任何一种,相对于电介质瓷体组合物整体,其含量分别换算成V2O5、Y2O3、Yb2O3、Ho2O3为0.00~0.05摩尔%。
5.制造权利要求1或3所述的电介质瓷体组合物的方法,包括以下工序:
准备所述电介质瓷体组合物的原料的工序;
在1300℃以下的温度烧结所述原料,获得所述电介质瓷体组合物的工序。
6.根据权利要求5的电介质瓷体组合物的制造方法,其特征在于,在还原性气氛中烧结所述原料后,进行退火处理。
7.具有电介质层的电子部件,其特征在于,所述电介质层由权利要求1或3所述的电介质瓷体组合物构成。
8.电子部件,其内部电极和电介质层交替层叠,其特征在于,所述电介质层由权利要求1或3所述的电介质瓷体组合物构成。
9.根据权利要求8的电子部件,所述内部电极至少含有镍。
10.制造权利要求8或9所述的电子部件的方法,其特征在于,在1300℃以下同时烧结所述内部电极和电介质层。
11.根据权利要求8的电子部件的制造方法,其特征在于,在还原性气氛中烧结所述电介质瓷体组合物的原料后,进行退火处理。
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CN106630999A (zh) * 2016-10-09 2017-05-10 龚娟 一种电子陶瓷材料的制备方法

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