CN1428835A - 半导体元件的元件隔离膜的形成方法 - Google Patents
半导体元件的元件隔离膜的形成方法 Download PDFInfo
- Publication number
- CN1428835A CN1428835A CN02154239A CN02154239A CN1428835A CN 1428835 A CN1428835 A CN 1428835A CN 02154239 A CN02154239 A CN 02154239A CN 02154239 A CN02154239 A CN 02154239A CN 1428835 A CN1428835 A CN 1428835A
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- CN
- China
- Prior art keywords
- film
- silicon substrate
- formation method
- silicon
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 46
- 239000004065 semiconductor Substances 0.000 title claims abstract description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 41
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 41
- 239000010703 silicon Substances 0.000 claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 230000015572 biosynthetic process Effects 0.000 claims description 25
- 238000000407 epitaxy Methods 0.000 claims description 2
- 238000002955 isolation Methods 0.000 abstract description 9
- 238000005530 etching Methods 0.000 abstract description 6
- 230000000873 masking effect Effects 0.000 abstract description 5
- 238000009413 insulation Methods 0.000 abstract 3
- 238000001312 dry etching Methods 0.000 abstract 1
- 230000007797 corrosion Effects 0.000 description 11
- 238000005260 corrosion Methods 0.000 description 11
- 238000005516 engineering process Methods 0.000 description 9
- 230000006378 damage Effects 0.000 description 7
- 230000003647 oxidation Effects 0.000 description 5
- 238000007254 oxidation reaction Methods 0.000 description 5
- 150000004767 nitrides Chemical class 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- 230000007547 defect Effects 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- SBEQWOXEGHQIMW-UHFFFAOYSA-N silicon Chemical compound [Si].[Si] SBEQWOXEGHQIMW-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
- H01L21/76235—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls trench shape altered by a local oxidation of silicon process step, e.g. trench corner rounding by LOCOS
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
Abstract
Description
Claims (2)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR81811/01 | 2001-12-20 | ||
KR10-2001-0081811A KR100449320B1 (ko) | 2001-12-20 | 2001-12-20 | 반도체 소자의 소자 분리막 형성방법 |
KR81811/2001 | 2001-12-20 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1428835A true CN1428835A (zh) | 2003-07-09 |
CN1312753C CN1312753C (zh) | 2007-04-25 |
Family
ID=19717320
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB021542392A Expired - Fee Related CN1312753C (zh) | 2001-12-20 | 2002-12-20 | 半导体元件的元件隔离膜的形成方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US6743665B2 (zh) |
JP (1) | JP3993820B2 (zh) |
KR (1) | KR100449320B1 (zh) |
CN (1) | CN1312753C (zh) |
TW (1) | TWI287269B (zh) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100358155C (zh) * | 2005-10-14 | 2007-12-26 | 西安电子科技大学 | 等离子体平板显示器寻址驱动芯片制备方法 |
CN102427051A (zh) * | 2011-08-29 | 2012-04-25 | 上海华力微电子有限公司 | 一种浅沟槽隔离填充的方法 |
CN103811403A (zh) * | 2012-11-13 | 2014-05-21 | 中芯国际集成电路制造(上海)有限公司 | 浅沟槽隔离结构的形成方法 |
CN114242651A (zh) * | 2022-02-24 | 2022-03-25 | 北京芯可鉴科技有限公司 | 浅槽隔离结构制作方法及浅槽隔离结构 |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100620707B1 (ko) * | 2004-12-31 | 2006-09-13 | 동부일렉트로닉스 주식회사 | 반도체 소자의 sti 형성 방법 |
KR100775963B1 (ko) | 2006-07-12 | 2007-11-15 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
KR100814417B1 (ko) | 2006-10-02 | 2008-03-18 | 삼성전자주식회사 | 단결정 실리콘 패턴 형성 방법 및 이를 이용한 불 휘발성 메모리 소자의 형성 방법 |
KR101416318B1 (ko) | 2008-01-15 | 2014-07-09 | 삼성전자주식회사 | 소자 분리 공정을 포함하는 반도체 장치의 제조방법 |
JP2009272596A (ja) * | 2008-04-09 | 2009-11-19 | Sony Corp | 固体撮像装置とその製造方法、及び電子機器 |
US8536674B2 (en) | 2010-12-20 | 2013-09-17 | General Electric Company | Integrated circuit and method of fabricating same |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5262354A (en) * | 1992-02-26 | 1993-11-16 | International Business Machines Corporation | Refractory metal capped low resistivity metal conductor lines and vias |
KR100365741B1 (ko) * | 1998-06-30 | 2003-02-19 | 주식회사 하이닉스반도체 | 반도체장치제조방법 |
JP2000100931A (ja) * | 1998-09-25 | 2000-04-07 | Seiko Epson Corp | 半導体装置及びその製造方法 |
KR20000043906A (ko) * | 1998-12-29 | 2000-07-15 | 김영환 | 반도체 소자의 제조 방법 |
KR20010003257A (ko) * | 1999-06-22 | 2001-01-15 | 김영환 | 반도체소자의 제조방법 |
US6228691B1 (en) * | 1999-06-30 | 2001-05-08 | Intel Corp. | Silicon-on-insulator devices and method for producing the same |
US6277723B1 (en) | 1999-10-14 | 2001-08-21 | Taiwan Semiconductor Manufacturing Company | Plasma damage protection cell using floating N/P/N and P/N/P structure |
US6303467B1 (en) | 2000-07-28 | 2001-10-16 | United Microelectronics Corp. | Method for manufacturing trench isolation |
-
2001
- 2001-12-20 KR KR10-2001-0081811A patent/KR100449320B1/ko not_active IP Right Cessation
-
2002
- 2002-12-17 TW TW091136443A patent/TWI287269B/zh not_active IP Right Cessation
- 2002-12-18 US US10/322,849 patent/US6743665B2/en not_active Expired - Lifetime
- 2002-12-20 JP JP2002370478A patent/JP3993820B2/ja not_active Expired - Fee Related
- 2002-12-20 CN CNB021542392A patent/CN1312753C/zh not_active Expired - Fee Related
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100358155C (zh) * | 2005-10-14 | 2007-12-26 | 西安电子科技大学 | 等离子体平板显示器寻址驱动芯片制备方法 |
CN102427051A (zh) * | 2011-08-29 | 2012-04-25 | 上海华力微电子有限公司 | 一种浅沟槽隔离填充的方法 |
CN103811403A (zh) * | 2012-11-13 | 2014-05-21 | 中芯国际集成电路制造(上海)有限公司 | 浅沟槽隔离结构的形成方法 |
CN103811403B (zh) * | 2012-11-13 | 2016-05-25 | 中芯国际集成电路制造(上海)有限公司 | 浅沟槽隔离结构的形成方法 |
CN114242651A (zh) * | 2022-02-24 | 2022-03-25 | 北京芯可鉴科技有限公司 | 浅槽隔离结构制作方法及浅槽隔离结构 |
Also Published As
Publication number | Publication date |
---|---|
JP3993820B2 (ja) | 2007-10-17 |
TWI287269B (en) | 2007-09-21 |
KR100449320B1 (ko) | 2004-09-18 |
KR20030051018A (ko) | 2003-06-25 |
TW200411810A (en) | 2004-07-01 |
US6743665B2 (en) | 2004-06-01 |
US20030119266A1 (en) | 2003-06-26 |
CN1312753C (zh) | 2007-04-25 |
JP2003197731A (ja) | 2003-07-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
ASS | Succession or assignment of patent right |
Owner name: DONGBUANAM SEMICONDUCTOR INC. Free format text: FORMER OWNER: DONGBOO ELECTRONICS CO., LTD. Effective date: 20050520 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20050520 Address after: Seoul City, Korea Applicant after: Dongbuanam Semiconductor Inc. Address before: Seoul City, Korea Applicant before: Tong-Boo Electronics Co., Ltd. |
|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20070425 Termination date: 20131220 |