CN1425191A - 半导体器件及其制作方法 - Google Patents

半导体器件及其制作方法 Download PDF

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Publication number
CN1425191A
CN1425191A CN01808353A CN01808353A CN1425191A CN 1425191 A CN1425191 A CN 1425191A CN 01808353 A CN01808353 A CN 01808353A CN 01808353 A CN01808353 A CN 01808353A CN 1425191 A CN1425191 A CN 1425191A
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wire
lead
forms
semiconductor device
semiconductor
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CN1194394C (zh
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西條谨二
大泽真司
岡本浩明
吉田一雄
须贺唯知
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Toyo Kohan Co Ltd
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Toyo Kohan Co Ltd
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Abstract

本发明提供一种高效率低成本地制作芯片尺寸封装的方法，通过在半导体芯片电极形成面一侧制作导电引线，扩大该封装的电极间距，特别地，提供一种制作引线和形成凸块的方法。一种半导体器件，包括半导体元件，以及在半导体元件上通过刻蚀形成引线的金属箔而形成的导电引线；一种半导体器件制作方法，包括以下步骤：在电极形成面一侧将形成电极的金属箔层压到半导体上，在金属箔上制作光刻胶引线图形，刻蚀金属箔以及将器件分割成单个的元件。

Description

半导体器件及其制作方法
技术领域
本发明涉及一种芯片尺寸的半导体器件，同时为了在IC芯片上重排电极而形成导电引线，本发明特别涉及可在晶片上集中加工的制作方法。
背景技术
近年来，IC封装在尺寸减小、功能增强、更高的集成度以及多管脚排列等方面已有显著的发展。而且，最近已开发出一种与芯片尺寸相同的CSP封装。
JP-A-11-121507中提出了一种在晶片状态进行封装以及制作芯片尺寸封装的方法。然而，这种方法中，将IC封装与外部连接的凸块位于IC的电极位置处。在近来芯片尺寸减小以及多管脚排列的趋势下，用于排列芯片电极的电极间距已越来越窄，必须重排IC芯片电极，扩大电极间距以使后续安装容易。
本发明拟解决前述的现有技术中的问题，提供一种高效率、低成本的制作芯片尺寸封装的方法，在这种封装中通过在半导体元件电极形成面一侧形成导电引线来扩大电极间距，特别地，提供一种容易制作引线和凸块的方法。
发明内容
本发明的发明人发现前述目的可以通过以下方法实现：采用金属箔和陶瓷之间的粘接技术，在电极形成面一侧将形成引线的金属箔层压到半导体晶片上，在所述半导体晶片表面形成电路元件，所述粘接技术此前已由本发明的发明人提交(参见国际专利WO99/58470)，然后刻蚀金属箔，形成引线并分割成单个元件。
此外，还发现可通过在电极形成面一侧将形成引线的多层金属箔层压到半导体晶片上并通过仅刻蚀其上有凸块的引线来形成凸块，在所述半导体晶片表面形成电路元件。
也就是说，权利要求1所述发明提供了一种半导体器件，包括半导体元件和半导体元件上通过刻蚀形成引线的金属箔而形成的导电引线(在下文中指本发明第一实施方式)。
在该情况下，形成引线的金属箔最好是铜。
此外，在该情况下，形成引线的金属箔厚度最好是1～100μm。
根据上述发明第一实施方式的半导体器件，由以下步骤获得：在电极形成面一侧将形成引线的金属箔层压到半导体晶片上，在所述半导体晶片表面形成电路元件；在金属箔上制作光刻胶引线图形；刻蚀金属箔；以及如权利要求4所述发明，分割成单个元件。
在该情况下，形成引线的金属箔最好是铜。
此外，在该情况下，形成引线的金属箔厚度最好是1～100μm。
此外，在该情况下，在表面形成电路元件的半导体晶片最好在表面上形成一层金属薄膜。
此外，权利要求8中所述发明提供了一种半导体器件，包括半导体元件、在半导体元件上通过刻蚀形成引线的金属箔而形成的导电引线以及焊料凸块(在下文中指本发明第二实施方式)。
在该情况下，形成引线的金属箔最好是铜。
此外，在该情况下，形成引线的金属箔厚度最好是1～100μm。
根据本发明第二实施方式的半导体器件，由以下步骤获得：在电极形成面一侧将形成引线的金属箔层压到半导体晶片的表面上，在所述半导体晶片表面形成电路元件；在金属箔上制作光刻胶引线图形；刻蚀金属箔；形成焊料凸块；以及分割成单个元件。
在该情况下，形成引线的金属箔最好是铜。
此外，在该情况下，形成引线的金属箔厚度最好是1～100μm。
此外，在该情况下，在表面形成电路元件的半导体晶片最好在表面上形成一层金属薄膜。
此外，权利要求15所述发明提供了一种半导体器件，包括半导体元件和在半导体元件上带有凸块的导电引线(在下文中指本发明第三实施方式)。
这种情况下，要求形成引线的多层金属箔为包括三层的金属层状物：形成凸块的铜或焊料箔/刻蚀终止层(stopper layer)镍/形成引线的铜箔。此外，形成凸块的铜或焊料箔厚度最好是10～100μm，刻蚀终止层镍最好是厚0.5～3μm的电镀镍或厚1～10μm的镍箔包覆层。
此外，形成引线的铜箔厚度最好是1～100μm。
根据上述发明第三实施方式的半导体器件可以采用以下半导体器件制作方法制作，包括以下步骤：在电极形成面一侧将形成引线的多层金属箔层压到半导体晶片上，在所述半导体晶片表面形成电路元件；在多层金属箔上制作形成凸块的光刻胶引线图形；选择性地刻蚀金属箔；去除刻蚀终止层；制作形成引线的光刻胶引线图形；通过刻蚀形成引线；分割成单个元件。
在这种半导体器件制作的方法中，形成引线的多层金属箔最好是包括三层的金属层状物：形成凸块的铜或焊料箔/刻蚀终止层镍/形成引线的铜。此外，形成凸块的铜或焊料箔厚度最好是10～100μm，刻蚀终止层镍最好是厚0.5～3μm的电镀镍或厚1～10μm的镍箔包覆层。此外，形成引线的铜箔厚度最好是1～100μm。
此外，在这种半导体器件制作的方法中，在表面形成电路元件的半导体晶片最好在表面上形成一层金属薄膜。
根据本发明的半导体器件，包括半导体元件、在半导体元件上带有通过刻蚀形成引线的多层金属箔形成的凸块的导电引线、一种绝缘树脂及焊料凸块。
根据本发明的半导体器件制作方法包括以下步骤：将形成引线的多层金属箔层压到半导体晶片的表面上，在所述晶片的表面形成电路元件；在多层金属箔上制作形成凸块的光刻胶引线图形；选择性地刻蚀金属箔；去除刻蚀终止层；制作形成引线的光刻胶引线图形；通过刻蚀形成引线；涂上绝缘树脂并将其表面抛光；形成焊料凸块以及分割成单个元件。
附图说明
图1是根据本发明实施方式一和实施方式二的电路制作步骤(将引线铜箔层压到半导体晶片上)示例。
图2是根据本发明实施方式一和实施方式二的电路制作步骤(在引线铜箔上形成导电电路)示例。
图3是根据本发明实施方式一的电路制作步骤(分割为单个元件)示例。
图4是根据本发明实施方式一的电路制作步骤(分割后的元件)示例。
图5是根据本发明实施方式二的电路制作步骤(在铜箔上制作焊料凸块)示例。
图6是根据本发明实施方式二的电路制作步骤(分割为单个元件)示例。
图7是根据本发明实施方式二的电路制作步骤(分割后的元件)示例。
图8是根据本发明实施方式三的电路制作步骤(将引线铜箔层压到半导体晶片上)示例。
图9是根据本发明实施方式三的电路制作步骤(制作凸块)示例。
图10是根据本发明实施方式三的电路制作步骤(刻蚀终止层镍的选择性刻蚀)示例。
图11是根据本发明实施方式三的电路制作步骤(对形成引线的铜箔选择性刻蚀)示例。
图12是根据本发明实施方式三的电路制作步骤(分割为单个元件)示例。
图13是根据本发明实施方式三的电路制作步骤(分割后的元件)示例。
图14是根据本发明实施方式四的绝缘树脂涂覆和表面抛光步骤。
图15是根据本发明实施方式四的焊料凸块制作步骤。
图16是根据本发明实施方式四的分割为单个元件步骤。
图17是根据本发明实施方式四的分割后的元件。
图18是根据本发明实施方式一、二、三、四中分割后元件的正面视图。
具体实施方式
首先描述根据本发明的实施方式一。
根据本发明的实施方式一中涉及一种半导体器件，包括一种在表面上制作电路元件的半导体晶片，以及在半导体元件上通过刻蚀形成引线的金属箔制作的导电引线。
对于半导体，可以使用一种通常使用的半导体晶片，而且，对于形成引线的金属箔，最好使用厚度为1～100μm的铜箔。可将导电引线制作成需要的形状。
根据本发明实施方式一的半导体器件，可以采用以下半导体器件制作方法制作，包括以下步骤：将形成引线的金属箔层压到半导体晶片的表面上，该表面用于半导体晶片上形成电极并制作电路元件；在金属箔上制作光刻胶引线图形；刻蚀金属箔以及分割成单个元件。
对于衬底，可以使用通常在表面制作电路元件的半导体。对于形成引线的金属箔，最好使用如上面所述的厚度为1～100μm的铜箔。
根据不同情况，在清洗后，可以采用溅射法、气相沉积法或者类似的方法，在所述半导体晶片表面形成电极元件。这可在半导体晶片上制备金属箔的层状物。对于制备薄膜的金属，在半导体芯片电极是铝的情况下，Cr、Mo、W等用作阻挡金属(barrier metal)，但是难于在以后通过刻蚀将这些金属去除。因此，从易于刻蚀去除的角度考虑，使用镍最好。
可以采用本专利发明人以前在国际专利W099/58470中描述的技术，将形成引线的金属箔层压到半导体晶片上(图1)。
层压之后，在形成引线的金属箔上涂上光刻胶，然后进行曝光和冲洗，使其形成光刻胶引线图形。制作光刻胶引线图形最好能使随后单个元件的分割容易，例如，可以采用在要分割的部分不涂覆光刻胶的方法。
可以基于通常使用的方法实施如光刻胶涂覆、曝光和冲洗等一系列程序。
然后，对形成引线的金属箔进行刻蚀。在金属箔为铜的情况下，可用商用碱性铜刻蚀液作为刻蚀溶液。
随后，从引线上去除光刻胶(图2)。
最后，分割成单个的元件，即是说，如前所述，当在光刻胶引线图形上形成的，作为单个元件区域之间边界标志的分割部分清楚的情况下，参照分割部分分割成单个的元件(图3，4)。
分割的实施采用金刚石刀片、激光等。
下面首先描述根据本发明的实施方式二。
根据本发明的实施方式二中涉及一种半导体器件，包括半导体元件，在半导体元件上通过刻蚀形成引线的金属箔而形成的导电引线以及焊料凸块。
半导体、形成引线的金属箔以及导电引线与本发明实施方式一中描述的相同。
上述半导体器件可以采用以下制作半导体的方法制作，包括以下步骤：在电极形成面一侧将形成引线的金属箔层压到半导体晶片的表面上，在所述半导体晶片表面形成电路元件；在金属箔上制作光刻胶引线图形；刻蚀金属箔；形成焊料凸块以及分割成单个元件。
对于衬底，通常可以使用在表面制作电路元件的半导体晶片，根据具体情况，可以在半导体表面清洗后制备一层金属薄膜。此外，与本发明实施方式一中方法相同，可以采用本专利发明人以前提交的国际专利WO99/58470中描述的技术，将形成引线的金属箔层压到半导体晶片上(图1)。
层压之后，类似本发明的实施方式一，在形成引线的金属箔上涂上光刻胶，进行曝光和冲洗，使其形成光刻胶引线图形，随后对形成引线的金属箔进行刻蚀，然后从引线上去除光刻胶(图2)。如同实施方式一，最好利用光刻胶引线图形使随后单个元件的分割容易。
在本发明的实施方式二中，相继形成焊料凸块(图5)。焊料凸块形成于重排电极的位置处。
最后，将其分割成单个的元件(图6，7)。分割采用与本发明实施方式一中相同的方法。
下面将接着说明根据本发明的实施方式三。
根据本发明的实施方式三中涉及一种半导体器件，包括半导体元件，在半导体元件上通过刻蚀形成引线的多层金属箔而形成的带有凸块的导电引线。
半导体器件、形成引线的金属箔以及导电引线与本发明实施方式一以及实施方式二中描述的相同。
如前所述，导电引线的厚度为1～100μm，对于刻蚀终止层，采用厚度为0.5～3μm的电镀镍(最好为1～2μm)，或者厚度为1～10μm镍箔包覆层(最好采用2～5μm)。
凸块的厚度是10～100μm，最好为10～50μm。
根据上述本发明实施方式三的半导体器件，可以采用以下半导体器件制作方法制作，包括以下步骤：在电极形成面一侧将形成引线的多层金属箔层压到半导体晶片的表面上，在所述半导体晶片表面形成电路元件；在多层金属箔上制作形成凸块的光刻胶引线图形；选择性地刻蚀金属箔；去除刻蚀终止层；制作形成引线的光刻胶引线图形；通过刻蚀形成引线；分割成单个元件。
首先，在电极形成面一侧将形成引线的金属层状物层压到半导体晶片的表面上，在所述半导体晶片表面形成电路元件(图8)。对于形成引线的金属层状物，例如包括用于形成凸块的铜或焊料箔(厚10～100μm)/刻蚀终止层镍(电镀镍时厚0.3～5μm，镍箔时厚1～10μm)/引线铜箔(1～100μm)。
层压的实施可以采用本发明实施方式一和实施方式二中描述的方法。
层压之后，在金属层状物上涂上光刻胶，进行曝光和冲洗，制作形成凸块的光刻胶引线图形。
然后，对金属层状物中的引线形成层进行选择性刻蚀(图9)。在形成凸块的金属层是铜箔的情况下，可以使用选择性的铜刻蚀液，比如商用碱性铜刻蚀液，进行刻蚀以制作凸块。
随后，去除刻蚀终止层。
如果刻蚀终止层是电镀镍或镍箔，可以使用商用镍清除溶液(比如，N-950，Mertex公司生产)(图10)。
进一步制作形成引线的光刻胶引线图形。该过程中，与本发明实施方式一及实施方式二一样，最好采用光刻胶引线图形显示出将于后面描述对应单个元件分割区域之间的边界。
接着，对形成引线的金属层进行刻蚀。如果引线形成层的是铜，则可以使用商用碱性铜刻蚀液。通过刻蚀制作引线之后，去除光刻胶(图11)。
最后，分割为单个的元件(图12，13)。分割采用与本发明实施方式一和实施方式二中相同的方法。
(实例)
实例1(本发明实施方式一)
(1)材料
以半导体晶片1和层压到晶片上的形成引线的铜箔(15μm厚)2为衬底(图1)，半导体晶片表面用于制作电路元件，层压铜箔采用国际专利WO99/58470说明的方法。
层压之前，采用溅射或者气相沉积的方法在半导体晶片上制作一层金属薄膜(镍)。
(2)制作引线
在铜箔上涂上光刻胶之后，进行曝光和冲洗，形成光刻胶引线图形。然后，铜被刻蚀形成引线3(图2)。
(3)分割为单个的元件(图3，4，18)。
实例2(本发明实施方式二)
(1)材料
以半导体晶片1和层压到晶片上的形成引线的铜箔(15μm厚)2为衬底(图1)，半导体晶片表面用于制作电路元件，铜箔层压采用与实例1相同的方法。
(2)制作引线
在铜箔上涂上光刻胶之后，进行曝光和冲洗，形成光刻胶引线图形。然后，铜被刻蚀形成引线3(图2)。
(3)制作焊料凸块
在引线上电极重排的位置制作焊料凸块4(图5)。
(4)分割为单个的元件(图6，7，18)。
实例3(本发明实施方式三)
(1)材料
金属层状物，包括用于凸块形成的铜或焊料箔(厚35μm)5/刻蚀终止层镍(电镀镍，厚1μm)6/形成引线的铜箔(15μm)1，层压到半导体晶片表面上，半导体晶片该表面用于制作电路元件(与实例1中一样，图8)。
(2)制作光刻胶引线图形
在金属层状物上涂上光刻胶之后，进行曝光和冲洗，制作形成凸块的光刻胶引线图形。
(3)刻蚀
使用商用铜刻蚀液比如碱性铜刻蚀液对铜进行选择性的刻蚀，制作凸块7(图9)。
(4)去除刻蚀终止层
使用商用镍清除液(N-950，Mertex公司生产)去除刻蚀终止层镍6(图10)。
(5)制作形成引线的光刻胶引线图形。
(6)使用商用铜刻蚀液比如碱性铜刻蚀液对铜进行刻蚀，形成引线3，然后清除光刻胶(图11)。
(7)分割为单个的元件(图12，13，18)。
实例4(本发明实施方式四)
(1)材料
金属层状物，包括用于凸块形成的铜或焊料箔(厚35μm)5/刻蚀终止层镍(电镀镍，厚1μm)6/形成引线的铜箔(15μm)1，层压到半导体晶片表面上，半导体晶片该表面用于制作电路元件(与实例1中一样，图8)。
(2)制作光刻胶引线图形
在金属层状物上涂上光刻胶之后，进行曝光和冲洗，制作形成凸块的光刻胶引线图形。
(3)刻蚀
使用商用铜刻蚀液比如碱性铜刻蚀液对铜进行选择性的刻蚀，制作凸块7(图9)。
(4)去除刻蚀终止层
使用商用镍清除液(N-950，Mertex公司生产)去除刻蚀终止层镍6(图10)。
(5)制作形成引线的光刻胶引线图形。
(6)使用商用铜刻蚀液比如碱性铜刻蚀液对铜进行刻蚀，形成引线3，然后清除光刻胶(图11)。
(7)通过在整个半导体晶片上涂覆绝缘树脂(比如聚酰亚胺)用于封装。随后，进行抛光使铜暴露到表面(图14)。
(8)采用印制法或类似方法制作焊料凸块(图15)
(9)分割为单个的元件(图16，17，18)。
工业实用性
根据本发明，可以高效率、低成本制作一种芯片尺寸的封装，该封装中，通过制作导电引线，使电极间距扩大到半导体上用于制作电极的表面。特别地，可以容易地制作引线和凸块。
因此，根据本发明的半导体器件及引线的制作方法在半导体领域中是适用的。

Claims (27)

1.一种半导体器件，包括半导体元件以及在半导体元件上通过刻蚀形成引线的金属箔而形成的导电引线。
2.权利要求1所限定的半导体器件，其中形成引线的金属箔由铜组成。
3.权利要求1或权利要求2所限定的半导体器件，其中形成引线的金属箔厚度为1～100μm。
4.一种半导体器件的制作方法，包括以下步骤：在电极形成面一侧将形成引线的金属箔层压到半导体晶片的表面上，在所述半导体晶片表面形成电路元件；通过光刻金属箔从而形成光刻胶引线图形；刻蚀金属箔以及分割成单个元件。
5.权利要求4所限定的半导体器件制作方法，其中形成引线的金属箔由铜组成。
6.权利要求4或5所限定的半导体器件制作方法，其中形成引线的金属箔的厚度为1～100μm。
7.权利要求4～6任一项所限定的半导体器件制作方法，其中在其表面形成电路元件的半导体晶片是在表面上形成金属薄膜的半导体晶片。
8.一种半导体器件，包括半导体元件，在半导体元件上通过刻蚀形成引线的金属箔而形成的导电引线，以及焊料凸块。
9.权利要求8所限定的半导体器件，其中形成引线的金属箔由铜组成。
10.权利要求8或9所限定的半导体器件，其中形成引线的金属箔的厚度为1～100μm。
11.一种半导体器件的制作方法，包括以下步骤：在电极形成面一侧将形成引线的金属箔层压到半导体晶片的表面上，在所述半导体晶片表面形成电路元件；在金属箔上形成光刻胶引线图形；刻蚀金属箔；形成焊料凸块以及分割成单个元件。
12.权利要求11所限定的半导体器件制作方法，其中形成引线的金属箔由铜组成。
13.权利要求11或12所限定的半导体器件制作方法，其中形成引线的金属箔的厚度为1～100μm。
14.权利要求11～13中任一项所限定的半导体器件制作方法，其中在其表面形成电路元件的半导体晶片是在表面上形成金属薄箔的半导体晶片。
15.一种半导体器件，包括半导体元件以及在半导体元件上通过刻蚀形成引线的多层金属箔而形成的凸块。
16.权利要求15所限定的半导体器件，其中形成引线的多层金属箔由三层构成：用于形成凸块的铜或焊料箔/刻蚀终止层镍/形成引线的铜箔。
17.权利要求15或16所限定的半导体器件，其中用于形成凸块的铜或焊料箔的厚度为10～100μm。
18.权利要求15～17中任一项所限定的半导体器件，其中刻蚀终止层镍为厚0.3～5μm的电镀镍或者厚1～10μm的包镍层。
19.权利要求15～18中任一项所限定的半导体器件，其中形成引线的铜箔厚度为1～100μm。
20.一种半导体器件的制作方法，包括以下步骤：在电极形成面一侧将形成引线的多层金属箔层压到半导体晶片的表面上，在所述半导体晶片表面形成电路元件；在多层金属箔上制作形成凸块的光刻胶引线图形；选择性地刻蚀金属箔；去除刻蚀终止层；制作形成引线的光刻胶引线图形；通过刻蚀形成引线；分割成单个元件。
21.权利要求20所限定的半导体器件制作方法，其中形成引线的多层金属箔由三层构成：用于形成凸块的铜或焊料箔/刻蚀终止层镍/形成引线的铜箔。
22.权利要求21所限定的半导体器件制作方法，其中用于形成凸块的铜或焊料箔的厚度为10～100μm。
23.权利要求21或22所限定的半导体器件制作方法，其中刻蚀终止层镍为厚0.3～5μm的电镀镍或者厚1～10μm的包镍层。
24.权利要求21～23中任一项所限定的半导体器件制作方法，其中形成引线的铜箔厚度为1～100μm。
25.权利要求20～24中任一项所限定的半导体器件制作方法，其中在其表面形成电路元件的半导体晶片是在表面上形成金属薄膜的半导体晶片。
26.一种半导体器件，包括半导体元件，导电引线，绝缘树脂以及焊料凸块，所述导电引线在半导体元件上具有通过刻蚀形成引线的多层金属箔而形成的凸块。
27.一种半导体器件的制作方法，包括以下步骤：在电极形成面一侧将形成引线的多层金属箔层压到半导体晶片的表面上，在所述半导体晶片表面形成电路元件；在多层金属箔上制作形成凸块的光刻胶引线图形；选择性地刻蚀金属箔；去除刻蚀终止层；制作形成引线的光刻胶引线图形；通过刻蚀形成引线；涂上绝缘树脂并将其表面抛光；形成焊料凸块以及分割成单个元件。
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EP1291906A4 (en) 2005-08-31
US20030155662A1 (en) 2003-08-21
AU2001242793A1 (en) 2001-10-30
EP1291906A1 (en) 2003-03-12
CN1194394C (zh) 2005-03-23
TW518921B (en) 2003-01-21
EP1291906B1 (en) 2009-11-04
WO2001080299A1 (fr) 2001-10-25
DE60140362D1 (de) 2009-12-17

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