CN1366445A - 多层柔性布线板的制造方法 - Google Patents

多层柔性布线板的制造方法 Download PDF

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CN1366445A
CN1366445A CN01145469A CN01145469A CN1366445A CN 1366445 A CN1366445 A CN 1366445A CN 01145469 A CN01145469 A CN 01145469A CN 01145469 A CN01145469 A CN 01145469A CN 1366445 A CN1366445 A CN 1366445A
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金田丰
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Abstract

提供一种多层柔性布线板的制造方法,可高精度定位各层的基体材料,从而容易叠层各层的基体材料。准备沿垂直于基体材料2的搬运方向P的方向排列的对应于多层柔性布线板的各层基体材料的多个图案孔的曝光用掩模。用该曝光用掩模,在片状的相同基体材料2上形成对应于多层柔性布线板各层基体材料的多个布线图案3。

Description

多层柔性布线板的制造方法
技术领域
本发明涉及例如由聚酰亚胺构成的柔性布线板的制造方法，特别是涉及叠层多层柔性布线板的技术。
背景技术
根据现有技术，已知在挠性的绝缘膜上叠层铜箔等导体来形成电路的柔性印刷布线板。
在这种柔性布线板中，近年来，随着电子部件的小型化，发展了连接电极的细微间距化和多层化。
在以前制造这种多层柔性布线板的情况下，确定各层基体材料中每一个的位置，形成布线图案，粘接这些基体材料，进行叠层。
但是，在这种现有技术中，因制造过程中热收缩等主要因素使各层基体材料的每一个的尺寸变化不同，在这种情况下，存在难以叠层基体材料彼此以进行电连接的问题。
因此，在现有技术中，难以控制各层基体材料的每一个中的尺寸变化。
另外，虽然在各层的基体材料中形成电路图案时使用膜状曝光用掩模，但在这种情况下，还存在所谓影响曝光用掩模自身收缩的问题。
发明内容
本发明为了解决这种现有技术的问题，目的在于提供一种多层柔性布线板的制造方法，可高精度定位各层的基体材料，从而容易叠层各层的基体材料。
实现上述目的的权利要求1所述的发明是一种柔性布线板用原料，其特征在于：备有具有挠性的片状基体材料、和在所述基体材料上沿规定方向排列、对应于多层柔性布线板的各层基体材料图案的多个布线图案。
权利要求2所述的发明根据权利要求1所述的发明，其特征在于：沿垂直于基体材料搬运方向的方向排列各布线图案。
权利要求3所述的发明是在光刻工序中使用的曝光用掩模，其特征在于：在规定方向上排列片状的掩模主体和在所述掩模主体中沿规定方向排列的、对应于多层柔性布线板的各层基体材料的多个图案孔。
权利要求4所述的发明根据权利要求3所述的发明，其特征在于：沿垂直于基体材料主体搬运方向的方向排列各图案孔。
权利要求5所述的发明根据权利要求3所述的发明，其特征在于：所述各图案孔与布线图案相对应。
权利要求6所述的发明根据权利要求4所述的发明，其特征在于：所述各图案孔与布线图案相对应。
权利要求7所述的发明是一种多层柔性布线板的制造方法，其特征在于：具有曝光工序，在片状掩模主体中，使用沿规定方向排列对应于多层柔性布线板的各层基体材料的多个图案孔的曝光用掩模，对沿规定方向搬运的掩模主体进行曝光。
权利要求8所述的发明根据权利要求7所述的发明，其特征在于：沿垂直于基体材料主体搬运方向的方向排列各图案孔。
权利要求9所述的发明根据权利要求7所述的发明，其特征在于：所述各图案孔与布线图案相对应。
权利要求10所述的发明根据权利要求8所述的发明，其特征在于：所述各图案孔与布线图案相对应。
附图说明
图1(a)是表示根据本发明的柔性布线板用原料的一个实施例的示意结构平面图。
图1(b)是图1(a)的A-A线剖面图。
图2(a)-(g)是表示根据本发明的柔性布线板的制造方法的一个实例的工序图(之一)。
图3(a)-(g)是表示根据本发明的柔性布线板的制造方法的一个实例的工序图(之二)。
图4(a)是表示本发明中使用的曝光用掩模的一个实例的平面图。
图4(b)是图4(a)的B-B线剖面图。
具体实施方式
下面参照附图来详细说明根据本发明的柔性布线板的实施例。
图1(a)是表示根据本发明的柔性布线板用原料的示意结构平面图，图1(b)是图1(a)的A-A线剖面图。
如图1(a)所示，由沿箭头方向搬运的辊(未图示)来卷绕本实施例的柔性布线板用原料1，在长条膜形的基体材料2上，沿垂直于基体材料2的搬运方向P的方向(宽度方向)排列对应于未图示的多层柔性布线板的各层(在本实施例中为6层)基体材料的多个相同布线图案3。
如图1(b)所示，在本实施例中，在基体材料2的一侧面上形成布线图案3，另外，在该布线图案3的焊盘部3a以外的部分上叠层覆盖膜7。
在本实施例中，在基体材料2的搬运(纵向)方向上沿规定间隔设置规定数量的对应于各层基体材料的多个布线图案3。
在基体材料2的另一侧面上形成连接于布线图案3的各焊盘部3a的凸起11。
图2(a)-(g)和图3(a)-(g)是表示根据本发明的柔性布线板的制造方法的一个实例的工序图。
如图2(a)所示，首先，例如在铜(Cu)箔4上涂布规定厚度的聚酰胺(ポリアミツク)酸2a，通过以规定温度下加热，得到图2(b)所示由聚酰亚胺构成的基体材料2。
接着，如图2(c)所示，在铜箔4的表面上粘贴感光性保护膜(例如旭化成社制造的干膜保护层SPC152)5a，如图2(d)所示，用图4(a)、(b)所示曝光用掩模6来进行曝光。
其中，图4(a)是表示本发明中使用的曝光用掩模的一个实例的平面图，图4(b)是图4(a)的B-B线剖面图。
如图4(a)、(b)所示，本实施例的曝光用掩模6是膜形的负象遮片，沿垂直于基体材料2的搬运方向P的方向排列对应于多层柔性布线板的各层图案的图案孔6a。
在本实施例中，以规定间隔在基体材料2的搬运方向P上仅排列规定数量的这样一组图案孔6。
使用这种曝光用掩模6在保护膜5a中形成潜影后，用规定的显影液(例如碳酸钠)来进行显影，如图2(e)所示，形成保护图案5。
另外，通过用规定的蚀刻液(例如氯化二价铜)来进行蚀刻，如图2(e)、(f)所示，去除铜箔4露出的部分40。
通过用规定的溶液(例如氢氧化钠)进行剥离处理，如图2(g)所示，去除保护图案5。从而在基体材料2上形成规定的布线图案3。
之后，如图3(a)所示，在基体材料2和布线图案3上粘贴由与上述保护膜5相同材料构成的覆盖膜7。
之后，如图3(b)所示，通过使用具有对应于布线图案3的焊盘部3a的遮光部8a的曝光用掩模8，对覆盖膜7进行规定的曝光和显影，如图3(c)所示，露出布线图案3的焊盘部3a。
并且，如图3(d)所示，在基体材料2的内表面侧粘贴感光性保护膜10，用具有对应于上述焊盘部3a的覆盖图案孔9a的膜形曝光用掩模9进行曝光。
另外，通过使用规定显影液(例如碳酸钠)来进行显影，如图3(e)所示，在保护膜10中形成孔10a。
另外，通过使用规定的碱性蚀刻液(例如TMAH(四甲基氢氧化铵))来进行蚀刻，如图3(f)所示，在基体材料2上形成偏置孔2a。
之后，例如通过进行电解电镀，如图3(g)所示，在基体材料2的各偏置孔2a内填充焊剂，同时形成连接用凸起11。
如上所述，根据本实施例，因为在相同的基体材料2上排列对应于多层柔性布线板各层基体材料的多个布线图案3，所以各层基体材料中的基体材料2的厚度等没有参差不齐，制造过程中各层基体材料的尺寸变化率相等。
因此，根据本实施例，因为可高精度定位各层基体材料的连接电极，所以可容易地叠层各层基体材料。
在本实施例中，因为沿垂直于基体材料2的搬运方向P的方向来排列各布线图案3，所以可抑制特别是因制造批量不同引起的基体材料2的厚度等的参差不齐。
另外，根据本实施例，因为可通过一个曝光用掩模6来形成各层基体材料的布线等图案，所以可简化多层柔性布线板的制造装置的结构。
因此，根据本实施例，可高效地制造容易叠层的多层柔性布线板用的各层基体材料。
本发明不限定上述实施例，可进行各种变更。
例如，在上述实施例中，在基体材料上排列形成相同的布线图案，但本发明不限于此，也可在每个层中排列形成不同的布线图案。
另外，上述实施例虽然举例说明了基体材料为6层柔性布线板，但本发明并不限于此，也可适用于2层以上的各种多层柔性布线板。
本发明当然适用于基体材料彼此完全重合的情况，但也适用于部分重合的情况。
发明效果
如上所述，根据本发明，可高精度定位多层柔性布线板的各层基体材料，并容易地叠层。
另外，根据本发明，因为可用一个曝光用掩模来形成各层基体材料的布线等图案，所以可简化多层柔性布线板的制造装置结构。

Claims (10)

1.一种柔性布线板用原料，其特征在于：备有具有挠性的片状基体材料，和在所述基体材料上沿规定方向排列、对应于多层柔性布线板的各层基体材料图案的多个布线图案。
2.根据权利要求1所述的柔性布线板用原料，其特征在于：沿垂直于基体材料搬运方向的方向排列各布线图案。
3.一种在光刻工序中使用的曝光用掩模，其特征在于：在规定方向上排列片状的掩模主体和在所述掩模主体中沿规定方向排列的、对应于多层柔性布线板的各层基体材料的多个图案孔。
4.根据权利要求3所述的曝光用掩模，其特征在于：沿垂直于基体材料主体搬运方向的方向排列各图案孔。
5.根据权利要求3所述的曝光用掩模，其特征在于：所述各图案孔与布线图案相对应。
6.根据权利要求4所述的曝光用掩模，其特征在于：所述各图案孔与布线图案相对应。
7.一种多层柔性布线板的制造方法，其特征在于：具有曝光工序，在片状掩模主体中，使用沿规定方向排列对应于多层柔性布线板的各层基体材料的多个图案孔的曝光用掩模，对沿规定方向搬运的掩模主体进行曝光。
8.根据权利要求7所述的方法，其特征在于：沿垂直于基体材料主体搬运方向的方向排列各图案孔。
9.根据权利要求7所述的方法，其特征在于：所述各图案孔与布线图案相对应。
10.根据权利要求8所述的方法，其特征在于：所述各图案孔与布线图案相对应。
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100546441C (zh) * 2006-07-19 2009-09-30 比亚迪股份有限公司 一种多层柔性线路板的制作方法
CN101185379B (zh) * 2005-05-02 2010-11-03 3M创新有限公司 用于可定制电子器件的通用图案化导体
CN101155474B (zh) * 2006-09-28 2011-08-24 比亚迪股份有限公司 一种在fpc领域对位覆盖膜方法及其专用隔离板
CN101547571B (zh) * 2008-03-25 2012-05-16 日本梅克特隆株式会社 多层柔性印刷布线板及其制造方法

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3914135B2 (ja) * 2002-11-07 2007-05-16 三井金属鉱業株式会社 電子部品実装用フィルムキャリアテープ
US8688801B2 (en) * 2005-07-25 2014-04-01 Qurio Holdings, Inc. Syndication feeds for peer computer devices and peer networks
JP2007165707A (ja) * 2005-12-15 2007-06-28 Nitto Denko Corp フレキシブル配線回路基板
JP4922666B2 (ja) * 2006-05-25 2012-04-25 シャープ株式会社 プリント配線基板の製造方法およびプリント配線基板の検査用パターンユニット
US11476566B2 (en) * 2009-03-09 2022-10-18 Nucurrent, Inc. Multi-layer-multi-turn structure for high efficiency wireless communication

Family Cites Families (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2014524A (en) * 1933-04-28 1935-09-17 Western Electric Co Article
US2911605A (en) * 1956-10-02 1959-11-03 Monroe Calculating Machine Printed circuitry
US3409732A (en) * 1966-04-07 1968-11-05 Electro Mechanisms Inc Stacked printed circuit board
US3780431A (en) * 1972-09-25 1973-12-25 Bowmar Ali Inc Process for producing computer circuits utilizing printed circuit boards
US3913219A (en) * 1974-05-24 1975-10-21 Lichtblau G J Planar circuit fabrication process
US4286860A (en) * 1979-02-01 1981-09-01 Western Electric Co., Inc. Apparatus for making carrier tape
JPS5618498A (en) * 1979-07-23 1981-02-21 Nippon Electric Co Method of manufacturing multilayer printed circuit board
US4374869A (en) * 1982-01-18 1983-02-22 Western Electric Company, Inc. Selective metal etch technique
US4681656A (en) * 1983-02-22 1987-07-21 Byrum James E IC carrier system
JPS6143751A (ja) * 1984-08-07 1986-03-03 Hitachi Chem Co Ltd パタ−ン形成方法
JPS62176185A (ja) * 1986-01-29 1987-08-01 シャープ株式会社 フレキシブルプリント基板の製造方法
JPS62287640A (ja) * 1986-06-06 1987-12-14 Nec Corp 端面基準用基板ホルダ−
US4806409A (en) * 1987-05-20 1989-02-21 Olin Corporation Process for providing an improved electroplated tape automated bonding tape and the product produced thereby
JPH02239695A (ja) 1989-03-13 1990-09-21 Nec Corp 多層プリント配線板
US5065227A (en) * 1990-06-04 1991-11-12 International Business Machines Corporation Integrated circuit packaging using flexible substrate
US5062916A (en) * 1990-08-01 1991-11-05 W. H. Brady Co. Method for the manufacture of electrical membrane panels having circuits on flexible plastic films
US5433819A (en) * 1993-05-26 1995-07-18 Pressac, Inc. Method of making circuit boards
JP2581431B2 (ja) * 1993-12-28 1997-02-12 日本電気株式会社 多層配線基板の製造方法
JP2775585B2 (ja) * 1994-03-25 1998-07-16 日本メクトロン株式会社 両面配線基板の製造法
US5721007A (en) * 1994-09-08 1998-02-24 The Whitaker Corporation Process for low density additive flexible circuits and harnesses
JPH08335764A (ja) * 1995-06-06 1996-12-17 Ibiden Co Ltd 多数個取りプリント配線板の製造方法
US6195881B1 (en) * 1997-10-08 2001-03-06 The Erie Ceramic Arts Company Multiple coated substrates
JP4128649B2 (ja) * 1998-03-26 2008-07-30 富士通株式会社 薄膜多層回路基板の製造方法
KR20000010059A (ko) * 1998-07-30 2000-02-15 기승철 다층인쇄회로기판의 제조방법
JP3536728B2 (ja) * 1998-07-31 2004-06-14 セイコーエプソン株式会社 半導体装置及びテープキャリア並びにそれらの製造方法、回路基板、電子機器並びにテープキャリア製造装置
US6320135B1 (en) * 1999-02-03 2001-11-20 Casio Computer Co., Ltd. Flexible wiring substrate and its manufacturing method
KR20020021100A (ko) * 1999-05-24 2002-03-18 야마사키 노리쓰카 배선판용 수지 필름의 레이저 가공방법 및 배선판의제조방법
JP3889700B2 (ja) * 2002-03-13 2007-03-07 三井金属鉱業株式会社 Ｃｏｆフィルムキャリアテープの製造方法
JP3902169B2 (ja) * 2003-09-08 2007-04-04 日東電工株式会社 配線回路基板の製造方法および製造装置

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101185379B (zh) * 2005-05-02 2010-11-03 3M创新有限公司 用于可定制电子器件的通用图案化导体
CN100546441C (zh) * 2006-07-19 2009-09-30 比亚迪股份有限公司 一种多层柔性线路板的制作方法
CN101155474B (zh) * 2006-09-28 2011-08-24 比亚迪股份有限公司 一种在fpc领域对位覆盖膜方法及其专用隔离板
CN101547571B (zh) * 2008-03-25 2012-05-16 日本梅克特隆株式会社 多层柔性印刷布线板及其制造方法

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