CN1319009C - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN1319009C
CN1319009C CNB2004100284103A CN200410028410A CN1319009C CN 1319009 C CN1319009 C CN 1319009C CN B2004100284103 A CNB2004100284103 A CN B2004100284103A CN 200410028410 A CN200410028410 A CN 200410028410A CN 1319009 C CN1319009 C CN 1319009C
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China
Prior art keywords
semi
conductor chip
antenna
medium
semiconductor device
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Expired - Fee Related
Application number
CNB2004100284103A
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English (en)
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CN1529275A (zh
Inventor
宇佐美光雄
辻和隆
斋藤武志
佐藤朗
鲛岛贤二
宝木和夫
安信千津子
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Hitachi Ltd
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Hitachi Ltd
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Abstract

本发明提供了一种半导体装置，其特征在于包括：具有平面尺寸的长边小于、等于0.5mm、存储有多位信息的存储器的半导体芯片，和与所述半导体芯片相连接、用于发送所述信息的天线，其中，所述半导体芯片装在薄膜状的媒体中，以及所述多位信息记录在所述媒体上。从而提供了有效地进行纸或薄膜状媒体的防止伪造的方法。

Description

半导体装置
本申请是申请人为株式会社日立制作所、申请号为99814599.8、发明名称为“半导体装置及其制造方法”的发明专利申请的分案申请。
技术领域
本发明，属于以纸或薄膜状的媒体，例如，各种令牌装置媒体、有价证券、各种金券(可做货币使用的证券)、重要文献、IC卡、预付款卡等的防伪为主要目的，涉及灵活使用半导体芯片的无电池非接触方式的实现手段的技术。
背景技术
作为与本发明有关的技术，首先对特开平8-50672进行说明。该技术是与各种令牌装置媒体的保密细丝识别装置有关的技术，是一种在各种令牌装置媒体中预先埋入文字等的金属图形，企图用金属的有无来电检测该图形的技术。基本上是一种对于仅仅在通常的纸上施以高级的复印技术进行伪造的目的，采用放入一种什么金属图形的办法，使伪造变得更加困难的技术。
其次，对在特开平8-202844中所公开的现有技术进行说明。该技术是一种用各向异性导电性膏把半导体芯片连接到由纸或合成纸构成的基底基材上的技术。
此外，图4示出了现有的技术例子。示出的是在碎裂41开始有裂纹42的情况。在该图中，示出了因焊盘43位于半导体芯片44的上边与处于粘接树脂45内的导电粒子46进行边缘短路的可能性，此外，还示出了由于天线布线47位于基板49的上边，故导电粒子48将参与与该电极之间的连接的作用。
此外，图7示出了现有的另外的实施例。示出的是粘接树脂71使导电粒子75在器件硅层72的表面上有铝焊盘73和表面氧化膜74的半导体芯片中分散，被俘获的导电粒子77参与与天线之间的导通的状态。绝缘物79是钝化膜。在该图中，示出了用现有的各向异性导电性粘接剂连接起来的半导体芯片的剖面构造图。
本发明人认为，在作为现有技术公开的特开平8-50672中存在着如下所述的课题。就是说，如果对于各种令牌装置媒体等的伪造考虑对策，则要考虑在伪造方法是否容易方面存在着技术性的的附加价值。在该现有例中，虽然讲述了把金属图形封入到各种令牌装置媒体中去的技术，但是，若用该方法的话，不仅图形的制作方法是容易的，而且还存在着接近于推荐伪造方法的危险性。由于防伪造技术，在具有提高安全性的使命的同时还提高可靠性，对于高级的伪造来说存在着完全变成为不需要卡的危险，故必须认真考虑廉价容易的防伪技术反过来具有增加伪造的作用的情况。在该情况下，虽然是金属图形的制作技术，但是，只要是检测技术是判断金属的有无，那么只要开封后进行精密研究，不使用高级技术就可以弄明白，这是不言自明的道理。就是说，由于金属图形的有无是必要的条件，故对其实现手段进行选择，在通常的技术水平下是完全可能的。
以下是与特开平8-202844有关的课题，本发明人认为该技术并不仅仅是材料变更还考虑到了纸等的薄的媒体，但是对于纸这种物品来说对于机械强度与半导体芯片的强度还要进行更为深入的研究。该现有例的构造，如果考虑厚度100微米以下的构成，则取决于有无机械应力，课题的捕捉方法完全不同。就是说，把半导体芯片装配到薄的纸状的媒体上必须使不同的制约条件明确起来。需要对半导体芯片的厚度、尺寸进行探讨。例如，1mm的半导体芯片用100微米厚度的纸，必须的观点是：是否可以承受通常的使用水平，要看其能否承受实用而不是在构造上能否制作。本发明人的考察结论是：若仅仅用众所周知的例子的话，要想制作可以承受实用的100微米以下的薄型媒体的装配形态的产品是不充分的。
其次，说明在图4的现有例中的课题。在半导体芯片的周边部分加工中，由于使用用金刚石刀切成片的半导体芯片，故当给半导体芯片加上来自外部的应力时，如果应力集中于半导体芯片周边，则将发生龟裂等的裂纹，半导体芯片的一部分功能或所有的功能将丧失。在把半导体芯片封入到纸等的薄的媒体上的情况下，由于易于加上弯曲应力或集中荷重的应力，故存在着即便是在半导体芯片的周边存在着微小的碎裂就是说存在着缺口也将招致半导体芯片的破坏的课题。
其次，说明在图7的现有例中的课题。在该构造的情况下，没有考虑具有金的突点和因在半导体芯片的周边存在着对各向异性导电粘接剂或对导电粘接剂的副作用，就是说没有考虑到存在着纵向构造尺寸因金突点而增大，或对半导体周边的短路。故存在着由于这种原因会因具备金突点的半导体芯片的构成而整体变得异常地厚，从而妨碍获得不怕弯曲的构造的课题。
发明内容
本发明提供了一种半导体装置，其特征在于包括：具有平面尺寸的长边为0.5mm以下、厚度为50微米以下、存储有多位信息的存储器的半导体芯片，和与所述半导体芯片相连接、用于发送所述信息的天线，其中，所述半导体芯片装在可弯曲的薄膜状的媒体的中心面内或中性面附近，以及所述多位信息记录在所述媒体上。
本发明提供了另一种半导体装置，其特征在于包括：具有平面尺寸的长边为0.5mm以下、厚度为50微米以下、存储有识别编号的信息的存储器的半导体芯片，和与所述半导体芯片相连接、用于发送所述识别编号的天线，其中，所述半导体芯片装在可弯曲的薄膜状的媒体的中心面内或中性面附近，以及所述识别编号记录在所述媒体上。
本发明提供了又一种半导体装置，其特征在于包括：具有平面尺寸为长边为0.5mm以下、厚度为50微米以下、存储有识别编号的存储器的半导体芯片，和与所述半导体芯片相连接、用于发送所述识别编号的天线，其中所述半导体芯片装在可弯曲的薄膜状的媒体的中心面内或中性面附近，以及所述半导体芯片的物理信息记录在所述媒体上。
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图1示出了本发明的实施例。图2示出了本发明的实施例。图3示出了本发明的实施例。图4示出了现有的实施例。图5示出了本发明的实施例。图6示出了本发明的实施例。图7示出了现有的实施例。图8示出了本发明的实施例。图9A是本发明的实施例的平面图。图9B是本发明的实施例的剖面图。图10示出了本发明的实施例。图11A示出了本发明的实施例中的电磁波的波形。图11B示出了本发明的实施例的电路框图。图12示出了本发明的实施例。图13示出了本发明的实施例。图14示出了本发明的薄膜辊子的状态，图15A示出了半导体芯片分散到薄膜状媒体中的状态。图15B示出了半导体芯片搭载上天线的状态。图16示出了本发明的实施例。图17示出了本发明的实施例。图18示出了本发明的实施例。图19示出了本发明的根据的例子。图20A示出了本发明的实施例。图20B是与图20A对应的剖面图。图21示出了本发明的实施例。图22是本发明的实施例的剖面图。图23是本发明的实施例的平面图。图24示出了本发明的实施例。图25是本发明的实施例的平面图。图26A是本发明的实施例的平面图。图26B是本发明的实施例的剖面图。图27A是本发明的实施例的平面图。图27B是半导体芯片的局部剖面图。图28A是本发明的实施例的平面图。图28B是图28A的实施例的剖面图。图28C的平面图示出了天线框架。图28D是从上方看到的使天线构件与LSI晶片重叠起来的状态。图28E的剖面图示出了把天线与半导体芯片连接起来的状态。图29A是说明本发明的实施例的剖面图。图29B的剖面图示出了LSI晶片。图29C的平面图示出了天线的配置状态。图29D的剖面图示出了使LSI晶片和天线相向的状态。
优选实施例
图1示出了本发明的实施例。半导体芯片侧壁氧化膜11位于器件层硅12的侧面，焊盘13位于具有背面氧化膜14与半导体芯片侧壁氧化膜15的半导体芯片的表面上，用粘接树脂16连接到天线布线17上，天线布线用银膏等的导电性材料在基板18的表面上形成。导电粒子19虽然位于焊盘与天线布线之间直接参与纵方向的导通，但是导电粒子19a位于半导体芯片的侧面附近不直接参与焊盘与天线布线的导通。但是，只要是特征为半导体芯片的周边用绝缘材料形成，用导电性粘接剂把半导体上边的端子连接到搭载基板的端子上的半导体装置，则该导电粒子即便是靠近半导体芯片的边缘也不会与天线布线和半导体芯片短路。此外利用通常的导电性粘接剂而不是各向异性导电性粘接剂的情况下，效果特别显著。就是说，即便是导电性粘接剂靠近半导体芯片的边缘，也不会成为电短路的原因。
从图2的(a)到(f)示出了本发明的另外的实施例。图2的(a)示出了用晶片状完成了半导体芯片后的工序的剖面。图1所示的侧壁氧化膜在晶片状态下预先在半导体芯片的分离位置上进行氧化，它把主面与氧化膜层23的氧化膜连接起来。焊盘21在器件层硅22的上边形成，氧化膜层23变成为被硅衬底24和器件层硅夹在中间的夹层构造。该构造是绝缘体上的硅晶片。图2的(b)示出了把支持带连续地粘贴晶片主面上之后的剖面图。图2的(b)中的标号30是粘接剂层。以下，标号30表示同样的粘接剂层。图2的(c)示出了用氢氧化钾、肼、氨等刻蚀除去了硅衬底24的工序之后的剖面图。图2的(d)示出了把光刻胶26涂敷到晶片背面上曝光显影后的剖面图。图2的(e)示出了形成了刻蚀槽27之后的工序的剖面图。刻蚀使用刻蚀氧化膜的氟酸或其混合液或者使用干法刻蚀。图2的(f)示出了用展宽的支持带28展宽半导体芯片的剖面图。这样就可以容易且经济地制作薄型、小型又没有碎裂的半导体芯片。该半导体芯片的平面尺寸是长边在0.5mm以下，该半导体芯片，如实施例所示，借助于刻蚀进行分离，形成特征为在带天线的状态下插入到纸或薄膜状的媒体内，发送多位信息的半导体芯片。
图3示出了本发明的另外的实施例。焊盘31在存储器网(memorymat)32或读出电路33或选择器电路34或发送接收电路36或电源电路38等有源器件上边形成。这样一来，就可以为了可靠性良好地稳定地与天线布线进行连接而形成面积大的焊盘。在半导体芯片的周边，为了防止与导电性粘接剂之间的短路，存在着半导体芯片侧壁氧化膜35。焊盘31可以借助于贯通孔37与电路连接。在半导体芯片中具有用来产生随机数的小焊盘39，在该部分中半导体芯片与天线，由于起因于与纬线间的导电粒子之间的连接电阻或与强电介质之间的电容器的不均一性可以得到模拟值发生了变化的值，故借助于随机数发生电路39a进行模数转换进行信息化。该值就象人的指纹那样可以作不会重复的固有信息使用，可以对使用该半导体芯片的媒体的防止伪造作出贡献。该固有信息，由于一旦半导体芯片与天线分离则消失净尽，故具有不怕伪造的特征。如上所述，作成为在半导体主面上边的器件上边存在着一个或多个焊盘，其特征是：在带天线的状态下插入到纸或薄膜状的媒体内，发送多位信息的半导体装置，此外，以半导体芯片的平面尺寸为长边在0.5mm以下，为了产生随机数，在半导体芯片上边存在着多个比用来和天线进行连接的焊盘还小的焊盘为特征的半导体装置对于防止伪造是有效的。此外，存储器网32可以用电子射线直接描画在晶片上边，在各个半导体芯片上，以微细的面积，任意地描画随机数图形。
图5的(a)到(c)示出了本发明的另外的实施例。图5的(a)的平面图示出了半导体芯片51连接到天线52上且存在于薄膜状媒体之内的状态。图5的(b)是图5(a)的剖面图之一，且从半导体芯片的表面和背面取出电极，取出形成电容器的天线电极1、55和形成电容器的天线电极2、56，并用这些电极形成电容器。借助于此，在半导体芯片一侧不具有电容器，就可以形成小的半导体芯片，制作在经济方面、成品率方面有利的半导体芯片。图5的(c)，从半导体芯片的表面取出多个电极，取出形成电容器天线电极3、57和形成电容器的天线电极4、58，并用这些电极形成电容器。采用把这些作成为特征在于半导体芯片的平面尺寸为长边在0.5mm以下，在内置电容器带天线的状态下插入到纸或薄膜状的媒体内，发送多位信息的半导体装置的办法，就可以作成为经济且有效的防止伪造识别功能的装置。
图6示出了本发明的另外的实施例。粘接树脂61，在具有背面氧化膜62，在器件硅层63的侧面上具有侧壁氧化膜66的半导体芯片中，可以用使导电粒子65分散开来的各向异性导电性粘接剂，用导电粒子67，使表面氧化膜66上边的钨焊盘68与天线布线69电连。由于用钨或不氧化的金属形成焊盘，和侧壁氧化膜的采用，故可以形成薄且不会短路的半导体芯片与天线的组合。如上所述，形成作成为半导体装置的各种防止伪造的令牌装置媒体，其特征是：半导体芯片的平面尺寸为长边在0.5mm以下，半导体芯片的焊盘用钨形成，在带天线的状态下插入到纸或薄膜状的媒体内，发送多位信息。
图8示出了本发明的另外的实施例。媒体表面印刷图形81位于薄膜状媒体83的表面上，其中存在含有天线的半导体芯片。由于仅仅用半导体芯片的只读存储器信息的情况下，若保持原状不变地进行仿真，则对于防止伪造就会失去抵抗力，故如果使该信息密码化变成为数值或图形后进行印刷，则可以更为严格地进行是否伪造的确认。此外，半导体芯片的一方，由于仅仅有只读存储器即可，故可以用小的尺寸制作半导体芯片。就是说，采用作成为其特征为半导体芯片的平面尺寸为长边在0.5mm以下，在带天线的状态下插入到纸或薄膜状的媒体内，发送多位信息，并使该信息密码化后印刷到媒体上的半导体装置的办法，形成不怕伪造的各种令牌装置媒体。密码化的印刷信息，还可以使用特殊墨水、与磁性体进行组合后的墨水。
图9A图9B示出了本发明的另外的实施例。图9A示出了半导体芯片91的平面图。导电粒子92分散地存在于小焊盘93的上边。此外，在半导体芯片内存在有可以写入的存储器区域97。图9B示出了用粘接树脂94把半导体芯片91连接到基板96的上边的天线布线95上的剖面图。在半导体芯片的小焊盘的部分中，由于归因于半导体芯片与在天线布线间的导电粒子之间的接触电阻或与强电介质之间的电容器的不均一性可以得到使模拟值发生了变化的值，故借助于随机数发生电路进行模数转换以进行信息化。该值就象人的指纹或墨水花纹那样可以作为不会重复的固有信息使用，可以对使用该半导体芯片的媒体的防止伪造作出贡献。该固有信息，由于一旦半导体芯片与天线分离则消失净尽，故具有不怕伪造的特征。
图10示出了本发明的另外的实施例。该图是使用本发明的半导体芯片和位于其中的随机数发生电路的防止伪造的协议的实施例。粗分起来有开环型和闭环型两种。首先说明开环型的协议实施例。在开环型的情况下，从读写器等的查询器(inquirer)，对位于卡等的薄膜状媒体中的本发明的半导体芯片查询在初始化时在卡内的半导体芯片所发生的随机数N。在回答了N之后，卡自己或借助于查询器的指令读出N，关闭电路，使得不能进行读出。查询器接受到N之后就登录在数据库内。其次，在运用时刻，查询器首先查询卡的ID。当卡的ID返回到查询器后，查询器就再向卡发送随机数。卡以N为关键词进行密码化后返回查询器。查询器对从数据库得到的N和本次解读出来的数值进行比较，如果相同则看作是正当的卡。在本实施例中，卡对于在本发明的形成媒体就是说对于各种令牌装置媒体、有价证券等中的应用，可以没有什么特别限制地置换使用。其次，在闭环型的情况下，则变成为这样的卡和系统，其特征是：在半导体芯片内存在着可以写入的存储器区域，在初始化时从查询器向卡的存储器区域内写入密码化的N。然后，读出卡一侧的N，关闭电路。其次，采用向半导体芯片提供与该半导体芯片内的随机数N不同的第2随机数，使随机数N密码化后读出，再读出该存储器区域的内容，在查询器一方恢复第2随机数的办法，确认该半导体芯片不是伪造的芯片。借助于此，就可以安全地检查N，进行是正当的卡的认证。
图11A、图11B示出了本发明的另外的实施例。图11A示出了从本发明中的查询器向含有半导体芯片的纸或薄膜状的媒体发送的电磁波的波形。载波的频率虽然是任意的，但是当载波进行了幅度调制，提供第n个时钟111时，只读存储器的第n号地址的数据就从半导体芯片发送出去。因此，时钟周期的后半个周期是发送第n个数据112的期间。同样接着是第n+1个时钟113和第n+1个数据114的期间。反复进行这些，就可以把半导体芯片内的只读存储器的内容写入到查询器内。就是说，变成为特征如下的半导体装置：载波在周期性地幅度调制成多个频率单位后提供给带天线的半导体芯片，把各个周期的上升沿用做时钟，在该周期内，改变半导体芯片内的天线负载发送该半导体芯片内的信息的1位的量。图11B示出了半导体芯片118内的电路框图。天线115连接到整流器116上，向半导体芯片内供给电压。同时，还需要计数器119，使得与ROM117的输出的选择器119a一起每次一位地发送数据。借助于这样的构成构成小型的半导体芯片。就是说，形成特征如下的半导体装置：载波在周期性地幅度调制成多个频率单位后提供给带天线的半导体芯片，在该半导体芯片内具有计数器，把各个周期的上升沿用做时钟输入到计数器内，然后，计数器的输出选择存储器输出，在该周期内改变半导体芯片内的天线负载发送该半导体芯片内的信息的1位的量。
图12示出了本发明的另外的实施例。在薄膜状媒体124里边第1半导体芯片121和第2半导体芯片123连接到天线122的两端。形成特征如下的半导体装置：一般地说多个半导体芯片共享一个天线，各个半导体芯片在看到天线的负载状态后进行动作。这样一来，就可以简单地装配多个半导体芯片而无须在半导体芯片内具有复杂拥挤的电路，使得在芯片坏了时可以用别的半导体芯片进行辅助，因而可以提高媒体的可靠性。再有，使多个半导体芯片都具有固有信息，连络彼此的关系，只要具备本身就是多个这样的条件，采用作成为使得发送数据的办法，就可以构筑安全性更高的系统。
图13示出了本发明的另外的实施例。半导体芯片131被封入到在表面上具有密码化物理信息记载栏132的薄膜状媒体133内。为了防止伪造，以良好的精度制作物理上相同的芯片是困难的，必须使用高级的鉴别技术。用高级的工艺制作半导体芯片本身以及制造自己不具备制作技术的被称之为克隆的半导体芯片的仿制品是困难的。半导体工艺技术可以用微细图形的精度级别来代表。因此，即便是实现了同一功能，也是工艺技术越高则半导体芯片尺寸越小，而且技术水平随着时间一起提高，结果变成为功能同一但物理形状减小或物理形状同一但功能提高。采用作成为其特征为在带天线的状态下插入到纸或薄膜状媒体内，发送多位信息的半导体芯片的尺寸，厚度、位置、尺度的物理信息的全部或一部分密码化后进行印刷的半导体装置的办法，鉴别半导体芯片和装配方法是否伪造品并予以区别就变得容易起来。
图14示出了本发明的另外的实施例。具有第1保护层薄膜辊子141和第2保护层薄膜辊子144，卷成向笫1保护层薄膜145与笫2保护层薄膜143之间插入半导体芯片142后完成卷辊146的含有半导体芯片的媒体。保护层薄膜特别不要选择纸、合成纸、塑料、布、光纤延展线等的材料。半导体芯片自动拾取并进行定位。在该半导体芯片中已预先安装上了天线的情况下，由于在第1或第2薄膜内有印刷或金属丝插入，故在插入时刻有时候要用导电性粘接剂进行接合。在已插入了半导体芯片的之间接合薄膜面上，存在着另外的粘接剂例如尿烷系或苯胺系或UV硬化系等的粘接剂，要在低温下形成且要形成为确保完成媒体的平坦性和刚性。
图15A和图15B示出了本发明的另外的实施例。图15A示出了把多个半导体芯片151分散配置到薄膜状媒体152内的形态之一。图15B示出了图15A的半导体芯片151把小的天线搭载到半导体芯片上边的例子。天线的形状和特性取决于使用时的无线频率或能量而不同。作为天线的形成法，可以考虑用半导体布线工艺技术，把微细的布线作成为线圈状。若使用多层布线或铜布线技术，则可以使之紧凑化得到低电阻且布线长度长的线圈。此外，若用ON半导体芯片形成天线，则在增加天线的连接的可靠性的同时，还可已减少制造工序，可以经济地制作半导体芯片。此外，如果把多个半导体芯片分散配置到媒体内，则可以确保非重复性，此外，即便是对于半导体的故障，也可以变成为补偿手段，可以实现防止伪造和可靠性提高。如果形成其特征为把比半导体芯片的尺寸还小的天线搭载到半导体芯片上边，把该半导体芯片插入纸或薄膜状媒体内无干扰地发送多位信息的半导体装置，则实现防止伪造各种令牌装置媒体就变得容易起来。
图16示出了本发明的另外的实施例。在半导体芯片的有源器件的上边存在着第1天线用焊盘161和第2天线用焊盘162，连接到天线线圈63的两端上。在本图中虽然设想为线圈状的天线，但是也可以是偶极子型的天线的各自的天线端子。第1天线用焊盘借助于第1贯通孔164与半导体芯片的发送接收电路连接，第2天线用焊盘则借助于第2贯通孔165与半导体芯片发送接收电路连接。如上所述，在有源器件上边每隔多个焊盘进行与天线或根据需要进行与外部的电容器之间的连接。焊盘与天线端子的连接，用压焊或粘接剂进行。粘接剂，如果使用导电性粘接剂，则用一次接合加热加压处理就可以效率良好地进行多个焊盘与基板的布线图形之间的连接。
图17示出了本发明的另外的实施例。实施例的平面图示出了在半导体芯片的拐角上设置有斜坡状拐角171的情况。为了增加集中荷重或弯曲等的机械强度和消除切片刀的切片宽度以有效地使用半导体芯片面积，用刻蚀技术实施半导体芯片的分离。这时，要采用使半导体芯片的拐角具有斜坡状或圆状形状的办法把加工后的半导体芯片的拐角形状最佳化为缓和机械应力的集中。若制作成其特征为半导体芯片的平面尺寸为长边0.5mm以下，该半导体芯片在带天线的状态下插入到纸或薄膜状媒体内发送多位信息，此外，特征还在于该半导体芯片的拐角被斜坡形切割成长边长度的1/100以上的半导体装置的形态的防止伪造的各种令牌装置媒体，则可以得到可靠性高的媒体。
图18示出了本发明的另外的实施例。集中荷重工具181被推压到薄膜状媒体182上，在其下边半导体芯片183位于媒体的中性面或接近于中性面的地方。薄膜状的媒体具有位于钢板185上边的硅橡胶184。硅橡胶在实际的生活空间内示出了位于薄膜状媒体附近的环境。集中荷重工具的直径为1mm以上。这示出了可以作为在实际生活空间中的集中荷重加上的环境。如该图18所示，薄膜状媒体取决于集中荷重的程度进行变形，变成为图18所示的那种剖面状态。在这样的状态下，实验性地求到的耐集中荷重与厚度50微米的半导体芯片尺寸之间的关系参见图19。本发明人发现：设在实际生活空间中人推压圆珠笔的程度为700g，设对于集中荷重以能否承受1kg为基准，则根据图19就可以分离成这样的区域：如果半导体的半导体芯片尺寸在0.5mm以下，则为不怕集中荷重的区域，若在0.5mm以上，则为怕集中荷重的区域。根据该事实，则把制作特征为半导体芯片的平面尺寸为长边0.5mm以下，该半导体芯片在带天线的状态下插入到纸或薄膜状媒体内发送多位信息，此外，特征还在于该半导体芯片的的厚度被制作成50微米以下的半导体装置的防止伪造的各种令牌装置媒体，作为技术方面的制约是必要的条件，将成为本发明的构成部分。
图20A、图20B是本发明的另外的实施例。在位于薄膜状媒体204中的凸字用突起201内具有带有天线203的半导体芯片202。凸字用突起部分虽然可以附加到各种令牌装置媒体等上，但是，只要半导体芯片的尺寸在0.5mm以下，就可以把突起部分收纳于其中。借助于此就可以对半导体芯片的装配部分的构造上的强度改善作出贡献。就是说，采用作成为特征为半导体芯片的平面尺寸为长边0.5mm以下，该半导体芯片在带天线的状态下插入到纸或薄膜状媒体内发送多位信息，此外，特征还在于该半导体芯片存在于凸字用的突起部分内的半导体装置的防止伪造的各种令牌装置媒体的办法，就可以实现可靠性的提高。
图21示出了本发明的另外的实施例。在薄膜状媒体217内存在着连接到第1天线212上的第2半导体芯片211和连接到第2天线214上的第2半导体芯片213。这时，在薄膜状媒体的表面上有第1密码化记载区域215和第2密码化记载区域216。从第1半导体芯片发送出来的信息用数值或特殊的图形印刷到第1密码化记载区域上，从第2半导体芯片发送出来的信息用数值或特殊的图形印刷到第2密码化记载区域上。借助于此，即便是不论哪一方的半导体芯片被破坏仍可以进行伪造鉴定。一般地说，采用形成制作成其特征为半导体芯片的平面尺寸为长边0.5mm以下，该半导体芯片在带天线的状态下插入到纸或薄膜状媒体内发送多位信息，此外，特征还在于各个半导体芯片的信息在密码化花样图形化后印刷到媒体上的半导体装置的防止伪造的各种令牌装置媒体的办法，就可以提供可靠性好的方法。
图22示出了本发明的另一实施例。在第1保护层薄膜221和第2保护层薄膜224之间，具备天线226已连接到焊盘225上的半导体芯片223，该半导体芯片具有可以用增强金属222进行增强的构造。采用使该增强金属为弹性系数大的材料的办法，就可以对集中荷重带来改善。增强金属的厚度厚是理想的，但由于薄膜状媒体有厚度的限制，故而也是有限的。因此，增强金属的厚度相当于比半导体芯片的厚度厚一点，可以得到改善的效果。还希望增强金属和半导体芯片的粘结力强一些。这对于缓和薄的半导体芯片的拉伸应力是必要的。本发明采用特征是半导体芯片的平面尺寸为长边小于、等于0.5mm、将半导体芯片在带天线的状态下插入到纸或薄膜状媒体内发送多位信息的半导体装置，此外通过把比半导体芯片厚的金属粘接到该半导体芯片上的防止伪造的各种令牌装置媒体的办法，可以提供可靠性优良的方法。
图23示出了本发明的另外的实施例。多个纸纤维231在日本纸渗漏网235上边被渗漏框234整备成形状。使得带天线的半导体芯片232与该日本纸纤维一起被制成纸张。如果半导体芯片作成为小于、等于0.5mm，则可以作为纤维状的一部分，插入在处理的日本纸中。在该图中虽然代表性地示出了一个半导体芯片，但是即便是混合进多个半导体芯片也在本发明的范围内。就是说，只要使半导体芯片的平面尺寸为长边小于、等于0.5mm，将该半导体芯片在带天线的状态下插入到纸或薄膜状媒体内发送多位信息，此外，该半导体芯片在渗漏日本纸时可以作为日本纸纤维的一部分对待，将其装配到日本纸内部或表面上，由此半导体装置制作防止伪造的各种令牌装置媒体，就可以提供可以以简便的工序实现的装置。
从图24的(a)到(g)示出了本发明的另外的实施例。图24的(a)示出了在器件层硅241与衬底硅晶片之间具有氧化膜层242的绝缘体上的硅晶片的器件制作完成后的剖面图。图24的(b)接着示出了把第1支持薄片244粘贴到晶片的主面一侧上的工序之后的剖面图。图24的(c)接着示出了用仅仅刻蚀硅的药液例如氢氧化钾等除去衬底硅的工序之后的剖面图。氧化膜层242起着该药液的阻挡层的作用，对于得到极其之薄例如从0.1微米到50微米的薄度的半导体是有效的。图24的(d)接着示出了安装到带有笫2支持薄片246的增强金属245上的工序之后剖面图。图24的(e)接着示出了除去了第1支持薄片的工序之后的剖面图。图24的(f)接着示出了涂敷、曝光和显影光刻胶247的工序之后的剖面图。掩模图形是使半导体芯片分离的线状图形。图24的(g)接着用刻蚀技术刻蚀增强金属、氧化膜层、器件层硅形成了分离沟的工序之后的剖面图。借助于这些工序就可以效率良好的地、可靠性良好地、稳定地制作薄型且具有增强金属的小型半导体芯片。
图25示出了本发明的另外的实施例。整数倍折叠线251沿着图的薄膜状媒体的平面图的长边和短边存在。在其中设置有带天线的半导体芯片252时，只要作成为其特征为半导体芯片的平面尺寸为长边0.5mm以下，该半导体芯片在带天线的状态下插入到纸或薄膜状媒体内发送多位信息，此外，特征还在于各个半导体芯片不配置在该媒体的整数倍的折叠位置上的半导体装置的防止伪造各种令牌装置媒体等，结果就变成为即便是在整数倍的折叠位置上弯曲，也没有半导体芯片，因而可以降低因弯曲引起破坏的概率，可以提供可靠性良好的构造。
用图26A、图26B，说明本发明的另外的实施例。本实施例是把本发明应用到以ISO/IEC14443为标准的靠近型的非接触IC卡中去的实施例，图26A是从未形成IC半导体芯片的器件的一侧看已装配上一个把存储器和通信控制功能内置于已形成了天线线圈9002的卡状布线基板9003内的半导体芯片9001的状态的状态图，图26B是完成后的卡的图26A的A-B线的半导体芯片部分的剖面图。
在本实施例的情况下，在形成了线圈9002的布线基板9003上，在电极突点9004与线圈相向的面朝下方向上，搭载有IC半导体芯片9001。布线基板9003由PET(聚对苯二甲酸乙二酯)构成，用导电性膏的丝网漏印印刷形成线圈9002。电极突点9004与线圈9001的连接使用各向异性导电性粘接剂9005。各向异性导电性粘接剂是使导电性微粒分散到整个粘接剂层内的粘接剂，电极突点9004和线圈9002的相向部分虽然可以通过被夹持在两者之间的导电性微粒电连，但是由于导电性微粒已经分散开来，故不会在不相向的电极突点或线圈布线之间发生电短路。在这里，IC半导体芯片9001的尺寸为0.3mm，厚度约30微米，在借助于机械研磨与化学研磨的同时使用，研磨形成了器件的Si晶片的背面使之薄型化之后进行切片以得到薄型IC半导体芯片。在未形成IC半导体芯片9001的器件的一侧，设置由PET构成的卡表面层9006，以用2层PET夹持IC半导体芯片9001和树脂层9007的形式的叠层构造形成卡。
在本实施例中，由于半导体芯片面积小和厚度薄，以及已用各向异性导电性粘接剂连接到印刷线圈上，故可以得到不怕弯曲和点压而且可以薄型化且价格低廉的非接触IC卡。
图27A、图7B示出了本发明的半导体装置的另外的实施例，图27A是平面图，图27B是半导体芯片部分的剖面图。在本实施例中，在已形成了IC半导体芯片9011的器件的一侧和背面上，各一个地设置用蒸镀形成的Au突点9013，突点9013连接到由镀Sn的Cu构成的薄长方形的天线9012上。IC半导体芯片9011，其端部也不从天线的两面突出出来，以主面对天线9012的主面倾斜的形式进行连接。IC半导体芯片9011的周围，已用树脂9014进行了填充，以把IC半导体芯片埋入到在一对天线之间的形式变成为平坦的薄长方形。
在本实施例中使用的IC半导体芯片9011的大小为0.25mm，包括Au突点在内厚度约50微米，天线9012的厚度为0.15mm。采用IC半导体芯片9011的主面与天线9012所构成的夹角变成为大约为30度的办法，作成为IC半导体芯片不从天线面突出出来的构造，天线9012的宽度作成为比IC半导体芯片9011的宽度大。
在本实施例中，由于把IC半导体芯片全体都已埋入到偶极子天线的厚度之内，故可以得到平坦性极其之好的半导体装置，由于IC半导体芯片的尺寸小故即便是倾斜构造也可以把整体形成得薄。另外，本实施例的半导体装置，虽然以单体的形式使用，但是，把图27所示的薄长方形的半导体装置再埋入到别的基材之内，例如作成为通常的信用卡尺寸等，也是可能的。
从图28A到图28E，示出了本发明的半导体装置的另外的实施例及其制造方法。在本实施例中，如图28A的平面图和图28B的剖面图所示，在半导体芯片9021的已形成了器件的一侧的面上，形成有2个突点9023，每一个都用各向异性导电性粘接剂9024与天线9022进行连接。由Cu构成的薄长方形的天线9022，宽度作成为比IC半导体芯片9021的宽度还窄。
在本实施例的半导体装置的制造中，如图28C所示，在使多个天线9022排列起来的状态下，加工成已把天线构件连接到天线框架9025内的引线框架构造。在这里相邻的天线的节距与在Si晶片上形成的IC半导体芯片9021的节距相等，相向的天线的间隔与应当连接到IC半导体芯片上的状态的一对天线的间隔相等。图28D示出的是为了连接天线9022和IC半导体芯片9021，使上述引线框架状的天线构件与LSI晶片9026重叠的状态。LSI晶片9026在已连接到张贴到规定的薄片框架9028上的支持薄片上的状态下，用切片技术，分离成每一个IC半导体芯片。在该状态下，进行位置对准，天线构件在支持薄片上边的规定一列的IC半导体芯片上边，使得每一个天线的顶端部分都配置在IC半导体芯片的突点上边。图28E示出了把天线构件9022和IC半导体芯片9021连接起来的状态的图28D的A-B线的剖面构造。在已连接到支持薄片9027上边的IC半导体芯片9021之内，把用天线框架9025支持着的天线9021的顶端部分对准到图的左端的IC半导体芯片上边，用加热/加压装置9029，用各向异性导电性粘接剂9024连接IC半导体芯片上边的突点9023和天线9022。当进行了规定的加热/加压之后结束加压时，IC半导体芯片9021和支持薄片9027借助于加热而被剥离，IC半导体芯片从支持薄片上分离出来变成为连接到天线上的状态。在这里，加热/加压装置9029的构造是在与纸面垂直的方向上长，在以上所述的连接工序中，支持薄片上边的一列有效半导体芯片全体都同时连接到天线上，然后，采用从天线框架9025上，在图的C-D和C-D处切断天线9022的办法，完成连接偶极子天线的IC半导体芯片。另外，在图28E中，比要进行连接的半导体芯片更往左侧的半导体芯片已经连接到天线上并已分离完毕，接着本工序后边进行从图的左侧开始第2号的IC半导体芯片和与之构成列的多个IC半导体芯片的天线连接。
如上所述，在本实施例的情况下，由于天线9022的宽度比IC半导体芯片9021的宽度窄，故可以同时地连接在Si晶片上边形成的列状的多个IC半导体芯片，可以得到制造工序的吞吐率大且低价格的好处。另外，也可以把在本实施例的图28A、图28B中所示的构造再埋入到树脂或其它的基材内使用。
图29A到图29D示出了本发明的半导体装置的另外的实施例及其制造方法。在本实施例中，与在图29A所示的同样，在已形成了IC半导体芯片9301的器件的一侧的面和未形成器件的背面上，分别形成突点9033，分别用突点9034与天线9032进行连接。由被覆有Cu的铁构成的细线状的天线9032在与半导体芯片9021之间的连接部分处虽然变粗，但是其截面积却作成为比IC半导体芯片9021的面积还小。
在本实施例的半导体装置的制造中，就象图29C所示的那样，在把多个天线9023排列成2维状的状态下把天线构件插入到设置在天线支持工具9038上的穴内。在这里天线的配置与在Si晶片上边形成的IC半导体芯片9031的排列相等。图29B，示出了已形成了IC半导体芯片9021的LSI晶片9035，LSI晶片9035，在已粘接到已张贴到规定的薄片框架9037上的支持薄片9036上的状态下，用切片技术分离成每一个的IC半导体芯片。在图29D中，示出了以使图29B的LSI晶片和图29C的天线相向的形式配置的状态的剖面图。天线9032，虽然贯通在天线支持工具9038上设置的穴，但是要连接到IC半导体芯片上的粗的部分，由于比穴的直径还大，故天线不会从支持工具上脱落出来。在该状态下，进行位置对准，使得各个天线构件分别与已连接到支持薄片9036上的IC半导体芯片9031相向。其次，用未画出来的用加热/加压装置，用焊料9034把半导体上边的突点9033和天线9032连接起来。当进行了规定的加热/加压之后结束加压时，IC半导体芯片9031和支持薄片9036借助于加热而被剥离，IC半导体芯片从支持薄片上分离出来变成为连接到天线上的状态。在以上所述的连接工序中，支持薄片上边的所有有效半导体芯片的一方的面都同时连接到天线上。然后，同样地把排列成2维状的天线同时连接到半导体芯片的另一方的面上。在该工序中，由于必须使天线与图29D方向相反地进行定位，故用与支持体平行的磁铁防止天线脱落。
如上所述，在本实施例的情况下，由于天线9032的截面积比IC半导体芯片9031的面积还小，Si晶片上边形成的面状的多个IC半导体芯片同时连接到天线上，可以得到制造工序的吞吐率大且低价格的好处，另外，也可以把在本实施例的图29A中所示的构造埋入到树脂或其它的基材中使用。
若对于各种令牌装置媒体等的伪造考虑对策则应考虑在伪造方法是否容易方面存在着技术性的附加价值。在现有例的情况下，虽然讲述的是把金属图形封入到各种令牌装置媒体内的技术，但是，若使用该方法，不仅图形作成方法是容易的，而且还具有推荐伪造方法的危险性。由于防伪造技术，在具有提高安全性的使命的同时还提高可靠性，对于高级的伪造来说存在着完全变成为不需要卡的危险，故必须认真考虑廉价容易的防伪技术，反过来具有增加伪造的作用的情况。在该情况下，虽然是金属图形的制作技术，但是，只要是检测技术是判断金属的有无，那么只要开封后进行精密研究，不使用高级技术就可以弄明白，这是不言自明的道理。就是说，由于金属图形的有无是必要的条件，故对其实现手段进行选择，在通常的技术水平下是完全可能的。在本发明的情况下，为了进行各种令牌装置媒体等的防止伪造，使用半导体芯片，此外同时并用密码化技术，此外还具有随机数产生手法，故可以经济地实现实用的构造。
对于纸这样的媒体来说对于机械强度和半导体产品的强度还应进一步进行深入的探讨。考虑一下现有例构造的厚度100微米以下的构成，则取决于机械应力的有无课题的捕捉方法完全不同。就是说，把半导体芯片装配到薄的纸状的媒体上这件事，必须使制约条件变得明确起来。这件事虽然具有借助于深入的考察有意识地讲清楚的价值，但是在公开例中有意识的认识是不够的。对半导体芯片的厚度、尺寸进行探讨是必要的。例如，1mm的半导体芯片在100微米厚度的纸中能否承受通常的使用水平，需要的是能否承受使用的观点而不是在构造上能否制作的观点。倘采用本发明就可以得到解决这些课题的效果。
半导体芯片的周边，由于使用用金刚石刀切成片的半导体芯片，故当给半导体芯片加上来自外部的应力时，如果应力将集中于半导体芯片周边，则将发生龟裂等的裂纹，半导体芯片的一部分功能或所有的功能将丧失。在把半导体芯片封入到纸等的薄的媒体上的情况下，由于易于加上弯曲应力或集中荷重的应力，故存在着即便是在半导体芯片的周边存在着微小的碎裂就是说存在着缺口也将招致半导体芯片的破坏的课题。来自该观点的深入的考察不是现有的构造。倘采用本发明，则可以得到解决这些课题的效果。
没有考虑具有金的突点和因在半导体芯片的周边存在着对各向异性导电粘接剂或导电粘接剂的副作用，就是说存在着纵向构造尺寸因金突点而增大，或对在半导体周边产生的短路。因此，存在着归因于薄的具备金突点的半导体芯片而对得到不怕弯曲的构造有妨碍的课题。倘采用本发明，则可以得到解决这些课题的效果。
为了更容易地理解本专利申请所附附图，以下列举出标号的简单说明。
11是半导体芯片侧壁氧化膜，12是器件层硅，13是焊盘，14是背面氧化物，15是半导体芯片侧壁氧化膜，16是粘接树脂，17是天线布线，18是基板，19是导电粒子，19a是导电粒子，21是焊盘，22是器件层硅，23是氧化膜层，24是硅衬底，25是支持带，26是光刻胶，27是刻蚀槽，28是展宽的支持带，29是间隙，30是粘接层，31是焊盘，32是存储器网(memory mat)，33是读出电路，34是选择器电路，35是半导体芯片侧壁氧化膜，36是发送接收电路，37是贯通孔，38是电源电路，39是随机数产生用小焊盘，39a是随机数发生器，41是碎裂，42是裂纹，43是焊盘，44是半导体芯片，45是粘接树脂，46是导电粒子，47是天线布线，48是导电粒子，49是基板，51是半导体芯片，52是天线，53是薄膜状媒体，55是形成电容器的天线电极1，56是形成电容器的天线电极2，57是形成电容器的天线电极3，58是形成电容器的天线电极4，61是粘接树脂，62是背面氧化膜，63是器件硅层，64是侧壁氧化膜，65是导电粒子，66是表面氧化膜，67是导电粒子，68是钨焊盘，69是天线布线，71是粘接树脂，72是器件硅层，73是铝焊盘，74是表面氧化膜，75是导电粒子，76是金焊盘，77是导电粒子，78是天线布线，79是绝缘物，81是媒体表面印刷图形，82是半导体芯片，83是薄膜状媒体，91是半导体芯片，92是导电粒子，93是小焊盘，94是粘接树脂，95是天线布线，96是基板，97是可写入存储器区域，111是第n个时钟，112是第n个数据，113是第n+1个时钟，114是第n+1个数据，115是天线，116是整流器，117是ROM，118是半导体芯片，119是计数器，119a是选择器，121是第1半导体芯片，122是天线，123是第2半导体芯片，124是薄膜状媒体，131是半导体芯片，132是密码化物理信息记载栏，133是薄膜状媒体，141是笫1保护层薄膜辊子，142是半导体芯片，143是第2保护层薄膜，144是第2保护层薄膜辊子，145是第1保护层薄膜，146是卷绕辊子，151是半导体芯片，152是薄膜状媒体，154是天线，161是第1天线用焊盘，162是第2天线用焊盘，163是天线线圈，164是第1贯通孔，165是笫2贯通孔，171是斜坡状拐角，181是集中荷重工具，182是薄膜状媒体，183是半导体芯片，184是硅橡胶，185是钢板，201是凸字用突起，202是半导体芯片，203是天线，204是薄膜状媒体，211是第1半导体芯片，212是第1天线，213是第2半导体芯片，214是笫2天线，215是第1密码化记载区域，216是第2密码化记载区域，217是薄膜状媒体，221是第1保护层薄膜，222是增强金属，223是半导体芯片，224是第2保护层薄膜，225是天线用焊盘，226是天线，231是日本纸纤维，232是半导体芯片，233是天线，234是渗漏用框，235是渗漏网，241是器件层硅，242是氧化膜层，243是衬底硅晶片，244是第1支持薄片，245是增强金属，246是笫2支持薄片，247是光刻胶，248是刻蚀槽，251是整数倍折叠线，252是半导体芯片，253是天线，9001是IC半导体芯片，9002是线圈，9003是布线基板，9004是电极突点，9005是各向异性导电性粘接剂，9006是表面层，9007是树脂层，9011是IC半导体芯片，9012是天线，9013是突点，9014是树脂，9021是IC半导体芯片，9022是天线，9023的突点9024是各向异性导电性粘接剂，9025是天线框架，9026是晶片，9027是支持薄片，9028是薄片框架，9029是加热/加压装置，9031是IC半导体芯片，9032是天线，9033是突点，9034是焊料，9035是晶片，9036是支持薄片，9037是薄片框架，9038是天线支持体。
工业上利用的可能性
本发明，在以纸或薄膜状的媒体，例如，各种令牌装置媒体、有价证券、各种可做货币使用的证券、重要文献、IC卡、预付款卡等的防止伪造中使用是有用的。此外，还使得实现灵活使用半导体芯片的无电池非接触方式成为可能。

Claims (13)

1.一种半导体装置，其特征在于包括：
具有平面尺寸的长边为0.5mm以下、厚度为50微米以下、存储有多位信息的存储器的半导体芯片，和
与所述半导体芯片相连接、用于发送所述信息的天线，
其中，所述半导体芯片装在可弯曲的薄膜状的媒体的中性面内或中性面附近，以及
所述多位信息记录在所述媒体上。
2.一种半导体装置，其特征在于包括：
具有平面尺寸的长边为0.5mm以下、厚度为50微米以下、存储有识别编号的信息的存储器的半导体芯片，和
与所述半导体芯片相连接、用于发送所述识别编号的天线，
其中，所述半导体芯片装在可弯曲的薄膜状的媒体的中性面内或中性面附近，以及
所述识别编号记录在所述媒体上。
3.如权利要求1或2所述的半导体装置，其特征在于：所述信息被密码化后记录在所述媒体上。
4.如权利要求1～3中任一项所述的半导体装置，其特征在于：所述信息被密码化后、作为数值或图案被记录在所述媒体上。
5.如权利要求1～4中任一项所述的半导体装置，其特征在于：所述信息用特殊的墨记录。
6.如权利要求1～5中任一项所述的半导体装置，其特征在于：所述存储器为由电子射线描画法形成在所述半导体芯片上的图案。
7.如权利要求1～6中任一项所述的半导体装置，其特征在于：所述媒体上还记录有所述半导体芯片的物理信息。
8.一种半导体装置，其特征在于包括：
具有平面尺寸为长边为0.5mm以下、厚度为50微米以下、存储有识别编号的存储器的半导体芯片，和
与所述半导体芯片相连接、用于发送所述识别编号的天线，
其中，所述半导体芯片装在可弯曲的薄膜状的媒体的中性面内或中性面附近，以及
所述半导体芯片的物理信息记录在所述媒体上。
9.如权利要求8所述的半导体装置，其特征在于：所述物理信息被密码化，然后将其记录在所述媒体上。
10.如权利要求7～9中任一项所述的半导体装置，其特征在于：所述物理信息是半导体芯片的大小、厚度、位置和尺度中至少一个。
11.如权利要求1～10中任一项所述的半导体装置，其特征在于：所述天线形成在所述半导体芯片上。
12.如权利要求1～11中任一项所述的半导体装置，其特征在于：所述媒体为IC卡。
13.如权利要求1～11中任一项所述的半导体装置，其特征在于：所述半导体芯片能和纸的纤维一起被制成纸张。
CNB2004100284103A 1998-12-17 1999-12-10 半导体装置 Expired - Fee Related CN1319009C (zh)

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KR20040097378A (ko) 2004-11-17
KR20010101283A (ko) 2001-11-14
KR100691595B1 (ko) 2007-03-09
KR100753724B1 (ko) 2007-08-30
TW484101B (en) 2002-04-21
WO2000036555A1 (fr) 2000-06-22
CN1319023C (zh) 2007-05-30
CN1330789A (zh) 2002-01-09
US20080054427A1 (en) 2008-03-06

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