CN1288750C - 半导体器件和包封集成电路的方法 - Google Patents

半导体器件和包封集成电路的方法 Download PDF

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CN1288750C
CN1288750C CNB028232356A CN02823235A CN1288750C CN 1288750 C CN1288750 C CN 1288750C CN B028232356 A CNB028232356 A CN B028232356A CN 02823235 A CN02823235 A CN 02823235A CN 1288750 C CN1288750 C CN 1288750C
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internal layer
semiconductor device
integrated circuit
delamination area
sealing
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J·维德内斯
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

一种包括集成电路(10)的半导体器件的封装通常包括内层(21)和外层(16)，该层(16，21)具有共同界面(24)。由于界面(24)封闭了分层区域(22)，所以实现了封装的稳定性的改进，该区域(22)与集成电路(10)的任意接合垫(18)相隔离。通过内层(21)的表面的智能激活模式可以产生分层区域(22)。可以在该表面上设置大量的可固化聚合物来实现这一点。

Description

半导体器件和包封集成电路的方法
本发明涉及包括载体和集成电路的半导体器件，该集成电路包括一个或者多个半导体元件以及一个或者多个通过其使半导体元件接触的连接区域，通过包封(envelope)将电路与环境隔离，所述包封包括具有共同界面的内层和外层，该载体包括导电部分，通过所述导电部分经由连接装置使得所述连接区域连接起来。
本发明还涉及在包括具有共同界面的内层和外层的包封中包封集成电路的方法，该方法包括在集成电路的表面上设置该内层的步骤，激活所述内层的表面，并且在所述内层的表面上设置所述外层，从而形成共同界面。
这种半导体器件和这种方法在JP-A 62185343中是已知的。该已知器件的内层包括硅材料。该外层包括填充有石英或者玻璃粉末的环氧树脂。此外，提供了互连结构。连接装置是接合线。集成电路被覆盖有钝化层以便防止在进一步的处理和随后的使用寿命期间被损坏和污染。该层包括例如一层或者多层磷硅酸盐玻璃或者氮化硅。
如果温度变化，更具体地说当集成电路的尺寸相对大的时候，外层和钝化层的材料之间的热膨胀系数的差异可能导致在半导体器件中产生大的机械应力。例如，使用芯片级封装类型的包封正是这样的情况。这些应力和由于应力在钝化层中产生的微裂纹导致电路的损坏，因此可能产生半导体器件的功能性缺陷并且甚至于损坏。来自环境的湿气通过这些裂纹可能会到达电路并且在那里造成侵蚀。为了降低所述的缺陷，通常使用由合成树脂材料的内层，诸如聚酰胺和硅树脂。
该已知器件的内层包含微胶囊以便使它抵抗来自外层的压力。将该外层的闭合升高了温度，该处理是在压力下进行的，存在于微胶囊中的气体会逃选出去。这些气体在包封的内层和外层之间形成空腔。
该已知器件的缺点在于空腔的存在对于外层提出了非常严格的要求。如果在任一点处该外层没有被完全地密封，则湿气会通过该空腔到达连接区域并且因此渗透到集成电路。另外，更具体地说如果该逃逸不是以完全控制的方式发生的，或者部分气体是在后面阶段逃逸的，则逃逸的气体可能在外层上造成应力并且损坏外层。
因此，本发明的第一目的是提供在引言段中提到该类型的半导体器件，其中减小了机械应力。
由于共同界面完全限制了分层区域，使得完全限制的该分层区域与接合垫隔离，因而实现了所述第一目的。通过产生分层区域可以用受控的方式除去机械应力。因为该分层区域是封闭的，因而湿气没有机会通过该区域渗透进去或者破坏集成电路。
该分层区域是位于内层的表面处或表面上，界面也是如此。该分层区域占该内层表面的30-70％的大小是有利的。经验表明粘附区域和分层区域的大小之间的这种比例效果很好。已经发现最佳的比例取决于内层和外层之间的膨胀系数的差异。这样，可能发生仅仅在集成电路的连接区域周围存在粘附。但这就已经相当足够了。当机械应力可以避开的时候，就不需要使得内层的剩余部分粘附在外层。
在一个有利的实施方案中，在分层区域中存在大量的硬化的合成树脂。这种合成树脂的存在是根据本发明的实施方案的结果。该合成树脂例如环氧树脂、丙烯酸酯或者硅橡胶可以用简单的方式使用分配器装置、喷墨打印机或者采用一些其他的方法来设置在内层上。在这之后激活该合成树脂和内层的表面。然后设置外层。因为被合成树脂覆盖的表面部分没有被激活，所以合成树脂与内层之间的粘附不如激活的部分那么好。可替换的，有可能只在激活之后来设置合成树脂。在那种情况下，合成树脂和外层之间的粘附并不好。当半导体器件在高温下进行后续的焊接处理时，机械应力将集中在该合成树脂的未激活的表面上。在该处理期间形成分层区域。
作为硬化的合成树脂的替换物，可以使用一些其他的材料，其可以被局部地设置在内层上并且对于内层或者外层具有至少相对差的粘附性。有利的是以流体来设置该材料，但是要求该材料绝对不能延伸遍布内层的表面。此外，还要求该材料在焊接操作的温度下基本上决不延展。
优选的是对于内层，留下连接区域不被覆盖。这种半导体器件的实施方案通常是已知的并且可以各种方式应用。已知的接合装置是接合线和诸如焊料的导电材料小球。可替换的，该内层本身是接合装置。当使用电容性或者电感性耦合来用于集成电路和载体之间的接合时是这种情况。这样的情况对于标识目的是非常有利的，其中存在数据和能量的有限传输。该载体可以包括提供与读出装置无接触耦合的天线。
在进一步的实施方案中，包封被固定到载体或者载体上。根据本发明的半导体器件的载体可以是引线框，或者可替换的是印刷电路板、陶瓷衬底或者一些其他的衬底。在该实施方案中，其也公知为芯片级封装类型，直到集成电路已经被固定到所述衬底之后才提供覆盖物的外层。然后集成电路可以通过球栅阵列类型的接合而被连接到载体上的导电部分。还可以是这样的情况，衬底具有由内层和外层构成的包封。由于在绝大部分的硅、衬底和外层之间热膨胀的巨大差异，因此在存在分层区域的情况中是有利的。
本发明的第二目的在于提供一种在引言部分中提出的类型的方法，其中可以用受控的方式来除去机械应力。
该第二目的的实现在于，内层表面的激活根据一种模式来发生，在该模式中位于内层表面处或者表面上的分层区域保持不被激活。该模式化的激活造成分层区域的产生。当机械应力产生时，将通过分层区域中的分层来释放该应力。这样就避免了或者至少大大降低了靠近连接区域的微观的其他裂纹的形成。
可以采用各种方式来实现模式中的激活。在第一实施方案中，使用来自光源的光产生激活。在此期间将掩模定位在光源和内层的表面之间。该掩模可以被安装在所述光源的前面。它还可以作为一层而被安装在内层的上面。这种层的一个实例是光敏抗蚀剂。在所述的激活停止之后可以除去该层。然而，有利的是在内层上提供大量的液体材料，该数量在激活停止以后不需要被除去。该大量的液体材料的优点在于所产生的分层区域具有圆的、椭圆的或者其它没有弯角的形状。在分层区域的边界区域中的弯角形成了可能产生裂纹的脆弱点。由于大量的液体材料具有圆形的表面，因此进一步形成了与外层的适当接合。
在第二实施方案中，内层的整个表面是被激活的，在这之后局部提供内层的覆盖物。该覆盖物例如是大量的液体材料。当随后施加外层时，覆盖物和外层之间的粘附性将比外层和内层的激活的表面之间的粘附性要弱。这样就定义了分层区域。
通过适当的定位所述数量，使得分层区域被具有适当粘附性的区域围绕。该后一区域可以将应力传递到分层区域，该应力是在设置外层时产生的，该传递对于粘附是有利的并且降低了所不希望的应力的风险。该定位优选只设计一次并且然后通过使用模板来确定。另一方面，有可能使用印刷技术，其中所述模板实现在印戳表面上的模式中。这种印刷技术的适当实例是微接触印刷。
液体材料优选的是以液滴的形式提供的。例如使用分配器装置设置来提供这样的液滴。这是优选的，原因在于如通过调整分配器时间、针的直径或者施加压力可以设定材料的数量。所述液体材料优选是可以固化的聚合物，诸如环氧树脂或者丙烯酸酯。所希望的液滴的大小和位置取决于设计的几何尺寸。可以在集成电路的下侧或者上侧、或者在两侧上都提供液滴。
内层优选包括硅材料，其通常包括二羟基硅氧烷作为重复单元。可替换的，可以应用聚酰胺。
尤其可以借助于等离子体或者电晕处理来激活该可固化的材料。优选的实施方案是氧气等离子体处理。可以在大气压强以及低压下进行该处理。该处理的优点在于它只持续几秒时间。
参考附图和附图的说明来进一步解释根据本发明的该半导体器件和方法的这些和其他的方面。，其中：
图1是半导体器件的图示截面图；
图2是半导体器件细节的图示截面图；以及
图3是半导体器件的第二实施方案的图示截面图。
图1是半导体器件的图示性截面图。制作在硅衬底中和硅衬底上的集成电路10通过粘附层13(例如银胶)连接到引线框14。该引线框14通常是由FeNi或者CuFe合金构成的。集成电路通过接合线15连接到引线框14，并且被包封的内层21覆盖。在这个实例中的内层21包括硅橡胶。钝化层(没有示出)通常是氮化硅，其位于集成电路10和内层21之间。其全部被封在包封的外层16中，通常是填充有石英粉末或者玻璃粉末的环氧树脂。
图2说明在图1中示出的半导体器件的细节。氧化硅层17覆盖集成电路10。铝接合垫18位于氧化硅17上。整个集成电路被在接合垫处具有开口的氮化硅的钝化层20所覆盖。该氮化硅层的厚度大约是1微米。通过PECVD工艺来施加氮化硅层20。
随后，将包括具有氮化硅层20的多个集成电路10的硅晶片分成安装在引线框14上的芯片(划片)。一旦布线15连接至引线框14和接合垫18，则其全部用聚(二羟基硅氧烷)的内层21来覆盖。然后通过Techcon Systems公司的Varimeter/controller TS9300型号的分配器装置来将环氧树脂的液滴施加在每个芯片10的内层。随后，通过Tepla 300微波等离子体系统中的氧气等离子体、在1或2mbar压强下、以300-500瓦功率持续5-10秒来激活液滴和剩余的表面。然后芯片10被封在环氧树脂16中。为此目的，可以使用如EMF-6210(供应商Sumitomo)来施加通常填充的环氧树脂。在外层16的热处理后液滴产生了分层区域22，该分层区域22被共同界面24所限制。
图3说明根据本发明的半导体器件的第二实施方案。半导体器件包括半导体材料的衬底，在这种情况下为硅，集成电路10提供在该衬底中或者在衬底上。该集成电路10被氮化硅的钝化层20覆盖，其暴露出A1的接合垫18。聚酰胺的内层21位于钝化层20的上面。接合垫18通过互连28和例如Cu的导电材料的桥25连接到焊料小球30。阻挡层31位于桥25和焊料小球30之间。焊料小球30与载体40的导电部分34接触。
外层16配置在内层21的上面，该内层和外层21、16具有共同界面24。在内层21上还存在可以固化的大量材料。在焊接步骤之后，该材料将形成分层区域。由于随后产生的温度和压强，造成在分层区域22中内层21和外层16互相分层。在图中该分层是通过虚线42来表示的。与此同时，内层21和外层16之间的共同界面24在桥25和互连28附件是完好无损的。
总之，包括集成电路的半导体器件封装通常包括内层和外层，这些层具有共同界面。由于该界面封闭了分层区域所以实现了封装的改进的稳定性，这些区域是与集成电路的任意接合垫相隔离的。通过内层表面的智能激活模式可以产生分层区域。因此，可以在该表面上设置大量的可固化聚合物。

Claims (10)

1.一种包括载体和集成电路(10)的半导体器件(40)，其：
包括一个或者多个半导体元件和一个或者多个通过其使半导体元件相接触的连接区域(18)，所述半导体元件通过包封与环境相隔离，所述包封包括具有共同界面(24)的内层(21)和外层(16)，
载体(40)包括导电部分(14，34)，连接区域通过所述导电部分经由连接装置而连接，
其特征在于共同界面(24)完全限制了分层区域(22)，其结果是完全限制的分层区域(22)与所述连接区域相隔离。
2.根据权利要求1的半导体器件，其特征在于所述分层区域(22)和界面(24)位于内层(21)的表面上，并且所述分层区域(22)的大小占内层(21)的表面面积的30-70％之间。
3.根据权利要求1的半导体器件，其特征在于内层(21)留下接合垫(18)被暴露。
4.根据权利要求1的半导体器件，其特征在于大量的固化合成树脂位于分层区域(22)中。
5.根据权利要求1的半导体器件，其特征在于所述包封附着于载体。
6.根据权利要求1的半导体器件，其特征在于所述载体(14)是引线框。
7.一种在包括具有共同界面(24)的内层(21)和外层(16)的包封中包封集成电路的方法，包括下列步骤：
在集成电路的表面上设置所述内层(21)；
激活内层(21)的表面，以及
在内层(21)的表面上设置外层(16)，这样形成共同界面(24)，
其特征在于内层(21)的表面是根据模式被激活的，同时位于内层(21)的表面处或表面上的分层区域(22)保持不被激活。
8.根据权利要求7的方法，其特征在于所述模式化的激活是通过在设置外层(16)之前在该内层上施加大量的液体材料来实现的，所述量定义了分层区域(22)。
9.根据权利要求8的方法，其特征在于在内层(21)的表面被激活之前施加大量的液体材料，该液体材料也是可固化的，同时所述大量材料的表面被激活。
10.根据权利要求7的方法，其特征在于所述激活是借助于等离子体处理或者电晕处理来产生的。
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