CN1193649C - 一种电连接元件的制造方法和制造设备 - Google Patents
一种电连接元件的制造方法和制造设备 Download PDFInfo
- Publication number
- CN1193649C CN1193649C CNB01805966XA CN01805966A CN1193649C CN 1193649 C CN1193649 C CN 1193649C CN B01805966X A CNB01805966X A CN B01805966XA CN 01805966 A CN01805966 A CN 01805966A CN 1193649 C CN1193649 C CN 1193649C
- Authority
- CN
- China
- Prior art keywords
- substrate
- recess
- produce
- depth
- section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
- G06K19/07773—Antenna details
- G06K19/07777—Antenna details the antenna being of the inductive type
- G06K19/07779—Antenna details the antenna being of the inductive type the inductive antenna being a coil
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
- G06K19/07773—Antenna details
- G06K19/07777—Antenna details the antenna being of the inductive type
- G06K19/07779—Antenna details the antenna being of the inductive type the inductive antenna being a coil
- G06K19/07783—Antenna details the antenna being of the inductive type the inductive antenna being a coil the coil being planar
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
- G06K19/07773—Antenna details
- G06K19/07777—Antenna details the antenna being of the inductive type
- G06K19/07784—Antenna details the antenna being of the inductive type the inductive antenna consisting of a plurality of coils stacked on top of one another
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0014—Shaping of the substrate, e.g. by moulding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
- H05K3/045—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by making a conductive layer having a relief pattern, followed by abrading of the raised portions
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0393—Flexible materials
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/165—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed inductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0347—Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0364—Conductor shape
- H05K2201/0376—Flush conductors, i.e. flush with the surface of the printed circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09036—Recesses or grooves in insulating substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09563—Metal filled via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09727—Varying width along a single conductor; Conductors or pads having different widths
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09736—Varying thickness of a single conductor; Conductors in the same plane having different thicknesses
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
- H05K2203/0108—Male die used for patterning, punching or transferring
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0353—Making conductive layer thin, e.g. by etching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1545—Continuous processing, i.e. involving rolls moving a band-like or solid carrier along a continuous production path
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/005—Punching of holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/426—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4635—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating flexible circuit boards using additional insulating adhesive materials between the boards
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49169—Assembling electrical component directly to terminal or elongated conductor
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
- Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)
- Details Of Connecting Devices For Male And Female Coupling (AREA)
- Manufacturing Of Electrical Connectors (AREA)
- Coils Or Transformers For Communication (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
本发明涉及一种电连接元件的制造方法,其基本特征是:在一个冲压步骤中,用一个冲压模使一块可塑性变形的基底这样产生变形,即在应当产生印制导线和例如还有通孔或接触面的地方产生凹部。紧接着进行该基底的一层薄的导电层的涂覆。在下一个步骤中,整个基底用导电材料进行电镀,直至凹部被填满导电材料为止。然后通过一个去除过程或腐蚀过程去掉导电材料,直至该基底不应当具有导电表面的那些部位没有金属镀层为止。
Description
技术领域
本发明涉及诸如印制电路板、高密度内连接、球栅阵列(BGA)基底、芯片尺寸封装(CSP)、多片组件(MCM)基底等电连接元件的领域。特别是,本发明涉及一种电连接元件的制造方法和制造设备。
背景技术
微电子学领域内的不断推进的小型化也对电连接元件尤其是印制电路板、内连接等的制造产生影响。在许多应用领域内,有必要逐步通过新方法来代替印制电路板的常规制造。导电图形的常规制造基于光化学方法和通孔的机械钻制。较新的一些方法包括用激光器或通过等离子刻蚀或通过钻孔工具在印制电路板材料上机械地钻出极小的孔(微钻孔,参见国际公开说明书WO 00/13062)。
不断用适合实际要求的新方法进行钻微孔,而导电路径的蚀刻则和以前一样采用行之有效的光刻方法进行。但该方法涉及许多加工步骤,例如光刻胶的曝光、显影和剥离。所以该方法相当昂贵,而且从环境保护的观点来看,也存在一些缺点。
美国专利说明书6 035 527提出了一种方法,该方法利用现代的孔成型技术而可用来制造印制导线。该方法通过激光烧蚀在基底上制造基本上呈矩形横截面的凹部。然后例如通过化学汽相沉积(CVD)法在整个基底上镀覆一层薄的导电层。随后用一种选定的方法去掉所有没有形成印制导线的区域即除了凹部以外的区域的导电层。这种有选择的去掉例如也可通过激光烧蚀来实现。紧接着用化学方法进行金属沉积,其中导电层的未去掉的区域作为籽晶层使用。通过这种方法可减少湿化学过程的数目。但需要进行多次连续的激光烧蚀步骤,所以该方法对于制作复杂的印制电路板而言太慢。根据一种变体方案,至少可省掉该第二激光烧蚀步骤。该方案是这样进行的:在按本领域技术人员早已熟知的方式镀覆薄的导电层后,将整个基底用电镀方法或用化学沉积进行金属镀覆直至产生一个平的表面为止。然后把这样产生的镀层腐蚀掉,直至只剩下印制导线中的材料为止。这种方法有如下的缺点:需要连续进行激光烧蚀,在常规进行化学工艺步骤时过多腐蚀掉层的厚度和使印制导线的深度和宽度之间达到不利的比例(高宽比)。此外,在腐蚀金属层时,实际上不可避免地也把很浅的凹部腐蚀掉,从而产生断线。但由于经济原因,用激光烧蚀制作深的沟槽是不可取的。其次,由于可能达到上述的不利高宽比,用这种方法制作窄的深的沟槽也是行不通的。
美国专利说明书6 005 198描述了一种制作印制电路板的方法,该方法与常规方法不同,用一个冲压模具在绝缘的和最好是热固性塑料的基底上同时压出U形槽和杯形凹部。为了从该杯形凹部形成两层导线的电连接的盲孔,必须紧接着用化学或机械方法去掉材料。然后进行这些槽和凹部的金属化。金属化例如可用一个橡胶辊把导电的膏压入凹部中来实现。另一种办法是,也可涂覆整个基底,然后用一个橡胶辊把绝缘材料(抗蚀剂)压入凹部中。在随后的一个腐蚀过程中,由于压入的抗蚀剂而使凹部中存在的金属层得到了保护。通过这个方法可以节省一些处理步骤。但这个方法仍然要进行多个湿化学过程。此外,由于该方法的操作性能需要相当宽的U形凹部,所以小型化受到了限制。其次,由于结构上的原因,印制导线要么用导电性能相当差的可固化的膏(“导电油墨”)制成,要么印制导线相当细。由于这个原因,可达到的可靠性和由印制导线传送的功率也都受到了限制。这个方法在实践中已证明是不适用的,因为导电膏或抗蚀剂的压入总是伴随着把这种材料涂抹到其余的表面上。但表面必须没有异物和保持干净,所以在涂覆过程结束和固化后,必须用机械方法把导电膏磨掉。
发明内容
本发明的目的是提出一种新方法来制造印制电路板。为了比现有技术在加工效率、成本和小型化方面变得符合更高的要求,应当满足下列几点:
-全部工艺步骤必须尽可能同时进行。因为先后的工艺步骤会使制造变得复杂和昂贵。
-从工艺经济性和生态保护考虑,湿化学步骤的数目必须保持尽可能少。
-总体上讲,工艺步骤所需的数目应当比现有方法有所减少。
-该方法应当能够实现图形例如印制导线和通孔具有小的侧向尺寸。但与现有技术比较,该可靠性和效率不会变小,所以要求印制导线比现有的系统具有不太浅的横截面,亦即应具有足够大的横截面。
-最后,由于可达到越来越精确的和复杂的图形,所以该方法应当避免这种情况,即产品往往必须相对于模具进行考虑图形精度的精确定位。
本发明提出的方法具有上述特点,如其在各项权利要求中所定义的那样。
该方法的特征基本在于:在一个冲压步骤中,用一个冲压模具使一块可塑性变形的基底这样产生变形,即在应当产生印制导线和例如还有通孔或接触面的地方产生凹部。紧接着进行该基底的一层薄的导电层的涂覆。在下一个步骤中,该整个基底用导电材料电镀,直至凹部填满导电材料为止。然后通过一个腐蚀过程去掉导电材料,直至基底的不应当具有导电表面的那些部位没有金属镀层为止。
最好至少几个结构具有这样的一个横截面,即在这个横截面中,高宽比(深度与宽度的比例)至少为1∶2,例如至少为1∶1,最好在1∶2和5∶1之间。
根据一个优选实施例,在该冲压步骤后进行一次等离子后处理。通过这一处理例如可使涂层部位的通孔去掉剩余层。
根据本发明,印制电路板的制造是惊人的简单的。它只需要一个变形步骤、一个涂覆步骤和两个湿化学步骤。不论是该涂覆步骤还是这两个湿化学步骤都可在基底的整个面积上进行,因而(例如在用激光烧蚀法的情况下)不需要基底相对于模具的侧向定位。所以实施这些步骤是很简便的。即使在制作最精细的图形时,该冲压步骤(在冲压模具安装后)也丝毫不影响在操作时的精确度。此外,用本发明可按极简便的方式解决印制导线横截面的最佳化。该印制导线例如可具有大致呈矩形的横截面,但与现有技术比较,这样的横截面则具有明显有利的高宽比。
本发明基于一系列新的和惊人的认识。
第一个认识是,存在有热塑性塑料,也存在有热固性塑料,这类塑料特别适合用来冲压印制电路板基底。这类基底的例子是液晶聚合物(LCPs)。其它的可能性是聚砜、超过玻璃转化温度可以变形的环氧树脂、一些聚酯(聚醚醚酮)、聚碳酸酯等等。
另一个认识是,冲压模具几乎可制造为任意的结构。这一认识已在国际公开说明书WO 00/13062中部分进行了叙述,其内容被这里所引用。
此外,还有一个很惊人的认识是,用电镀填满基本上为槽形的高宽比大于1∶2和例如1∶1或更大的凹部是可能的。在图形深度和在电镀时总的沉积材料之间的比例也是令人惊奇的有利。不产生所谓的“缩孔”即凹部未完全填满的电镀也是可能的。根据现有技术,在用常规电镀方法的情况下,出现这种情况是自然的,因为在这些电镀方法中,由于电场分布使镀上的材料优先积聚在表面和边缘上而不是在凹部中。根据现有技术,若采用所谓的“反向脉冲电镀”方法,也完全可能电镀填满凹部。根据这种方法,电流多次转换极性,从而导致材料交替沉积在基底上并被再次去掉。这样,在最佳情况下,可能避免“缩孔”形成,但设备费用、耗用的能和加长的制作时间是大的缺点。
附图说明
下面结合附图来详细说明本发明的一些实施例。附图所示为:
图1~5用相关装置的示意图来说明本发明方法一个实施例的工艺步骤序列;
图1a为通过压印冲头的一段剖开的示意剖面;
图6为按本发明方法的用于制造印制电路板的一种设备的示意图;
图7a和7b是按现有技术进行的电镀过程的例子;
图8a和8b是按本发明电镀充填垂直于基底表面的印制导线横截面的例子;
图9是沿着一个水平平面剖开的容器的示意俯视图,该容器用于实施电镀步骤的批量处理过程;
图9a和9b是图9的详图;
图9c是通过图9装置剖开的一个垂直剖面;
图10是电镀步骤作为连续过程的一种实施装置的一个例子的示意图;
图11是按一个特殊变型方案的电解液循环示意图;
图12a、12b和12c是在制造过程的不同阶段通过印制电路板一个区域剖开的剖面;
图13a、13b和13c是在制造过程的不同阶段通过按本发明的电连接元件的一种结构型式的一个区域剖开的剖面;
图14a、14b和14c是在制造过程的不同阶段通过按本发明的电连接元件的另一种结构型式的一个区域剖开的剖面。
具体实施方式
在图1中示意示出了一块基底1a。它在此处所示的例子中是一个液晶聚合物膜,该基底也作为构成用于电连接元件即印制电路板的许多基底的想象的连续膜1。
液晶聚合物是聚合物塑料,在这类塑料中,单个分子按局部有序定向相互“凝固”。液晶聚合物是众所周知的。这类聚合物是具有一系列特别适合用作印制电路板基底的特性的热塑性塑料。这种塑料例如是尺寸稳定的、自熄灭和几乎不吸水的。其介电常数εr约为2.9,这对高频电路是很有利的。
当然,按本发明的方法也可用于不是LCP膜的基底。特别是也可用于那些按常规定义比膜厚的基底。还可用不是液晶聚合物的其它可塑性变形的材料,这可参见专业文献。
在图1中示出电连接元件的一种冲压装置21。该装置具有一个给料辊3和一个受料辊5,它们布置在冲压室7的外面。冲压模具9,例如一个微型冲压模具,伸入该冲压室的里面,该模具具有一个上压印冲头11和一个下压印冲头13。基底膜1由给料辊3、受料辊5和由孔这样引入该冲压室的壁,使之通过冲压室7延伸。另外也可把该给料辊和受料辊布置在该冲压室里面。两个压印冲头11、13的对压为一个冲压步骤。冲压后在基底两侧同时产生凹部。至少一些凹部基本上为槽形。冲压后,基底膜被卷绕到受料辊5上。在进行冲压步骤时,基底根据基底所用的材料被加热到一个能使之产生塑性变形的温度。在该图中也示出了通过冲压步骤产生的加工后的基底1b。
在图1a中还示出上压印冲头11的详图。该压印冲头例如用LIGA方法制造并具有一个表面11a以及超出该表面的凸部11b、11c。其中,可分为梳状或梳形的凸部11b和销形的凸部11c,前者沿一个(垂直于图纸平面)的方向延伸并用于构成印制导线的槽形的凹部,而销状的凸部11c则用于构成通孔。至少一些梳状的凸部11b具有一个垂直于表面11a的横截面,在这个横截面中,宽度b最多等于高度h的两倍。在图示例子中,压印冲头是金属的,但它可用任一种例如比铜硬的材料制成。
在这里所述的例子中,示出了两个压印冲头,在进行冲压步骤时,基底在这两个压印冲头之间被同时冲压。但也可设想只用一个压印冲头,该压印冲头朝紧贴在一个坚硬表面上的基底冲压。当然,在这种情况中,基底只有一侧产生凹部。
该冲压步骤也可包括多个不同的冲压过程。例如可用一个粗冲模进行一个粗冲压步骤,然后用一个精冲模进行一个精冲压步骤。
除了两个压印冲头的对压外,冲压步骤也可通过旋转辊的冲压(“滚压”)来实现。
图2中所示的再净化或再处理步骤例如用等离子刻蚀来进行。除此以外,也可采用湿化学过程。等离子刻蚀步骤是按一种众所周知的并已在多种出版物中多次描述的方式在一个等离子刻蚀装置23中进行的。其中基底1例如同样被张紧在一个给料辊13和一个受料辊15之间。该再处理步骤的目的在于,除掉残余的和由冲模没有清除掉的残余材料1r。这种残余材料1r例如残留在已冲压的基底1b上的某些应当产生通孔的部位。再处理后的基底1c也被示意性地示于图2中。
在下一个步骤中,按图3涂覆一层薄的导电层。这个步骤例如可在一个真空室中用溅射来实现。也可设想用别的方法,例如化学气相沉积法(CVD)、热蒸汽喷镀,阳极蒸汽喷镀或其它化学或物理方法。作为涂覆材料最好用铜,但也可用别的导电材料例如银等。在一定的聚合材料时,铜可直接涂覆而不产生粘附强度的问题。在其他情况中,必须首先用铬、钛或钨沉积所谓的粘附层。在第二步骤中,一般涂覆铜。在这种情况中,薄的导电层由两层或更多的金属层组成。
该涂覆步骤例如也可在一个装置25中进行,该装置具有一个给料辊和一个受料辊,基底膜被张紧在这两个辊之间。该涂覆步骤的目的是,使基底在随后的电镀处理中导电并在绝缘的基底材料和已镀上的导电材料之间形成一个接触面。在图3中,涂覆装置25也象图2的再净化装置那样,只是很简要地示出。本领域技术人员不难断定,一个涂覆装置必须具有哪些元件(当该涂覆装置为一个溅射装置时,例如需要产生和保持真空的机构、例如一个离子源、至少一个目标和必要时的离子偏转装置)。在图3中还分别示出了涂覆步骤1c之前作为基底层(电介质)101的基底和涂覆步骤之后带有涂层102的基底。
在进行了涂覆以后,在整个基底上沉积导电材料,直至凹部被填满为止,如图4所示。填满凹部是在一个电解槽中进行电镀来实现的,该金属包层过程例如不用“反向脉冲电镀”,亦即在电镀过程中,极性不反向或例如最多反向两次。可用铜作为材料,但原则上也可使用其它导电材料,例如银。这个处理步骤所用的装置27例如也具有两个辊17,在其间张紧该中间产品。这里示出的装置是很简略的,关于电镀步骤尚待下面详细说明。在这个处理步骤前的产品用1d表示,在这个处理步骤后的产品用1e表示。在这个处理步骤后,基底层具有一个填满凹部的和将整个基底全面镀覆的电镀层103。
所以在下一个步骤中,按图5去掉电镀层,直至只有导电材料103′以及其上设置有印制导线的凹部、通孔和接触部位的这些部位为止。这种去掉例如可用湿化学的方法通过刻蚀来实现。该深刻蚀在一个腐蚀装置29中按众所周知的方式例如在化学药剂池中进行,或者通过喷射腐蚀溶液来实现。但也可用别的去掉方法进行腐蚀,例如机械磨去法(例如细磨“研磨”)或别的化学或物理去掉法。
在上述全部工作步骤中,也可不用图中所示“辊对辊”的张紧方法来把作为膜构成的基底夹持在两辊之间。例如只把形状稳定的基底悬挂或固定在边缘上、把基底张紧或粘接在一块板上、把基底张紧在一个框架中等等。
上述的工艺步骤最好在印制电路板的自动化制造设备中进行。如图6简要所示,这种设备由一个真空区段和一个进行湿化学步骤的区段组成。该真空区段包括进行冲压步骤的装置21、用等离子刻蚀进行再净化的装置23和涂覆装置25。该真空区段最好具有多个室。实施湿化学步骤的区段具有一个电镀装置27和一个刻蚀装置29。这些装置的主要特征已在上面的工艺步骤说明中进行了说明,所以这里不再赘述。
不同于图6的另一方案是,冲压装置也可布置在真空区段外面,而且冲压也可在含氧的环境中或例如在保护气体中进行。
进行冲压步骤的装置21例如可不同于结合图1所述的和在图6中示出的装置而可包括多个压印冲头。在这种情况中,可在多块基底上进行同时冲压。此外,除了给料辊和受料辊外,在这些装置之间还可设置存储用卷筒31(“缓冲滑轮”)。这种存储用卷筒例如起存储器和缓冲器的作用并特别设置在具有不同周期时间的装置之间。
下面对导电材料的电镀步骤进行详细说明。迄今为止,只有浅的图形才考虑用导电材料进行电镀充填。其理由是,在电镀时,材料必然积聚在电场大的地方,即优先积聚在角和边上。但本发明这里要说明的实施例则基于这样的原理:印制导线具有一个横截面,在这个横截面中,作为深度与宽度之比的高宽比至少为1∶2和例如接近1∶1或更大。
图7a和7b表示按现有技术进行电镀。为清晰起见,在此二视图及其下面的视图中略去了镀上的金属层的阴影线。在图7a中示出了一个典型的基底形状101′,该基底具有一层薄的涂覆层,并在该涂覆层上电镀了一层导电层103′。示出的线41′表示在涂覆不同材料量时导电材料的表面变化。即使在相当大的层厚时,在表面上仍可看出基底的凹部。在图7b中示意地示出了所谓的“缩孔”形成。这里的线41″也表示在涂覆不同材料量时的表面变化。在已涂覆的基底101″上进行电镀时,由于导电材料103″优先积聚在角上和几乎不积聚在凹部中,所以当被充填的凹部的宽度和深度之间的比例变小时,便会形成空腔(“缩孔”)111′。因此,在高宽比大于1∶3、1∶2或甚至2∶3或1∶1或更大时的凹部迄今为止都不考虑用电镀充填。本发明在上述范围也能用电镀充填。
图8a和8b表示按本发明的实施例充填的凹部。其中的线41表示在电镀的不同阶段的导电层103的表面。从图中可清楚看出,很快就达到了一个平的表面。图中的虚线表示基底的表面平面。尺寸t和b分别表示槽的深度和宽度。除图中所示的接近于矩形或U形的横截面外,也可是任意的、可用一个压印冲头产生的别的形状的凹部的横截面。
按本发明这里所述实施例的镀铜可在图9和9c所示的装置中进行。这里描述了一个批量处理过程,在这个过程中,一个试样被放入一个电解槽中处理并随即从该槽中取出。图9表示一个电镀装置的垂直布置的示意俯视图。图9c表示沿图9的线C-C剖开的一个剖面。该装置具有一个容器51,在该容器中,两边设置了两根阳极棒53,中间设置了一个阴极棒55。该阴极棒用来支撑并接通一块在图9a的正视图中用缩小比例示出的带有一个孔56a的钢板56。孔56a设置了一个用于固定涂覆后的基底的张紧装置56b。此外,还设置了一个隔膜57和一块隔板59。隔膜57的作用是阻挡阳极泥60不进入包围阴极的电解液,而该隔板的作用则是侧向隔离流体或电场(图9b)。还设置了作为穿孔介质管构成的装置61,通过它可对酸性的铜电解质进行必要的供气。其次还设置了在图中未示出的泵和过滤装置,通过它们把电解液输出、过滤和重新输入该容器中。通过这些装置引起的电解液循环例如是每小时电解液流量的3至5倍。
在电镀过程中,重要的是电解液的成分必须无“缩孔”地充填凹部,即使凹部具有上述相当大的高宽比。
令人惊奇地发现是,用于装饰目的的常规电镀技术的方法,在具有相应匹配的情况下,也可用于这里的使用目的。这些方法迄今为止都未考虑用于印制电路板技术中(或广义地讲,用于电连接元件)。迄今为止,这类方法只用来使表面增光(装饰用)。迄今为止,上述方法还未用于材料在带凹部的表面上的、通常为图形的表面上的生成,或者未非常普及地用于功能性的电镀技术中。
根据第一实施例,电解液具有下列成分:
硫酸(H2SO4):10~200克/升
硫酸铜(CuSO4×5H2O):50~500克/升
氯化钠(NaCl):10~250毫克/升,以及有机添加剂
德国Solingen的HSO公司生产的HSO C-WL型基本光泽剂:0.5~5毫升/升
HSO C-WL型光泽载体:0.5~5毫升/升
HSO C-WL型光泽添加剂:0.05~2毫升/升
用下列参数可得特别有利的结果:
硫酸45~70克/升,硫酸铜200~230克/升,氯化钠100~190毫克/升,HSO C-WL型基本光泽剂2.2~4.2毫升/升,HSO C-WL光泽载体1.6~2.8毫升/升,HSO C-WL光泽添加剂0.15~0.9毫升/升。
最佳结果是用45~60克/升硫酸,210~230克/升硫酸铜,140~170毫克/升氯化钠,2.6~3.8毫升/升HSO C-WL型基本光泽剂,1.7~2.5毫升/升HSO C-WL光泽载体和0.2~0.6毫升/升HSO C-WL型光泽添加剂实现的。
根据第二实施例,在无机物成分时,使用与第一实施例相同的成分:硫酸(H2SO4):10~200克/升,最好为45~70克/升和例如为45~60克/升,硫酸铜(CuSO4×5H2O):50~500克/升,最好为200~230克/升和例如为210~230克/升,氯化钠(NaCl):10~250毫克/升,最好为100~190毫克/升和例如为140~170毫克/升。
但是按Solingen(德国)的Schmidt公司的(常规电镀技术的)HSOC-OF方法来准备有机成分。
在图10中还示出了用按本发明方法的这个实施例作为连续过程的实施装置。图中很简要地示出了该装置的水平布置形式。但尤其在大型设备中也可设想是具有转向辊等的复杂的布置形式。在这个实施例中,作为连续过程不需要固定涂覆的基底。起阴极作用的基底1(带有涂覆层)例如象上面所述的那样作为可弯曲的膜构成并用辊张紧。例如在整个过程中,该膜都在运动并沿水平方向被牵引通过电解液容器。阳极53′设置在基底的上方和下方或两侧。该装置具有进气机构并也具有隔膜和隔板,其作用这里不再赘述。此外,设置有用来持续引起电解液流动的未示出的喷嘴。通过这种流动,其在图中用箭头象征性的表示,可以防止电解液随时间在接近阴极时局部贫化。
图11表示本发明方法的一个实施变体方案的示意图。在这个变体方案中,在涂覆的基底上的铜沉积过程在一个电解槽51″中进行,该电解槽同一个容器63″相隔开,在该容器中,固态的铜被溶解成电解液。电解液不断进行循环,这样贫化的电解液便从电解槽51″被运入容器63″并随富集铜的电解液从该容器运入电解槽中。
本发明的方法特别适用于制造具有大的高宽比>1.2的精细图形,因为槽的深度也通过所用电介质的厚度而受到限制。由于该厚度为10~200微米的范围,所以导电槽一般具有10和最大100微米之间的宽度。因此,在印制电路板应用中,可以很简单而又经济地制造特别精细的导电路径,但实际上在所有应用中也需要用金属涂覆的较大面积。例如在印制电路板上焊接的元件的连接面一般都相当大且供电导线(Vcc和GND)往往也必须作成平面式的。在电镀后,这些面具有很小的铜层厚度,并在铜变薄后,在这些平面的区域内的铜被腐蚀掉。图12a、12b和12c示意地示出了这个过程。其中图12a表示冲压步骤后的一块基底201。图12b表示同一基底在涂覆步骤和电镀步骤后具有一层铜层203。在腐蚀后,按图12c只有在台阶附近以及在凹部中保留铜203′。
为了能用按本发明的方法制造这些大面积的图形,可采取如下的不同的结构措施:
作为接触面构成的面为被分成若干精细网格的图形。这可例如通过按本发明方法的最佳高宽比的平行延伸的或交叉的精细槽来实现。在这种情况中,可制作很好的供电平面或屏蔽平面,因为这类平面在常规应用中一般也被分成网格。但如欲制作焊接用的连接面,则分格的面不可能具有良好的焊接质量,因而该方法必须这样改变,使之能够形成封闭的焊接面。
图13a、13b和13c表示一种可能性,其与图12a至12c相似,示出了冲压步骤后,电镀步骤后或腐蚀步骤后的一个电连接元件。这种可能性在于,在冲压步骤过程中,在基底301上分格有带很精细图形301a的平面区域。这些图形具有凹部,且这些凹部间设有凸部。这些图形的深度即凹部的深度例如小于T/2,其中T表示印制导线的槽形凹部的深度。这样就导致了该精细格区内的铜的人工增厚并在铜变薄后剩下一层封闭的剩余层303a′。可按各种各样的方式制造该网格,例如平行的导电路径、交叉的导电路径等等。
也可通过制作这样一种冲压模具来达到所述目的,即该模具除了具有凹部和位于其间的凸部的精细图形外,还含有大的平面的图形。图14a、14b和14c表示在制造过程的不同阶段中的一个相应的电连接元件。在电镀时,精细的图形被快速充填并随即镀上在面积的图形。这样就整个在这些平面区域产生一层稍厚的铜层并在铜变薄后剩下一层封闭的剩余层403a′,亦即这些凸部在腐蚀后仍有铜覆盖。
焊接平面的平面区域的分格还具有这样的优点,即铜层以机械的方式牢固锚定在电介质上,从而明显提高焊接面的附着强度。
本发明不限于上述制造印制电路板的一些实施例。在了解本发明的情况下,本领域技术人员不难断定本发明同样适合制造别的电连接元件。
此外,为简化起见,上述说明是基于一个完成了的连接元件的工艺步骤。本领域技术人员不难看出,除了上述步骤外,还可进行制造一个电连接元件的其它处理步骤。其次,该方法也适用于将半成品继续处理成一个连接元件的制造。这样的半成品例如可用别的元件加工成一个多层的电连接元件。
用按本发明方法制造的电连接元件具有多种可能的压印,并可用于使用电连接元件的一切领域。除了用相互电连接的元件装配的印制电路板的这种常规应用外,按本发明的连接元件当然也颇适宜用于取得了很大进展的小型化。此外,也适用于印制导线的电流负荷能力比较重要的使用场合。这些方面的是有利的,如上所述,按本发明的连接元件具有带特别有利的横截面的导线。所以例如按本发明的连接元件可起平面线圈的作用,其中,在材料具有相当韧性的情况下,可通过叠置该线圈而构成多层的平面线圈。
Claims (18)
1.一种电连接元件的制造方法,其特征在于下列工艺步骤:
a.用一种塑性变形的聚合材料制成一块基底(101、201、301、401);
b.通过一个冲压模具(9)使该基底产生机械变形,即在应当产生印制导线的地方产生呈槽形的凹部;
c.在该基底上涂覆一层导电层(102);
d.进行该基底的充填上述凹部的电镀,直至在该基底上产生一个第二导电层的平的表面为止;
e.去掉该沉积的导电材料(103),直至该基底的那些不应当具有导电表面的部位没有金属涂层为止。
2.按权利要求1的方法,其特征在于,在步骤b中产生的凹部具有一个垂直于该基底的一个表面的横截面,在该横截面中,高宽比即图形的深度(t)和宽度(b)之间的比例至少为1∶2。
3.按权利要求2的方法,其特征在于,所述高宽比至少为2∶3以及最多为5∶1。
4.按权利要求2的方法,其特征在于,该高宽比至少为1∶1。
5.按权利要求1的方法,其特征在于,在步骤b中产生垂直于该基底一个表面的图形,该图形具有一个10微米和100微米之间的宽度。
6.按权利要求1的方法,其特征在于,在步骤b中,也在应当产生通孔的地方附加产生凹部。
7.按权利要求6的方法,其特征在于,在冲压步骤b之后和步骤c之前进行一个再净化步骤。
8.按权利要求1的方法,其特征在于,在步骤b中,通过两个压印冲头(11、13)在该基底两侧同时产生凹部。
9.按权利要求1-8中任一项的方法,其特征在于,在冲压步骤中,附加产生具有网格图形的区段作为一组被凸部相互隔开的凹部,其中,凸部的高度(h′)小于用于印制导线的呈槽形的凹部的深度(t)。
10.按权利要求1-8中任一项的方法,其特征在于,该冲压步骤包括一个用一个粗冲压模进行的粗冲压步骤和一个随即用一个精冲压模进行的精冲压步骤。
11.按权利要求1-8中任一项的方法,其特征在于,在步骤d中所用的电解液含有10~200克/升硫酸、50~500克/升硫酸铜和10~250毫克/升氯化钠以及有机添加剂。
12.按权利要求11的方法,其特征在于,该有机添加剂包括0.5~5亳升/升HSO C-WL型基本光泽剂、0.5~5毫升/升HSO C-WL型光泽载体和0.05~2毫升/升HSO C-WL光泽添加剂。
13.按权利要求11的方法,其特征在于,该电解液含有20~100克/升的硫酸和180~280克/升的硫酸铜以及100~190毫克/升的氯化钠。
14.一种电连接元件的制造设备,其包括一个用至少一个压印冲头(9)在塑性变形的基底上产生凹部的装置(21)、一个在绝缘基底上进行物理或化学涂覆的涂覆装置(25)、一个电镀装置(27)和一个腐蚀装置(29),其特征在于,产生凹部的装置(21)、涂覆装置(25)、电镀装置(27)和腐蚀装置(29)是这样布置的,即它们在进行下述工艺步骤时可按顺序通过待处理的基底:
a.用一种塑性变形的聚合材料制成一块基底(101、201、301、401);
b.通过一个冲压模具(9)使该基底产生机械变形,即在应当产生印制导线的地方产生呈槽形的凹部;
c.在该基底上涂覆一层导电层(102);
d.进行该基底的充填上述凹部的电镀,直至在该基底上产生一个第二导电层的平的表面为止。
15.按权利要求14的设备,其特征在于,通过一个安装在产生凹部的装置(21)和涂覆装置(25)之间的再净化装置(23)来去掉绝缘基底的绝缘材料。
16.按权利要求14或15的设备,其中,该用于冲压一种塑性变形的绝缘基底的装置(21)具有一个带凸部(11b、11c)的、用来在该基底上产生凹部的压印冲头(11、13),其中梳形凸部(11b)具有一个垂直于该压印冲头的一个中间表面的横截面,在这个横截面中,梳形凸部的高度(h′)至少为其宽度(b′)的一半。
17.按权利要求16的设备,其特征在于,上述梳形凸部(11b)具有矩形的横截面。
18.按权利要求16的设备,其特征在于,该至少一个压印冲头附加具有用来产生通孔的销形凸部(11c)。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10000090A DE10000090A1 (de) | 2000-01-04 | 2000-01-04 | Verfahren zum Herstellen einer mehrlagigen Planarspule |
DE10000090.8 | 2000-01-04 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1408197A CN1408197A (zh) | 2003-04-02 |
CN1193649C true CN1193649C (zh) | 2005-03-16 |
Family
ID=7626715
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB01805966XA Expired - Fee Related CN1193649C (zh) | 2000-01-04 | 2001-01-04 | 一种电连接元件的制造方法和制造设备 |
Country Status (9)
Country | Link |
---|---|
US (1) | US20030135998A1 (zh) |
EP (2) | EP1245138B1 (zh) |
JP (1) | JP2003519442A (zh) |
KR (1) | KR20020074188A (zh) |
CN (1) | CN1193649C (zh) |
AT (1) | ATE235795T1 (zh) |
AU (1) | AU2139501A (zh) |
DE (2) | DE10000090A1 (zh) |
WO (1) | WO2001050825A1 (zh) |
Families Citing this family (40)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AUPR864501A0 (en) * | 2001-11-05 | 2001-11-29 | Cochlear Limited | Thin flexible conductors |
AU2003201247A1 (en) * | 2002-01-17 | 2003-07-30 | Elmicron Ag | Embossing die for fabricating high density interconnects and method for its fabrication |
DE10233927A1 (de) * | 2002-07-25 | 2004-02-12 | Giesecke & Devrient Gmbh | Datenträger mit Transponderspule |
US7637008B2 (en) | 2002-12-18 | 2009-12-29 | Intel Corporation | Methods for manufacturing imprinted substrates |
US7371975B2 (en) * | 2002-12-18 | 2008-05-13 | Intel Corporation | Electronic packages and components thereof formed by substrate-imprinting |
US6974775B2 (en) | 2002-12-31 | 2005-12-13 | Intel Corporation | Method and apparatus for making an imprinted conductive circuit using semi-additive plating |
JP2005045168A (ja) * | 2003-07-25 | 2005-02-17 | Tokyo Electron Ltd | インプリント方法およびインプリント装置 |
SE526725C2 (sv) * | 2003-09-17 | 2005-11-01 | Acreo Ab | Förfarande och anordning för tillverkning av elektriska komponenter |
JP2005191408A (ja) * | 2003-12-26 | 2005-07-14 | Matsushita Electric Ind Co Ltd | コイル導電体とその製造方法およびこれを用いた電子部品 |
US20050183589A1 (en) * | 2004-02-19 | 2005-08-25 | Salmon Peter C. | Imprinting tools and methods for printed circuit boards and assemblies |
KR101275478B1 (ko) * | 2004-11-22 | 2013-06-14 | 스미토모덴키고교가부시키가이샤 | 가공방법, 가공장치 및 그 방법에 의해 제조된 미세구조체 |
JP2006304184A (ja) * | 2005-04-25 | 2006-11-02 | Lintec Corp | アンテナ回路、icインレット、icタグ及びicカードならびにicタグの製造方法及びicカードの製造方法 |
WO2007028410A1 (en) * | 2005-09-08 | 2007-03-15 | Alcan Technology & Management Ltd. | Forming tool |
DE102006030267B4 (de) | 2006-06-30 | 2009-04-16 | Advanced Micro Devices, Inc., Sunnyvale | Nano-Einprägetechnik mit erhöhter Flexibilität in Bezug auf die Justierung und die Formung von Strukturelementen |
WO2008023666A1 (fr) * | 2006-08-23 | 2008-02-28 | Cluster Technology Co., Ltd. | Procédé de fabrication d'une carte de connexion et carte de connexion correspondante |
AU2008232361B2 (en) | 2007-03-23 | 2013-05-16 | Allegiance Corporation | Fluid collection and disposal system and related methods |
US9889239B2 (en) | 2007-03-23 | 2018-02-13 | Allegiance Corporation | Fluid collection and disposal system and related methods |
DE102007045874A1 (de) * | 2007-09-25 | 2009-04-02 | Ceos Corrected Electron Optical Systems Gmbh | Multipolspulen |
KR100936078B1 (ko) * | 2007-11-12 | 2010-01-12 | 삼성전기주식회사 | 전기부재 및 이를 이용한 인쇄회로기판의 제조방법 |
CN101489356B (zh) * | 2008-01-16 | 2011-03-30 | 富葵精密组件(深圳)有限公司 | 电路板及其制作方法 |
JP2010010500A (ja) * | 2008-06-30 | 2010-01-14 | Hitachi Ltd | 銅回路部品およびその製造方法 |
DE102008053096A1 (de) | 2008-10-24 | 2010-04-29 | Giesecke & Devrient Gmbh | Verfahren und Vorrichtung zur Herstellung von Datenträgern und Datenträgerhalbzeugen, sowie Datenträger und Datenträgerhalbzeug |
WO2011008961A1 (en) | 2009-07-15 | 2011-01-20 | Allegiance Corporation | Fluid collection and disposal system and related methods |
DE102010045780A1 (de) * | 2010-09-17 | 2012-03-22 | Rohde & Schwarz Gmbh & Co. Kg | Kalibriereinheit für ein Messgerät |
JP5762137B2 (ja) * | 2011-05-27 | 2015-08-12 | 上村工業株式会社 | めっき方法 |
DE102012112550A1 (de) | 2012-12-18 | 2014-06-18 | Lpkf Laser & Electronics Ag | Verfahren zur Metallisierung eines Werkstücks sowie ein Schichtaufbau aus einem Werkstück und einer Metallschicht |
CN103176650B (zh) * | 2013-03-01 | 2016-09-28 | 南昌欧菲光科技有限公司 | 导电玻璃基板及其制作方法 |
CN103338589A (zh) * | 2013-05-30 | 2013-10-02 | 南昌欧菲光科技有限公司 | 挠性电路连接器件 |
DE102013213663A1 (de) * | 2013-07-12 | 2015-01-15 | Zf Friedrichshafen Ag | Anhängerkupplung |
US9155201B2 (en) | 2013-12-03 | 2015-10-06 | Eastman Kodak Company | Preparation of articles with conductive micro-wire pattern |
CN103889159A (zh) * | 2014-03-24 | 2014-06-25 | 宇龙计算机通信科技(深圳)有限公司 | 一种填埋式导电线路制备工艺 |
DE102014224426A1 (de) * | 2014-11-28 | 2016-06-02 | Zf Friedrichshafen Ag | Anhängerkupplung |
JP6597476B2 (ja) | 2016-05-20 | 2019-10-30 | 日亜化学工業株式会社 | 配線基体の製造方法並びに配線基体及びそれを用いた発光装置。 |
DE102016208736A1 (de) * | 2016-05-20 | 2017-11-23 | Zf Friedrichshafen Ag | Elektronikmodul für ein Steuergerät zum Steuern eines Kraftfahrzeugs, Steuergerät und Verfahren zum Herstellen eines Elektronikmoduls |
CN107871673B (zh) * | 2017-10-26 | 2019-09-03 | 苏州华博电子科技有限公司 | 一种厚介质层薄膜多层封装基板制作方法 |
EP3926675A1 (de) * | 2020-06-19 | 2021-12-22 | Heraeus Nexensos GmbH | Temperaturstabiler verbund einer litze mit einem agpt-pad |
CN115023057B (zh) * | 2022-07-27 | 2023-03-24 | 北京自然韩桦科技有限公司 | 超高密度柔性薄膜电路制造方法 |
US11800640B1 (en) * | 2023-03-28 | 2023-10-24 | Infinitum Electric, Inc. | Printed circuit board dielectric molding and electrolytic metallization |
US20240334612A1 (en) * | 2023-03-28 | 2024-10-03 | Infinitum Electric Inc. | Method of printed circuit board dielectric molding or machining and electrolytic metallization |
US12004306B1 (en) * | 2023-03-28 | 2024-06-04 | Infinitum Electric Inc. | Method of printed circuit board dielectric molding and electrolytic metallization |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2772501A (en) * | 1956-05-31 | 1956-12-04 | Robert J Malcolm | Method of manufacturing electrical circuit components |
US2986804A (en) * | 1957-02-06 | 1961-06-06 | Rogers Corp | Method of making a printed circuit |
US3438127A (en) * | 1965-10-21 | 1969-04-15 | Friden Inc | Manufacture of circuit modules using etched molds |
GB1180923A (en) * | 1966-02-21 | 1970-02-11 | Plessey Co Ltd | Improvements relating to Electric Coil Assemblies. |
SE404863B (sv) * | 1975-12-17 | 1978-10-30 | Perstorp Ab | Forfarande vid framstellning av ett flerlagerkort |
US4510347A (en) * | 1982-12-06 | 1985-04-09 | Fine Particles Technology Corporation | Formation of narrow conductive paths on a substrate |
US4604678A (en) * | 1983-07-18 | 1986-08-05 | Frederick Parker | Circuit board with high density electrical tracers |
US4651417A (en) * | 1984-10-23 | 1987-03-24 | New West Technology Corporation | Method for forming printed circuit board |
DE3721985A1 (de) * | 1987-06-30 | 1989-01-12 | Schering Ag | Waessriges saures bad zur galvanischen abscheidung glaenzender und eingeebneter kupferueberzuege |
GB2212332A (en) * | 1987-11-11 | 1989-07-19 | Gen Electric Co Plc | Fabrication of electrical circuits |
US4912844A (en) * | 1988-08-10 | 1990-04-03 | Dimensional Circuits Corporation | Methods of producing printed circuit boards |
AU5409090A (en) * | 1989-04-11 | 1990-11-05 | Northern Telecom Limited | Method of making an impressing tool |
US5091339A (en) * | 1990-07-23 | 1992-02-25 | Microelectronics And Computer Technology Corporation | Trenching techniques for forming vias and channels in multilayer electrical interconnects |
US5343616B1 (en) * | 1992-02-14 | 1998-12-29 | Rock Ltd | Method of making high density self-aligning conductive networks and contact clusters |
US5528001A (en) * | 1992-02-14 | 1996-06-18 | Research Organization For Circuit Knowledge | Circuit of electrically conductive paths on a dielectric with a grid of isolated conductive features that are electrically insulated from the paths |
US5584120A (en) * | 1992-02-14 | 1996-12-17 | Research Organization For Circuit Knowledge | Method of manufacturing printed circuits |
DE4445981A1 (de) * | 1994-12-22 | 1995-08-03 | Alf Harnisch | Glas/Metall-Verbundstrukturen zur Erzeugung, Leitung und Nutzung elektromagnetischer Felder |
DE19602614A1 (de) * | 1996-01-25 | 1997-07-31 | Bosch Gmbh Robert | Spule und Verfahren zur Herstellung von Spulen |
DE19620095B4 (de) * | 1996-05-18 | 2006-07-06 | Tamm, Wilhelm, Dipl.-Ing. (FH) | Verfahren zur Herstellung von Leiterplatten |
US6005198A (en) * | 1997-10-07 | 1999-12-21 | Dimensional Circuits Corporation | Wiring board constructions and methods of making same |
JPH11186698A (ja) * | 1997-12-18 | 1999-07-09 | Matsushita Electric Ind Co Ltd | 回路基板の製造方法および回路基板 |
DE19757182A1 (de) * | 1997-12-19 | 1999-06-24 | Martin Theuerkorn | Planares induktives Bauelement hoher Leistung und Verfahren zu dessen Herstellung |
-
2000
- 2000-01-04 DE DE10000090A patent/DE10000090A1/de not_active Ceased
-
2001
- 2001-01-04 JP JP2001550073A patent/JP2003519442A/ja not_active Withdrawn
- 2001-01-04 DE DE50100130T patent/DE50100130D1/de not_active Expired - Fee Related
- 2001-01-04 AU AU21395/01A patent/AU2139501A/en not_active Abandoned
- 2001-01-04 WO PCT/CH2001/000004 patent/WO2001050825A1/de active IP Right Grant
- 2001-01-04 CN CNB01805966XA patent/CN1193649C/zh not_active Expired - Fee Related
- 2001-01-04 EP EP01900010A patent/EP1245138B1/de not_active Expired - Lifetime
- 2001-01-04 AT AT01900010T patent/ATE235795T1/de not_active IP Right Cessation
- 2001-01-04 EP EP03006007A patent/EP1320287A1/de not_active Withdrawn
- 2001-01-04 US US10/169,570 patent/US20030135998A1/en not_active Abandoned
- 2001-01-04 KR KR1020027008665A patent/KR20020074188A/ko not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
ATE235795T1 (de) | 2003-04-15 |
EP1245138A1 (de) | 2002-10-02 |
DE10000090A1 (de) | 2001-08-30 |
US20030135998A1 (en) | 2003-07-24 |
DE50100130D1 (de) | 2003-04-30 |
CN1408197A (zh) | 2003-04-02 |
AU2139501A (en) | 2001-07-16 |
EP1245138B1 (de) | 2003-03-26 |
EP1320287A1 (de) | 2003-06-18 |
JP2003519442A (ja) | 2003-06-17 |
WO2001050825A1 (de) | 2001-07-12 |
KR20020074188A (ko) | 2002-09-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1193649C (zh) | 一种电连接元件的制造方法和制造设备 | |
DE69033245T2 (de) | Verfahren und vorrichtung zur herstellung von feinen leiterbahnen mit kleinen abständen | |
US10455704B2 (en) | Method for copper filling of a hole in a component carrier | |
CN1178243C (zh) | 电容器 | |
CN101066004A (zh) | 具有被导电材料填充的通孔的基板的制造方法 | |
CN106413266B (zh) | 一种聚酰亚胺无胶柔性印刷线路板的制备方法 | |
CN1694603A (zh) | 印制电路板的电解镀金方法 | |
CN103687312A (zh) | 镀金线路板制作方法 | |
CN104411106A (zh) | 一种印制电路板精细线路的制作方法 | |
CN1308836A (zh) | 形成导电轨迹的改进方法及由此制得的印刷电路 | |
CN1333998A (zh) | 多层层压制品及其制造方法 | |
TW574437B (en) | Electrodeposition device and electrodeposition system for coating structures which have already been made conductive | |
CN1596064A (zh) | 提高了导电层密合性的导电性薄板以及包含它的产品 | |
CN1198492C (zh) | 制造印刷电路板的方法及用在该方法中的基板 | |
DE19951324A1 (de) | Verfahren und Vorrichtung zum elektrolytischen Behandeln von elektrisch leitfähigen Oberflächen von gegeneinander vereinzelten Platten- und Folienmaterialstücken sowie Anwendung des Verfahrens | |
CN1483303A (zh) | 在印刷电路板制造中利用对铜箔的金属化处理来产生细线条并替代氧化过程 | |
CN102469701A (zh) | 互连结构的制作方法 | |
DE102009057466A1 (de) | Vorrichtung und Verfahren zum elektrischen Kontaktieren von Behandlungsgut in Galvanisieranlagen | |
US20040060728A1 (en) | Method for producing electroconductive structures | |
CN1217629A (zh) | 双面导电金属箔型电路板的制造方法及其产品 | |
CN1310289C (zh) | 利用外部影响在工件的上表面和空腔表面放置的添加剂之间产生差别的电镀方法和设备 | |
CN1717158A (zh) | 提升电路板制程良率的方法 | |
JP2005501394A (ja) | 導電構造を製造するための方法 | |
JPH0241873Y2 (zh) | ||
CA2317233A1 (en) | Ultrasonically assisted plating bath for vias metallization in printed circuit board manufacturing |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |