CN1169156C - 具备能抑制消耗电流的接口电路的半导体存储器 - Google Patents

具备能抑制消耗电流的接口电路的半导体存储器 Download PDF

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Publication number
CN1169156C
CN1169156C CNB98119270XA CN98119270A CN1169156C CN 1169156 C CN1169156 C CN 1169156C CN B98119270X A CNB98119270X A CN B98119270XA CN 98119270 A CN98119270 A CN 98119270A CN 1169156 C CN1169156 C CN 1169156C
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China
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mos transistor
mentioned
type mos
channel type
channel
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Expired - Fee Related
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CNB98119270XA
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English (en)
Chinese (zh)
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CN1223442A (zh
Inventor
С���ٷ�
小桥寿夫
樱井干夫
谷田进
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Publication of CN1223442A publication Critical patent/CN1223442A/zh
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Publication of CN1169156C publication Critical patent/CN1169156C/zh
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Logic Circuits (AREA)
  • Static Random-Access Memory (AREA)
  • Amplifiers (AREA)
CNB98119270XA 1998-01-16 1998-09-15 具备能抑制消耗电流的接口电路的半导体存储器 Expired - Fee Related CN1169156C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP6499/1998 1998-01-16
JP6499/98 1998-01-16
JP10006499A JPH11203866A (ja) 1998-01-16 1998-01-16 半導体記憶装置

Publications (2)

Publication Number Publication Date
CN1223442A CN1223442A (zh) 1999-07-21
CN1169156C true CN1169156C (zh) 2004-09-29

Family

ID=11640149

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB98119270XA Expired - Fee Related CN1169156C (zh) 1998-01-16 1998-09-15 具备能抑制消耗电流的接口电路的半导体存储器

Country Status (5)

Country Link
US (1) US6031782A (enExample)
JP (1) JPH11203866A (enExample)
KR (1) KR100306859B1 (enExample)
CN (1) CN1169156C (enExample)
TW (1) TW409461B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104052437A (zh) * 2013-03-14 2014-09-17 美国亚德诺半导体公司 精细时序调整方法

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6347379B1 (en) * 1998-09-25 2002-02-12 Intel Corporation Reducing power consumption of an electronic device
US6330635B1 (en) * 1999-04-16 2001-12-11 Intel Corporation Multiple user interfaces for an integrated flash device
TW522399B (en) * 1999-12-08 2003-03-01 Hitachi Ltd Semiconductor device
KR100443907B1 (ko) * 2001-09-07 2004-08-09 삼성전자주식회사 어드레스 버퍼 및 이를 이용한 반도체 메모리 장치
US6771553B2 (en) 2001-10-18 2004-08-03 Micron Technology, Inc. Low power auto-refresh circuit and method for dynamic random access memories
US6976181B2 (en) * 2001-12-20 2005-12-13 Intel Corporation Method and apparatus for enabling a low power mode for a processor
JP3667700B2 (ja) 2002-03-06 2005-07-06 エルピーダメモリ株式会社 入力バッファ回路及び半導体記憶装置
US6731548B2 (en) * 2002-06-07 2004-05-04 Micron Technology, Inc. Reduced power registered memory module and method
KR100506929B1 (ko) * 2002-08-08 2005-08-09 삼성전자주식회사 동기형 반도체 메모리 장치의 입력버퍼
KR100502664B1 (ko) 2003-04-29 2005-07-20 주식회사 하이닉스반도체 온 다이 터미네이션 모드 전환 회로 및 그방법
JP4592281B2 (ja) * 2003-12-18 2010-12-01 ルネサスエレクトロニクス株式会社 Ｌｓｉのインタフェース回路
KR100571651B1 (ko) * 2003-12-29 2006-04-17 주식회사 하이닉스반도체 파워다운 모드의 안정적인 탈출을 위한 제어회로
US7545194B2 (en) * 2006-06-30 2009-06-09 Intel Corporation Programmable delay for clock phase error correction
KR100914074B1 (ko) 2007-10-09 2009-08-28 창원대학교 산학협력단 고속 신호 전송과 저전력 소비를 구현하는 수신기
US7715264B2 (en) * 2008-06-24 2010-05-11 Qimonda North America Corp. Method and apparatus for selectively disabling termination circuitry
US10468087B2 (en) * 2016-07-28 2019-11-05 Micron Technology, Inc. Apparatuses and methods for operations in a self-refresh state
US10079594B2 (en) * 2016-10-03 2018-09-18 Infineon Technologies Ag Current reduction for activated load

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07130166A (ja) * 1993-09-13 1995-05-19 Mitsubishi Electric Corp 半導体記憶装置および同期型半導体記憶装置
JP3592386B2 (ja) * 1994-11-22 2004-11-24 株式会社ルネサステクノロジ 同期型半導体記憶装置
JPH09167488A (ja) * 1995-12-18 1997-06-24 Mitsubishi Electric Corp 半導体記憶装置
JP3638167B2 (ja) * 1996-01-08 2005-04-13 川崎マイクロエレクトロニクス株式会社 小振幅信号インタフェイス用双方向バッファ回路
US5627791A (en) * 1996-02-16 1997-05-06 Micron Technology, Inc. Multiple bank memory with auto refresh to specified bank
US5818777A (en) * 1997-03-07 1998-10-06 Micron Technology, Inc. Circuit for implementing and method for initiating a self-refresh mode

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104052437A (zh) * 2013-03-14 2014-09-17 美国亚德诺半导体公司 精细时序调整方法
CN104052437B (zh) * 2013-03-14 2018-03-13 美国亚德诺半导体公司 精细时序调整方法

Also Published As

Publication number Publication date
KR19990066760A (ko) 1999-08-16
US6031782A (en) 2000-02-29
CN1223442A (zh) 1999-07-21
JPH11203866A (ja) 1999-07-30
KR100306859B1 (ko) 2001-10-19
TW409461B (en) 2000-10-21

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Granted publication date: 20040929

Termination date: 20091015