TW409461B - Semiconductor memory device - Google Patents
Semiconductor memory device Download PDFInfo
- Publication number
- TW409461B TW409461B TW087114166A TW87114166A TW409461B TW 409461 B TW409461 B TW 409461B TW 087114166 A TW087114166 A TW 087114166A TW 87114166 A TW87114166 A TW 87114166A TW 409461 B TW409461 B TW 409461B
- Authority
- TW
- Taiwan
- Prior art keywords
- transistor
- mentioned
- channel type
- channel
- mos transistor
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 35
- 102100031497 Heparan sulfate N-sulfotransferase 1 Human genes 0.000 claims description 39
- 101000588589 Homo sapiens Heparan sulfate N-sulfotransferase 1 Proteins 0.000 claims description 39
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- 238000001514 detection method Methods 0.000 claims description 7
- 101100148606 Caenorhabditis elegans pst-1 gene Proteins 0.000 claims description 5
- 230000003321 amplification Effects 0.000 claims description 2
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 2
- 101100186131 Arabidopsis thaliana NAC053 gene Proteins 0.000 claims 1
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- 101800000941 Non-structural protein 1' Proteins 0.000 claims 1
- 102100025144 Serine protease inhibitor Kazal-type 1 Human genes 0.000 claims 1
- 101100204286 Ustilago maydis (strain 521 / FGSC 9021) ust1 gene Proteins 0.000 claims 1
- 239000011159 matrix material Substances 0.000 claims 1
- 239000000872 buffer Substances 0.000 abstract description 33
- 101001038535 Pelodiscus sinensis Lysozyme C Proteins 0.000 abstract description 11
- 102100031496 Heparan sulfate N-sulfotransferase 2 Human genes 0.000 description 15
- 101000588595 Homo sapiens Heparan sulfate N-sulfotransferase 2 Proteins 0.000 description 15
- 238000010586 diagram Methods 0.000 description 14
- 101100465937 Schizosaccharomyces pombe (strain 972 / ATCC 24843) pst3 gene Proteins 0.000 description 11
- 102100021786 CMP-N-acetylneuraminate-poly-alpha-2,8-sialyltransferase Human genes 0.000 description 7
- 101000616698 Homo sapiens CMP-N-acetylneuraminate-poly-alpha-2,8-sialyltransferase Proteins 0.000 description 7
- 101100494367 Mus musculus C1galt1 gene Proteins 0.000 description 7
- 101150035415 PLT1 gene Proteins 0.000 description 7
- 101150095879 PLT2 gene Proteins 0.000 description 6
- 101100406597 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) OST1 gene Proteins 0.000 description 5
- 101100190806 Arabidopsis thaliana PLT3 gene Proteins 0.000 description 3
- 230000009471 action Effects 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- 230000001360 synchronised effect Effects 0.000 description 2
- 102100029074 Exostosin-2 Human genes 0.000 description 1
- 102100032813 Hepatocyte growth factor-like protein Human genes 0.000 description 1
- 101000918275 Homo sapiens Exostosin-2 Proteins 0.000 description 1
- 101001066435 Homo sapiens Hepatocyte growth factor-like protein Proteins 0.000 description 1
- 101000880431 Homo sapiens Serine/threonine-protein kinase 4 Proteins 0.000 description 1
- 230000006399 behavior Effects 0.000 description 1
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- 230000009977 dual effect Effects 0.000 description 1
- RDYMFSUJUZBWLH-UHFFFAOYSA-N endosulfan Chemical compound C12COS(=O)OCC2C2(Cl)C(Cl)=C(Cl)C1(Cl)C2(Cl)Cl RDYMFSUJUZBWLH-UHFFFAOYSA-N 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4076—Timing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Logic Circuits (AREA)
- Amplifiers (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10006499A JPH11203866A (ja) | 1998-01-16 | 1998-01-16 | 半導体記憶装置 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW409461B true TW409461B (en) | 2000-10-21 |
Family
ID=11640149
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW087114166A TW409461B (en) | 1998-01-16 | 1998-08-27 | Semiconductor memory device |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US6031782A (enExample) |
| JP (1) | JPH11203866A (enExample) |
| KR (1) | KR100306859B1 (enExample) |
| CN (1) | CN1169156C (enExample) |
| TW (1) | TW409461B (enExample) |
Families Citing this family (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6347379B1 (en) * | 1998-09-25 | 2002-02-12 | Intel Corporation | Reducing power consumption of an electronic device |
| US6330635B1 (en) * | 1999-04-16 | 2001-12-11 | Intel Corporation | Multiple user interfaces for an integrated flash device |
| TW522399B (en) * | 1999-12-08 | 2003-03-01 | Hitachi Ltd | Semiconductor device |
| KR100443907B1 (ko) * | 2001-09-07 | 2004-08-09 | 삼성전자주식회사 | 어드레스 버퍼 및 이를 이용한 반도체 메모리 장치 |
| US6771553B2 (en) * | 2001-10-18 | 2004-08-03 | Micron Technology, Inc. | Low power auto-refresh circuit and method for dynamic random access memories |
| US6976181B2 (en) * | 2001-12-20 | 2005-12-13 | Intel Corporation | Method and apparatus for enabling a low power mode for a processor |
| JP3667700B2 (ja) | 2002-03-06 | 2005-07-06 | エルピーダメモリ株式会社 | 入力バッファ回路及び半導体記憶装置 |
| US6731548B2 (en) * | 2002-06-07 | 2004-05-04 | Micron Technology, Inc. | Reduced power registered memory module and method |
| KR100506929B1 (ko) * | 2002-08-08 | 2005-08-09 | 삼성전자주식회사 | 동기형 반도체 메모리 장치의 입력버퍼 |
| KR100502664B1 (ko) | 2003-04-29 | 2005-07-20 | 주식회사 하이닉스반도체 | 온 다이 터미네이션 모드 전환 회로 및 그방법 |
| JP4592281B2 (ja) * | 2003-12-18 | 2010-12-01 | ルネサスエレクトロニクス株式会社 | Ｌｓｉのインタフェース回路 |
| KR100571651B1 (ko) * | 2003-12-29 | 2006-04-17 | 주식회사 하이닉스반도체 | 파워다운 모드의 안정적인 탈출을 위한 제어회로 |
| US7545194B2 (en) * | 2006-06-30 | 2009-06-09 | Intel Corporation | Programmable delay for clock phase error correction |
| KR100914074B1 (ko) | 2007-10-09 | 2009-08-28 | 창원대학교 산학협력단 | 고속 신호 전송과 저전력 소비를 구현하는 수신기 |
| US7715264B2 (en) * | 2008-06-24 | 2010-05-11 | Qimonda North America Corp. | Method and apparatus for selectively disabling termination circuitry |
| US9887552B2 (en) * | 2013-03-14 | 2018-02-06 | Analog Devices, Inc. | Fine timing adjustment method |
| US10468087B2 (en) * | 2016-07-28 | 2019-11-05 | Micron Technology, Inc. | Apparatuses and methods for operations in a self-refresh state |
| US10079594B2 (en) * | 2016-10-03 | 2018-09-18 | Infineon Technologies Ag | Current reduction for activated load |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07130166A (ja) * | 1993-09-13 | 1995-05-19 | Mitsubishi Electric Corp | 半導体記憶装置および同期型半導体記憶装置 |
| JP3592386B2 (ja) * | 1994-11-22 | 2004-11-24 | 株式会社ルネサステクノロジ | 同期型半導体記憶装置 |
| JPH09167488A (ja) * | 1995-12-18 | 1997-06-24 | Mitsubishi Electric Corp | 半導体記憶装置 |
| JP3638167B2 (ja) * | 1996-01-08 | 2005-04-13 | 川崎マイクロエレクトロニクス株式会社 | 小振幅信号インタフェイス用双方向バッファ回路 |
| US5627791A (en) * | 1996-02-16 | 1997-05-06 | Micron Technology, Inc. | Multiple bank memory with auto refresh to specified bank |
| US5818777A (en) * | 1997-03-07 | 1998-10-06 | Micron Technology, Inc. | Circuit for implementing and method for initiating a self-refresh mode |
-
1998
- 1998-01-16 JP JP10006499A patent/JPH11203866A/ja active Pending
- 1998-07-29 US US09/124,514 patent/US6031782A/en not_active Expired - Fee Related
- 1998-08-27 TW TW087114166A patent/TW409461B/zh not_active IP Right Cessation
- 1998-09-15 KR KR1019980037986A patent/KR100306859B1/ko not_active Expired - Fee Related
- 1998-09-15 CN CNB98119270XA patent/CN1169156C/zh not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| KR100306859B1 (ko) | 2001-10-19 |
| JPH11203866A (ja) | 1999-07-30 |
| KR19990066760A (ko) | 1999-08-16 |
| CN1223442A (zh) | 1999-07-21 |
| CN1169156C (zh) | 2004-09-29 |
| US6031782A (en) | 2000-02-29 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GD4A | Issue of patent certificate for granted invention patent | ||
| MM4A | Annulment or lapse of patent due to non-payment of fees |