CN113782507B - 半导体装置 - Google Patents
半导体装置 Download PDFInfo
- Publication number
- CN113782507B CN113782507B CN202111060595.6A CN202111060595A CN113782507B CN 113782507 B CN113782507 B CN 113782507B CN 202111060595 A CN202111060595 A CN 202111060595A CN 113782507 B CN113782507 B CN 113782507B
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- Prior art keywords
- electrode
- boundary
- insulating film
- semiconductor device
- boundary surface
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 156
- 239000000758 substrate Substances 0.000 claims abstract description 80
- 239000002184 metal Substances 0.000 claims abstract description 60
- 229910052751 metal Inorganic materials 0.000 claims abstract description 60
- 238000013459 approach Methods 0.000 claims abstract description 14
- 230000015654 memory Effects 0.000 claims description 5
- 239000004020 conductor Substances 0.000 abstract description 41
- 125000006850 spacer group Chemical group 0.000 description 79
- 230000004888 barrier function Effects 0.000 description 27
- 238000000034 method Methods 0.000 description 16
- 238000005530 etching Methods 0.000 description 15
- 238000004519 manufacturing process Methods 0.000 description 15
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 9
- 239000007769 metal material Substances 0.000 description 8
- 239000007789 gas Substances 0.000 description 7
- 239000000463 material Substances 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 238000001020 plasma etching Methods 0.000 description 6
- 229910052814 silicon oxide Inorganic materials 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 241000724291 Tobacco streak virus Species 0.000 description 4
- 230000000149 penetrating effect Effects 0.000 description 4
- 238000000231 atomic layer deposition Methods 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 239000005001 laminate film Substances 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 230000001154 acute effect Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
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- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
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- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L29/0642—Isolation within the component, i.e. internal isolation
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Abstract
Description
Claims (18)
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CN202111060595.6A CN113782507B (zh) | 2017-03-17 | 2017-08-02 | 半导体装置 |
CN201710650835.5A CN108630647B (zh) | 2017-03-17 | 2017-08-02 | 半导体装置及其制造方法 |
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JP2022047357A (ja) | 2020-09-11 | 2022-03-24 | キオクシア株式会社 | 半導体装置およびその製造方法 |
US11355464B2 (en) * | 2020-11-10 | 2022-06-07 | Nanya Technology Corporation | Semiconductor device structure with bottle-shaped through silicon via and method for forming the same |
US20230352433A1 (en) * | 2022-04-27 | 2023-11-02 | Nanya Technology Corporation | Semiconductor device structure with composite bottle-shaped through silicon via and method for prepriang the same |
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---|---|---|---|---|
CN1722370A (zh) * | 2004-07-16 | 2006-01-18 | 三洋电机株式会社 | 半导体装置的制造方法 |
JP2014222785A (ja) * | 2014-08-19 | 2014-11-27 | セイコーエプソン株式会社 | 半導体装置及び電子デバイス |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4191806A (en) | 1978-08-28 | 1980-03-04 | Esb Incorporated | Pressure vent for a sealed primary cell |
JPS5873145A (ja) | 1981-10-27 | 1983-05-02 | Mitsubishi Electric Corp | 半導体パツケ−ジ |
US7843064B2 (en) * | 2007-12-21 | 2010-11-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and process for the formation of TSVs |
JP4799542B2 (ja) | 2007-12-27 | 2011-10-26 | 株式会社東芝 | 半導体パッケージ |
KR20100021856A (ko) * | 2008-08-18 | 2010-02-26 | 삼성전자주식회사 | 관통 전극을 갖는 반도체장치의 형성방법 및 관련된 장치 |
JP5300419B2 (ja) * | 2008-11-05 | 2013-09-25 | 株式会社東芝 | 不揮発性半導体記憶装置及びその製造方法 |
KR101190891B1 (ko) * | 2008-12-17 | 2012-10-12 | 파나소닉 주식회사 | 관통전극의 형성방법 및 반도체 장치 |
JP5532394B2 (ja) * | 2009-10-15 | 2014-06-25 | セイコーエプソン株式会社 | 半導体装置及び回路基板並びに電子機器 |
CN102282656B (zh) * | 2009-11-12 | 2014-10-08 | 松下电器产业株式会社 | 半导体装置及半导体装置的制造方法 |
US8232626B2 (en) * | 2010-06-14 | 2012-07-31 | Hong Kong Applied Science & Technology Research Institute Co. Ltd. | Via and method of via forming and method of via filling |
KR20120000748A (ko) * | 2010-06-28 | 2012-01-04 | 삼성전자주식회사 | 반도체 소자 및 그 제조 방법 |
JP2012099548A (ja) * | 2010-10-29 | 2012-05-24 | Fujikura Ltd | 貫通配線基板の製造方法及び貫通配線基板 |
CN103890940B (zh) * | 2011-10-28 | 2017-03-01 | 英特尔公司 | 包括结合使用双镶嵌型方案制造的微细间距背侧金属再分布线的穿硅过孔的3d互连结构 |
KR101620767B1 (ko) * | 2011-10-28 | 2016-05-12 | 인텔 코포레이션 | 스루-실리콘 비아들과 결합된 미세 피치 싱글 다마신 백사이드 금속 재배선 라인들을 포함하는 3d 상호연결 구조 |
JP2013115382A (ja) * | 2011-11-30 | 2013-06-10 | Elpida Memory Inc | 半導体装置及びその製造方法 |
US9583365B2 (en) * | 2012-05-25 | 2017-02-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming interconnects for three dimensional integrated circuit |
US9275933B2 (en) | 2012-06-19 | 2016-03-01 | United Microelectronics Corp. | Semiconductor device |
JP2014013810A (ja) * | 2012-07-04 | 2014-01-23 | Seiko Epson Corp | 基板、基板の製造方法、半導体装置、及び電子機器 |
US9177914B2 (en) * | 2012-11-15 | 2015-11-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Metal pad structure over TSV to reduce shorting of upper metal layer |
JP2014110284A (ja) | 2012-11-30 | 2014-06-12 | Ps4 Luxco S A R L | 半導体装置の製造方法 |
JP5873145B2 (ja) | 2014-07-08 | 2016-03-01 | 株式会社フジクラ | 貫通配線基板の製造方法 |
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---|---|---|---|---|
CN1722370A (zh) * | 2004-07-16 | 2006-01-18 | 三洋电机株式会社 | 半导体装置的制造方法 |
JP2014222785A (ja) * | 2014-08-19 | 2014-11-27 | セイコーエプソン株式会社 | 半導体装置及び電子デバイス |
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CN113782507A (zh) | 2021-12-10 |
JP2018157110A (ja) | 2018-10-04 |
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TW201836065A (zh) | 2018-10-01 |
CN108630647A (zh) | 2018-10-09 |
US20180269133A1 (en) | 2018-09-20 |
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CN108630647B (zh) | 2021-09-28 |
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