CN112310053B - 半导体装置 - Google Patents
半导体装置 Download PDFInfo
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- CN112310053B CN112310053B CN202010074732.0A CN202010074732A CN112310053B CN 112310053 B CN112310053 B CN 112310053B CN 202010074732 A CN202010074732 A CN 202010074732A CN 112310053 B CN112310053 B CN 112310053B
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- bonding
- semiconductor device
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 227
- 229910052751 metal Inorganic materials 0.000 claims abstract description 123
- 239000002184 metal Substances 0.000 claims abstract description 123
- 238000005304 joining Methods 0.000 claims description 51
- 238000002844 melting Methods 0.000 claims description 35
- 230000008018 melting Effects 0.000 claims description 35
- 229910000679 solder Inorganic materials 0.000 claims description 17
- 239000010949 copper Substances 0.000 claims description 10
- 229910052802 copper Inorganic materials 0.000 claims description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 5
- 150000001875 compounds Chemical class 0.000 claims description 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims 1
- 229920005989 resin Polymers 0.000 description 24
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- 238000000034 method Methods 0.000 description 19
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- 238000005245 sintering Methods 0.000 description 9
- 239000000758 substrate Substances 0.000 description 9
- 239000000463 material Substances 0.000 description 8
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 6
- 229910010271 silicon carbide Inorganic materials 0.000 description 6
- 239000003566 sealing material Substances 0.000 description 5
- 238000012360 testing method Methods 0.000 description 5
- 230000002950 deficient Effects 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 3
- 239000000956 alloy Substances 0.000 description 3
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 125000006850 spacer group Chemical group 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
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- 229910052787 antimony Inorganic materials 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 239000003960 organic solvent Substances 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
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- 229910052710 silicon Inorganic materials 0.000 description 2
- 238000003756 stirring Methods 0.000 description 2
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- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 239000002033 PVDF binder Substances 0.000 description 1
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- 239000004734 Polyphenylene sulfide Substances 0.000 description 1
- 229920000491 Polyphenylsulfone Polymers 0.000 description 1
- 229910006913 SnSb Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
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- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 229910021478 group 5 element Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
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- 229910052757 nitrogen Inorganic materials 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
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- 229920003023 plastic Polymers 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
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Classifications
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- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
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- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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Abstract
实施方式提供成品率提高的半导体装置。半导体装置具备第1基体部件,具有第1侧面;第1绝缘板,设置于第1基体部件的上方;第1金属板,设置于第1绝缘板的上方;第1半导体芯片,设置于第1金属板的上方;第1接合部件,将第1金属板与第1半导体芯片接合;第2接合部件,将第1基体部件与第1绝缘板接合;第2基体部件,具有第2侧面;第2绝缘板,设置于第2基体部件的上方;第2金属板,设置于第2绝缘板的上方;第2半导体芯片,设置于第2金属板的上方;第3接合部件,将第2金属板与第2半导体芯片接合;第4接合部件,将第2基体部件与第2绝缘板接合;以及基体接合部,设置于第1侧面与第2侧面之间,第1侧面与第2侧面接合。
Description
关联申请
本申请享受以日本专利申请2019-143385号(申请日:2019年8月2日)为基础申请的优先权。本申请通过参考该基础申请而包括基础申请的全部内容。
技术领域
本发明的实施方式涉及半导体装置。
背景技术
正在进行面向发电及/或送电、泵、吹风机等回转机械、通信系统及工厂等的电源装置、基于交流电机的铁道、电动车、家庭用电器产品等的较宽领域的、MOSFET(Metal-Oxide-Semiconductor Field-Effect-Transistor,金属氧化物半导体场效应晶体管)、IGBT(Insulated Gate Bipolar Transistor,绝缘栅双极型晶体管)等的、设计为电力控制用的功率半导体芯片的开发。
另外,正在进行使用了该功率半导体芯片的、作为功率模块的半导体装置的开发。这样的半导体装置要求高电流密度化、低损耗化、高散热化等的技术条件。
发明内容
本发明的实施方式提供成品率提高的半导体装置。
实施方式的半导体装置具备:第1基体部件,具有第1侧面;第1绝缘板,设置于第1基体部件的上方;第1金属板,设置于第1绝缘板的上方;第1半导体芯片,设置于第1金属板的上方;第1接合部件,将第1金属板与第1半导体芯片接合;第2接合部件,将第1基体部件与第1绝缘板接合;第2基体部件,具有第2侧面;第2绝缘板,设置于第2基体部件的上方;第2金属板,设置于第2绝缘板的上方;第2半导体芯片,设置于第2金属板的上方;第3接合部件,将第2金属板与第2半导体芯片接合;第4接合部件,将第2基体部件与第2绝缘板接合;以及基体接合部,设置于第1侧面与第2侧面之间,第1侧面与第2侧面被接合。
附图说明
图1是第1实施方式的半导体装置的示意剖视图。
图2是表示第1实施方式的半导体装置的制造方法的流程图。
图3是成为第1实施方式的比较方式的半导体装置的示意剖视图。
图4是表示第2实施方式的半导体装置的制造方法的流程图。
图5是表示第3实施方式的半导体装置的制造方法的流程图。
图6是第4实施方式的半导体装置的示意剖视图。
图7是表示第4实施方式的半导体装置的制造方法的流程图。
图8是表示第5实施方式的半导体装置的制造方法的流程图。
图9是第6实施方式的半导体装置的示意剖视图。
图10是表示第6实施方式的半导体装置的制造方法的流程图。
图11是第7实施方式的半导体装置的示意剖视图。
图12是第8实施方式的半导体装置的示意剖视图。
图13是表示第8实施方式的半导体装置的制造方法的流程图。
具体实施方式
以下,参照附图对本发明的实施方式进行说明。另外,在以下的说明中,存在对相同或类似的部件标注同一符号的情况。另外,对于说明过一次的部件等,存在适当省略说明的情况。
本说明书中,为了表示部件等的位置关系,将附图的上方向记述为“上”,将附图的下方向记述为“下”。在本说明书中,“上”、“下”的概念未必是表示与重力的朝向的关系的术语。
(第1实施方式)
本实施方式的半导体装置具备:第1基体部件,具有第1侧面;第1绝缘板,设置于第1基体部件的上方;第1金属板,设置于第1绝缘板的上方;第1半导体芯片,设置于第1金属板的上方;第1接合部件,将第1金属板与第1半导体芯片接合;第2接合部件,将第1基体部件与第1绝缘板接合;第2基体部件,具有第2侧面;第2绝缘板,设置于第2基体部件的上方;第2金属板,设置于第2绝缘板的上方;第2半导体芯片,设置于第2金属板的上方;第3接合部件,将第2金属板与第2半导体芯片接合;第4接合部件,将第2基体部件与第2绝缘板接合;以及基体接合部,设置于第1侧面与第2侧面之间,第1侧面与第2侧面被接合。
图1是本实施方式的半导体装置100的示意剖视图。
半导体装置100具备:第1基体部件2、第2基体部件4、第3基体部件6、第4基体部件8、基体接合部10a、基体接合部10b、基体接合部10c、第1绝缘板12、第2绝缘板14、第1金属板16、第2金属板18、第4金属板20、第5金属板22、第1半导体芯片24、第2半导体芯片26、第3半导体芯片28、第1接合部件30、第2接合部件32、第3接合部件34、第4接合部件36、接合线38a、接合线38b、接合线38c、第6金属板42、第7金属板44、散热板80、热界面材料82、壳体84、封固材料86、端子90a、端子90b、螺钉92、垫片94。
第1基体部件2具有侧面2a(第1侧面的一例)及侧面2b。第2基体部件4具有侧面4a(第2侧面的一例)及侧面4b。第3基体部件6具有侧面6a。第4基体部件8具有侧面8a。
散热板80在下部具有翅片81。散热板80用于将从后述的半导体芯片等产生的热散热。
第1基体部件2、第2基体部件4、第3基体部件6及第4基体部件8设置于散热板80的上方。第1基体部件2、第2基体部件4、第3基体部件6及第4基体部件8分别用例如Cu(铜)或Al(铝)等的金属形成。另外,第1基体部件2、第2基体部件4、第3基体部件6及第4基体部件8也可以分别用Cu系的合金、Al系的合金或其他的合金形成。另外,第1基体部件2、第2基体部件4、第3基体部件6及第4基体部件8也可以分别是对例如Cu板材的表面进行了基于Ni(镍)等的电镀而得到的部件。
基体接合部10a设置于第1基体部件2的侧面2a与第2基体部件4的侧面4a之间。基体接合部10a是将侧面2a与侧面4a接合的部件。基体接合部10b设置于第2基体部件4的侧面4b与第4基体部件8的侧面8a之间。基体接合部10b是将侧面4b与侧面8a接合的部件。基体接合部10c设置于第1基体部件2的侧面2b与第3基体部件6的侧面6a之间。基体接合部10c是将侧面2b与侧面6a接合的部件。
这里,基体接合部10a通过侧面2a与侧面4a的摩擦滑动接合而形成。基体接合部10b通过侧面4b与侧面8a的摩擦滑动接合而形成。基体接合部10c通过侧面2b与侧面6a的摩擦滑动接合而形成。所谓的摩擦滑动(搅拌)接合(FSW:Friction Stir Welding),是一边使在前端具有突起物的部件(工具)旋转,一边向接合对象物推压该突起物,并通过摩擦热使接合对象物软化、搅拌,由此使之接合的接合方法。接合对象物是例如金属。通过摩擦滑动接合,能够不使作为接合对象物的金属熔融,而通过塑性流动以固相而接合。
基体接合部10a、基体接合部10b及基体接合部10c被摩擦滑动接合这一点,能够通过使用例如立体显微镜等显微镜观察接合部而判断。
第4金属板20在第1基体部件2的上方设置。第1绝缘板12在第4金属板20的上方设置。第1金属板16及第6金属板42在第1绝缘板12的上方设置。
第5金属板22在第2基体部件4的上方设置。第2绝缘板14在第5金属板22的上方设置。第2金属板18及第7金属板44在第2绝缘板14的上方设置。
第1绝缘板12及第2绝缘板14是用例如AlN(氮化铝)、SiN(氮化硅)、Al2O3(矾土,氧化铝)等形成的板材。第1金属板16、第2金属板18、第4金属板20、第5金属板22、第6金属板42及第7金属板44是用例如Cu(铜)形成的金属板,作为电路配线而使用。并且,例如,第1金属板16、第4金属板20及第6金属板42使用焊料等而接合于第1绝缘板12的表面。例如,第1金属板16及第6金属板42与第1绝缘板12的一方的表面接合。第4金属板20与第1绝缘板12的另一方的表面接合。例如,第2金属板18、第5金属板22及第7金属板44与第2绝缘板14的表面接合。例如,第2金属板18及第7金属板44与第2绝缘板14的一方的表面接合。第5金属板22与第2绝缘板14的另一方的表面接合。
在本实施方式的半导体装置100中,在各个基体部件的上方,最大也仅设置有1枚绝缘板。换言之,在各个基体部件的上方,未设置多个绝缘板。例如,在第1基体部件2的上方设置有第1绝缘板12,而未设置其他的绝缘板。另外,在第2基体部件4的上方设置有第2绝缘板14,而未设置其他的绝缘板。
第1半导体芯片24在第1金属板16的上方设置。接合线38a在第1半导体芯片24及第6金属板42的上方设置。并且,接合线38a例如将在第1半导体芯片24的上表面设置的未图示的Al电极与第6金属板42电连接。接合线38a用例如Al(铝)形成,包含Al。
第2半导体芯片26在第2金属板18的上方设置。接合线38b在第2半导体芯片26及第7金属板44的上方设置。并且,接合线38a例如将在第2半导体芯片26的上表面设置的未图示的Al电极与第7金属板44电连接。接合线38b用例如Al形成,包含Al。
第3半导体芯片28在第2金属板18的上方设置。接合线38c在第3半导体芯片28及第7金属板44的上方设置。并且,接合线38c例如将在第3半导体芯片28的上表面设置的未图示的Al电极与第7金属板44电连接。接合线38c用例如Al形成,包含Al。
第1半导体芯片24、第2半导体芯片26及第3半导体芯片28优选具有包含SiC(碳化硅)或氮化物半导体等的化合物半导体的半导体元件。这里作为氮化物半导体,是III-V族半导体中作为V族元素而使用了氮的半导体。作为III族元素,优选使用Al、Ga(镓)或In(铟)。
作为使用SiC的半导体元件,举出例如SiC-IGBT、SiC-MOSFET或SiC-SBD(Schottky Barrier Diode)等。作为使用了氮化物半导体的半导体元件,举出例如GaN-MOSFET等。但是,作为半导体元件,也可以是使用了Si(硅)的Si-IGBT、Si-MOSFET或Si-FRD(Fast Recovery Diode)等。
半导体装置100具有的半导体芯片的个数,如上述那样是第1半导体芯片24、第2半导体芯片26及第3半导体芯片28这3个。但是,半导体芯片的个数并不限定于此。例如,半导体装置100具有的半导体芯片的个数可以是50个以上。
第1接合部件30设置于第1金属板16与第1半导体芯片24之间,将第1金属板16与第1半导体芯片24接合。第2接合部件32设置于第1基体部件2与第4金属板20之间,将第1基体部件2与第4金属板20接合。由此,第2接合部件32将第1基体部件2与第4金属板20接合。第3接合部件34设置于第2金属板18与第2半导体芯片26之间,将第2金属板18与第2半导体芯片26接合。第6接合部件35设置于第2金属板18与第3半导体芯片28之间,将第2金属板18与第3半导体芯片28接合。第4接合部件36设置于第2基体部件4与第5金属板22之间,将第2基体部件4与第5金属板22接合。由此,第4接合部件36将第2基体部件4与第2绝缘板14接合。
这里,第1接合部件30、第2接合部件32、第3接合部件34、第4接合部件36及第6接合部件35是焊料。并且,第1接合部件30的熔点(第1熔点的一例)比第2接合部件32的熔点(第2熔点的一例)高。另外,第3接合部件34的熔点(第3熔点的一例)及第6接合部件的熔点,比第4接合部件36的熔点(第4熔点的一例)高。
例如,作为第1接合部件30、第3接合部件34及第6接合部件35,能够使用使用了Pb(铅)、Ag(银)或Sn(锡)的、组分是Pb95Sn5或Pb95Ag1.5Sn3.5等且熔点是330℃左右的焊料。另外,例如,作为第2接合部件32及第4接合部件36,能够使用使用了Sn及Sb(锑)的、组分是SnSb系且熔点是240℃左右的焊料。另外,焊料的种类并不限定于此,即使是使用了Au(金)和Sn的、熔点是280℃左右的AuSn系的焊料、使用了Au和Si的、熔点是360℃左右的AuSi系的焊料或使用了AuとGe(锗)的、熔点是360℃左右的AuGe系的焊料等,也能够通过适当选择具有恰当的熔点的焊料而使用。为了获得良好的接合,第1接合部件30、第3接合部件34及第6接合部件35的熔点优选比第2接合部件32及第4接合部件36的熔点高出例如50℃以上。
壳体84用例如树脂形成,在例如第3基体部件6及第4基体部件8的上方以包围第1半导体芯片24、第2半导体芯片26及第3半导体芯片28的方式设置。壳体84使用螺钉92及垫片94而被固定于第3基体部件6及第4基体部件8的上方。在壳体84内封入公知的封固材料(凝胶)86后被封固。在封固材料86的上方配置有盖88。
端子90a及端子90b的一端分别通过例如超声波接合法而接合于第1金属板16及第7金属板44。端子90a例如经由第1金属板16而与第1半导体芯片24电连接。端子90b例如经由第7金属板44、接合线38b及接合线38c,而与第2半导体芯片26及第3半导体芯片电连接。
通过第1半导体芯片24、第2半导体芯片26及第3半导体芯片28变换后的电力,使用端子90a及端子90b与在壳体84外设置的负载等连接而使用。这样,端子90a及端子90b能够作为电力端子而发挥功能。
另外,端子90a及端子90b与作为例如MOSFET、IGBT的半导体芯片的栅极电极连接。在该情况下,端子90a及端子90b的另一端与未图示的栅极驱动电路连接。并且,通过由栅极驱动电路生成的信号,控制半导体芯片。这样,端子90a及端子90b也能够作为信号端子发挥功能。
热界面材料(TMI:Thermal Interface Material)82设置于第1基体部件2、第2基体部件4、第3基体部件6及第4基体部件8与散热板80之间。热界面材料82是例如润滑脂状的材料。热界面材料82被涂布于散热板80的上方。并且,在其上方,以与热界面材料82接触的状态配置有第1基体部件2、第2基体部件4、第3基体部件6及第4基体部件8。热界面材料82通过将第1基体部件2、第2基体部件4、第3基体部件6及第4基体部件8与散热板80之间的小的间隙或凸凹填埋,而将在第1半导体芯片24、第2半导体芯片26及第3半导体芯片28产生的热高效地传递至散热板80。
图2是表示本实施方式的半导体装置100的制造方法的流程图。
首先,作为“基板回流焊(芯片搭载)”,准备接合了第1金属板16、第4金属板20及第6金属板42的第1绝缘板12。接下来,使用第1接合部件30而将第1金属板16和第1半导体芯片24接合。另外,准备接合了第2金属板18、第5金属板22及第7金属板44的第2绝缘板14。接下来,分别使用第3接合部件34及第6接合部件35,将第2金属板18与第2半导体芯片26及第3半导体芯片28接合。这些接合在例如公知的回流焊炉内进行(S10)。
接下来,作为“引线接合(芯片)”,使用接合线38a,将第1半导体芯片24与第6金属板42电连接。另外,使用接合线38b,将第2半导体芯片26与第7金属板44电连接。另外,使用接合线38c,将第3半导体芯片28与第7金属板44电连接(S20)。
接下来,作为“基体回流焊”,使用第2接合部件32,将第1基体部件2的上表面与第4金属板20接合。另外,使用第4接合部件36,将第2基体部件4的上表面与第5金属板22接合。此时,选择如第1接合部件30的熔点比第2接合部件32的熔点高那样的第2接合部件32。由此,使得在使用了第2接合部件32的接合时第1接合部件30不熔融。另外,选择第3接合部件34及第6接合部件35的熔点比第4接合部件36的熔点高那样的第4接合部件36。由此,使得在使用了第4接合部件36的接合时,第3接合部件34及第6接合部件35不会熔化(S30)。另外,在该阶段,设为各个基体部件(第1基体部件2、第2基体部件4、第3基体部件6及第4基体部件8)不被接合。
接下来,作为“电气测试”,使用例如市场上销售的半导体测试器,对第1半导体芯片24、第2半导体芯片26及第3半导体芯片28的电气特性进行测试(S40)。
接下来,作为“基体部件间摩擦滑动接合”,在通过上述的测试判定为第1半导体芯片24、第2半导体芯片26及第3半导体芯片28的电气特性良好的情况下,通过摩擦滑动接合使第1基体部件2的侧面2a与第2基体部件4的侧面4a接合而形成基体接合部10a。另外,通过摩擦滑动接合使第1基体部件2的侧面2b与第3基体部件6的侧面6a接合而形成基体接合部10c。另外,通过摩擦滑动接合使第2基体部件4的侧面4b与第4基体部件8的侧面8a接合而形成基体接合部10b(S50)。
接下来,作为“引线接合(基板)”,适当使用未图示的接合线,将第1绝缘板12上的第1半导体芯片24、第1金属板16及第6金属板42、与第2绝缘板14上的第2半导体芯片26、第3半导体芯片28、第2金属板18及第7金属板44中的至少一个电连接(S60)。
接下来,作为“壳体安装”,在第3基体部件6及第4基体部件8的上方,以包围第1半导体芯片24、第2半导体芯片26及第3半导体芯片28的方式配置壳体84。然后,使用例如螺钉92及垫片94,将壳体84固定于第3基体部件6及第4基体部件8的上方(S70)。
接下来,作为“信号/电力端子接合”,使用例如超声波接合法,将端子90a接合于第1金属板16。另外,使用例如超声波接合法,将端子90b接合于第7金属板44(S80)。
接下来,作为“凝胶封固/盖安装”,通过封固材料(凝胶)86将壳体84内封固。然后,在封固材料86的上方配置盖88(S90)。由此,获得作为功率模块的半导体装置100。
接下来,作为“电气测试”,使用例如市场上销售的半导体测试器,对于半导体装置100的电气特性,进行测试(S100)。
以下,记载本实施方式的半导体装置的作用效果。
图3是成为本实施方式的比较方式的半导体装置800的示意剖视图。在半导体装置800中,在被形成为一体的1枚基体部件9的上方,设置有第1半导体芯片24、第2半导体芯片26及第3半导体芯片28。并且,使用测试器,集中地确认第1半导体芯片24、第2半导体芯片26及第3半导体芯片28的电气特性。
如上述那样,在一个半导体装置100的内部,有时设置50个以上的半导体芯片。这是为了使半导体装置100的额定电流尽可能大。但是,若半导体芯片的个数增加,则混入不良的半导体芯片的可能性也变大。在半导体装置100内即使是混入了1个的不良的半导体芯片,半导体装置100本身也成为不良的半导体装置。尤其是,包含SiC、氮化物半导体的半导体芯片,与Si系半导体芯片相比较。成品率低。因此,如何获得成品率提高的半导体装置成为课题。
在本实施方式的半导体装置100中,在各个分离的基体部件的上方,分别设置半导体芯片。并且,在判定为各个半导体芯片的电气特性良好的情况下,将各个基体部件的侧面接合而制造半导体装置。由此,能够事先确认各个半导体芯片的电气特性,因此能够将不良半导体芯片去除后制造半导体装置。因此,能够提供成品率提高的半导体装置。
摩擦滑动接合是适于本实施方式的基体部件的接合的方法。
另外,在如成为比较方式的半导体装置800那样、在1枚基体部件9的上方设置有多个绝缘板(第1绝缘板12及第2绝缘板14)的情况下,存在如下问题:为了将例如第2绝缘板14接合而熔融的第4接合部件36的一部分,作为接合部件36a而附着于在相邻的第1绝缘板12的上方设置的第6金属板42的上方,而引起非意图的导通不良。
在本实施方式的半导体装置100中,在各个基体部件的上方,最大也仅设置有1枚绝缘板。换言之,在各个基体部件的上方,未设置多个绝缘板。在该情况下,单独进行绝缘板与基体部件的接合。因此,能够抑制接合部件附着于相邻的绝缘板的上方而引起非意图的导通不良的问题的产生。因此,能够提供成品率提高的半导体装置。
根据本实施方式的半导体装置,能够提供成品率提高的半导体装置。
(第2实施方式)
在本实施方式的半导体装置中,与第1实施方式的不同点在于,第1接合部件30、第2接合部件32、第3接合部件34及第4接合部件36是焊料,第1接合部件30的第1熔点与第2接合部件32的第2熔点相等,第3接合部件34的第3熔点与第4接合部件36的第4熔点相等。这里,对于与第1实施方式重复的内容,省略记载。
图4是表示本实施方式的半导体装置的制造方法的流程图。在图4中,不同点在于,图2的“基板回流焊(芯片搭载)”(S10)和“基体回流焊”(S30)在“基板/基体回流焊”(S12)中一并进行。
作为本实施方式的第1接合部件30、第2接合部件32、第3接合部件34、第4接合部件36及第6接合部件35,如果是例如具有在同一回流焊炉内能够一并进行回流焊的程度上相等的熔点的焊料,则能够使用在第1实施方式中记载的全部焊料。另外,如果熔点相等,则焊料的组分可以不同。例如,可以将半导体装置中使用的部件及/或半导体装置要求的耐热性作为基准,而选定第1接合部件30、第2接合部件32、第3接合部件34、第4接合部件36及第6接合部件35中使用的焊料。
根据本实施方式的半导体装置,能够提供成品率提高的半导体装置。
(第3实施方式)
在本实施方式的半导体装置中,与第1及第2实施方式的不同点在于,第1接合部件30及第3接合部件34包含具有导电性的烧结部件。这里,对于与第1及第2实施方式重复的内容,省略记载。
图5是表示本实施方式的半导体装置的制造方法的流程图。在图5中,不同点在于,图2中为“基板回流焊(芯片搭载)”(S10),但在图5中为“黏晶(加压烧结)”(S14)。
在本实施方式中,作为“黏晶(加压烧结)”(S14),第1接合部件30、第3接合部件34及第6接合部件35使用具有导电性的烧结部件,进行第1半导体芯片24与第1金属板16的接合、第2半导体芯片26与第2金属板18的接合及第3半导体芯片28与第2金属板18的接合。作为具有导电性的烧结部件,优选使用例如使用了Ag或Cu等粒子的烧结部件。在烧结前,在例如Ag或Cu等的微细粒子(纳米粒子或者微粒子)的表面设置保护膜,并分散于有机溶剂中。并且,通过烧结,保护膜和有机溶剂蒸发,而形成烧结部件。
另外,烧结部件还可以包含树脂。这是由于通过包含树脂能够确保耐热性。这里,作为树脂,不特别限定,但优选使用例如环氧树脂。
另外,在为不包含树脂的烧结部件的情况下,可以使用例如冲压机等对接合的部分施加压力同时使之烧结。在为包含环氧树脂的烧结部件的情况下,可以不施加上述的压力而使之烧结。另外,烧结的工艺并不限定于上述的记载。
根据本实施方式的半导体装置,能够提供成品率提高的半导体装置。
(第4实施方式)
在本实施方式的半导体装置中,与第1至第3实施方式的不同点在于,未设置第4金属板20、第5金属板22、第2接合部件32及第4接合部件36。这里,对于与第1至第3实施方式重复的内容,省略记载。
图6是本实施方式的半导体装置110的示意剖视图。第1绝缘板12与第1基体部件2直接接合。第2绝缘板14与第2基体部件4直接接合。在本实施方式中,使用绝缘板与基体被一体化的装置。在使散热板80与第1半导体芯片24、第2半导体芯片26及第3半导体芯片28之间的热电阻减小上是有用的。
图7是表示本实施方式的半导体装置110的制造方法的流程图。在图7中,不同点在于,图2的“基板回流焊(芯片搭载)”(S10)和“基体回流焊”(S30)在“基板/基体回流焊”(S12)中一并进行。作为第1接合部件30、第3接合部件34及第6接合部件35,既可以使用第1实施方式及第2实施方式中记载的焊料,也可以使用第3实施方式中记载的烧结部件。
通过本实施方式的半导体装置110,能够提供成品率提高的半导体装置。
(第5实施方式)
在本实施方式的半导体装置中,与第1至第4实施方式的不同点在于,第1接合部件30、第2接合部件32、第3接合部件34及第4接合部件36使用第2实施方式中记载的烧结部件。这里,对于与第1至第4实施方式重复的内容,省略记载。
图8是表示本实施方式的半导体装置的制造方法的流程图。与图2相比较,不同点在于,“基板回流焊(芯片搭载)”(S10)成为“黏晶(加压烧结)”(S14),“基体回流焊”(S30)成为“基体接合(加压烧结)”(S32)。
如上述那样,在为不包含环氧树脂的烧结部件的情况下,可以使用例如冲压机等对接合的部分施加压力同时使之烧结。在该情况下,为了获得稳定的接合,优选第1基体部件2及第2基体部件4的、与第2接合部件32及第3接合部件34接触的表面用Cu或Ni/Au、Ag、Pd(铂)覆盖。
根据本实施方式的半导体装置,能够提供成品率提高的半导体装置。
(第6实施方式)
在本实施方式的半导体装置中,与第1至第5实施方式的不同点在于,还包括:第5接合部件50,设置于第1半导体芯片24的上方,包含具有导电性的烧结部件;第3金属板60,设置于第5接合部件50的上方,通过第5接合部件50而与第1半导体芯片24接合;以及接合线(引线)40a,设置于第3金属板60的上方,与第3金属板60连接,包含铜。这里,对于与第1至第5实施方式重复的点,省略记载。
图9是本实施方式的半导体装置120的示意剖视图。
在第1半导体芯片24的上方设置有包含具有导电性的烧结部件的第5接合部件50,在第2半导体芯片26的上方设置有包含具有导电性的烧结部件的接合部件52,进而在第3半导体芯片28的上方设置有包含具有导电性的烧结部件的接合部件54。
在第5接合部件50的上方设置有第3金属板60。通过第5接合部件50,第1半导体芯片24与第3金属板60接合。在接合部件52的上方设置有第8金属板62。通过接合部件52,第2半导体芯片26与第8金属板62接合。在接合部件54的上方设置有第9金属板64。通过接合部件54,第3半导体芯片28与第9金属板64接合。作为第1接合部件30、第2接合部件32、第3接合部件34、第4接合部件36、第5接合部件50、第6接合部件35、接合部件52及接合部件54,能够优选使用在第2实施方式中记载的不包含树脂的烧结部件。另外,可以使用包含树脂的烧结部件。由此,能够获得耐热温度高的半导体装置。
作为接合线40a、接合线40b及接合线40c,优选使用包含铜的引线。这是为了提高耐热温度。
图10是表示本实施方式的半导体装置120的制造方法的流程图。与图2相比较,不同点在于,“基板回流焊(芯片搭载)”(S10)成为“加压烧结”(S18),没有“基体回流焊”(S30)。在“加压烧结”(S18)中,一并烧结并形成第1接合部件30、第2接合部件32、第3接合部件34、第4接合部件36、第5接合部件50、第6接合部件35、接合部件52及接合部件54。
通过本实施方式的半导体装置120,能够提供成品率提高的半导体装置。
(第7实施方式)
在本实施方式的半导体装置中,与第1至第6实施方式的不同点在于,在基体部件的内部设置有骨部件70。这里,对于与第1实施方式至第6实施方式重复的点,省略记载。
图11是本实施方式的半导体装置130的示意剖视图。骨部件70例如是SiC等,用于使基体部件的强度增加。本实施方式的基体部件通过例如用熔融的Al对SiC的表面进行成型而形成。另外骨部件70当然不限定于SiC。
根据本实施方式的半导体装置130,能够提供成品率提高的半导体装置。
(第8实施方式)
在本实施方式的半导体装置中,与第1至第7实施方式的不同点在于,基体接合部包含设置于第1侧面与第2侧面之间的树脂,第1侧面与第2侧面通过树脂而接合。这里,对于与第1至第7实施方式重复的点,省略记载。
图12是本实施方式的半导体装置140的示意剖视图。树脂11a、树脂11b及树脂11c被使用于各基体部件的接合。即使使用树脂,也能够良好地进行各基体部件的接合。
作为本实施方式的树脂11,能够优选使用例如耐热性高的聚苯砜树脂、聚砜树脂、聚芳酯树脂、聚醚酰亚胺树脂、聚醚醚酮树脂、聚苯硫醚树脂、聚醚砜树脂树脂、聚酰胺酰亚胺树脂、聚四氟乙烯树脂、聚三氟氯乙烯树脂、聚偏氟乙烯树脂等。
图13是表示本实施方式的半导体装置的制造方法的流程图。与图2相比较,不同点在于,“基体部件间摩擦滑动接合”(S50)成为“基体部件间树脂接合”(S52)。
根据本实施方式的半导体装置140,能够提供成品率提高的半导体装置。
对本发明的几个实施方式及实施例进行了说明,但这些实施方式及实施例是作为例子提示的,意图不是限定发明的范围。这些新的实施方式能够以其他的各种各样的方式实施,在不脱离发明的主旨的范围内,能够进行各种省略、替换、变更。这些实施方式及其变形包含于发明的范围及主旨中,并且包含于权利要求记载的发明及其等同物的范围。
Claims (12)
1.一种半导体装置,具备:
第1基体部件,具有第1侧面;
第1绝缘板,设置于上述第1基体部件的上方;
第1金属板,设置于上述第1绝缘板的上方;
第1半导体芯片,设置于上述第1金属板的上方;
第1接合部件,将上述第1金属板与上述第1半导体芯片接合;
第2接合部件,将上述第1基体部件与上述第1绝缘板接合;
第2基体部件,具有第2侧面;
第2绝缘板,设置于上述第2基体部件的上方;
第2金属板,设置于上述第2绝缘板的上方;
第2半导体芯片,设置于上述第2金属板的上方;
第3接合部件,将上述第2金属板与上述第2半导体芯片接合;
第4接合部件,将上述第2基体部件与上述第2绝缘板接合;以及
金属制的基体接合部,设置于上述第1侧面与上述第2侧面之间,将上述第1侧面与上述第2侧面直接接合。
2.根据权利要求1所述的半导体装置,其中,
上述基体接合部通过上述第1侧面与上述第2侧面之间的摩擦滑动接合而形成。
3.根据权利要求1所述的半导体装置,其中,
在上述第1基体部件及上述第2基体部件各自之上,未设置多个绝缘板。
4.根据权利要求2所述的半导体装置,其中,
在上述第1基体部件及上述第2基体部件各自之上,未设置多个绝缘板。
5.根据权利要求1至4中任一项所述的半导体装置,其中,
上述第1接合部件、上述第2接合部件、上述第3接合部件及上述第4接合部件是焊料,
上述第1接合部件的第1熔点比上述第2接合部件的第2熔点高,
上述第3接合部件的第3熔点比上述第4接合部件的第4熔点高。
6.根据权利要求1至4中任一项所述的半导体装置,其中,
上述第1接合部件、上述第2接合部件、上述第3接合部件及上述第4接合部件是焊料,
上述第1接合部件的第1熔点与上述第2接合部件的第2熔点相等,
上述第3接合部件的第3熔点与上述第4接合部件的第4熔点相等。
7.根据权利要求1至4中任一项所述的半导体装置,其中,
上述第1接合部件或上述第3接合部件包含具有导电性的烧结部件。
8.根据权利要求7所述的半导体装置,其中,
上述第2接合部件或上述第4接合部件包含具有导电性的烧结部件。
9.根据权利要求1至4中任一项所述的半导体装置,其中,还包括:
第5接合部件,设置于上述第1半导体芯片的上方,包含具有导电性的烧结部件;
第3金属板,设置于上述第5接合部件的上方,通过上述第5接合部件而与上述第1半导体芯片接合;以及
引线,设置于上述第3金属板的上方,与上述第3金属板连接,包含铜。
10.根据权利要求1至4中任一项所述的半导体装置,其中,
上述第1半导体芯片及上述第2半导体芯片包含化合物半导体。
11.根据权利要求1至4中任一项所述的半导体装置,其中,
上述基体接合部的上表面设置于比上述第1基体部件的上表面及上述第2基体部件的上表面靠下的位置。
12.根据权利要求1至4中任一项所述的半导体装置,其中,
上述基体接合部的厚度比上述第1基体部件的厚度及上述第2基体部件的厚度薄。
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