CN111108662B

CN111108662B - Protection and control of wireless power systems

Info

Publication number: CN111108662B
Application number: CN201880056005.2A
Authority: CN
Inventors: M·达尼洛维奇; B·A·埃斯特班; K·杨
Original assignee: WiTricity Corp
Current assignee: WiTricity Corp
Priority date: 2017-06-29
Filing date: 2018-06-29
Publication date: 2023-12-12
Anticipated expiration: 2038-06-29
Also published as: US11637452B2; US11588351B2; US11031818B2; US20190006836A1; WO2019006376A1; US20210296934A1; EP3646434A1; US20190006885A1; US11043848B2; US20210296933A1; WO2019006376A9; CN111108662A

Abstract

Methods, systems, and apparatus for protecting a wireless power transfer system. An aspect features a sensor network for a wireless power transfer system. The sensor network includes a differential voltage sensing circuit and a current sensing circuit. A differential voltage sensing circuit is disposed within the wireless power transfer system to measure a rate of change of a voltage difference between portions of the impedance matching network and to generate a first signal representative of the rate of change of the voltage difference. The current sensing circuit is connected to the differential voltage sensing circuit and is configured to calculate a current through a resonator coil connected to the wireless power transfer system based on the first signal.

Description

Protection and control of wireless power systems

Cross Reference to Related Applications

The present application claims priority from U.S. provisional patent application 62/526,842 filed on 29 th year 6, U.S. provisional patent application 62/608,052 filed on 20 th year 12, U.S. provisional patent application 62/662,148 filed on 24 th year 4, U.S. provisional patent application 62/662,462 filed on 25 th year 4, and U.S. provisional patent application 62/662,486 filed on 25 th year 4, both of which are incorporated herein by reference in their entirety.

Technical Field

The present invention relates generally to wireless power systems, and more particularly, to protection and sensors for wireless power systems.

Background

Wireless power systems employ tunable impedance matching circuits to efficiently transfer power to coupled loads. The behavior of the load may be beyond the control of the wireless power system and thus may cause undesirable conditions in the components of the wireless power system, leading to dangerous operation and possible damage.

Disclosure of Invention

In general, the invention features a control and protection system for unidirectional and bidirectional wireless power transfer systems. The devices and processes described herein may be used in a variety of contexts including implantable devices, cellular telephones and other mobile computing device chargers, and chargers for electric vehicles.

In a first general aspect, the invention features a sensor network for a wireless power transfer system. The sensor network includes a differential voltage sensing circuit and a current sensing circuit. The differential voltage sensing circuit is arranged in a wireless power transfer system to measure a rate of change of a voltage difference between portions of an impedance matching network and to generate a first signal representative of the rate of change of the voltage difference. The current sensing circuit is connected to the differential voltage sensing circuit and is configured to calculate a current through a resonator coil connected to the wireless power transfer system based on the first signal.

In a second general aspect, the invention features a wireless power transfer system that includes a resonator coil, an impedance matching network connected to the resonator coil, and a sensor network. The sensor network includes a differential voltage sensing circuit and a current sensing circuit. The differential voltage sensing circuit is arranged to measure a rate of change of a voltage difference between portions of the impedance matching network and to generate a first signal representative of the rate of change of the voltage difference. The current sensing circuit is connected to the differential voltage sensing circuit and is configured to calculate a current through the resonator coil based on the first signal.

These and the following aspects may each optionally include one or more of the following features.

In some implementations, the differential voltage sensing circuit is configured to scale the first signal in response to a second signal, the second signal representing a current through the impedance matching network.

In some implementations, the portions of the impedance matching network are tunable matching networks that include one or more tunable capacitors.

In some implementations, the differential voltage sensing circuit includes an amplification stage having a unity gain amplifier. In some implementations, the unity gain amplifier is configured to provide the first signal as a single-ended voltage signal. In some implementations, the differential voltage sensing circuit is arranged to apply a second signal to the unity gain amplifier to scale the first signal in response to the second signal, the second signal being representative of current through the impedance matching network.

In some implementations, the differential voltage sensing circuit includes a differentiator circuit.

In some implementations, the current sensing circuit includes a differential circuit configured to generate a second signal representative of current through the resonator coil connected to the wireless power transfer system by subtracting the first signal from a second signal representative of current through the impedance matching network.

In a third general aspect, the invention features a protection network for a wireless power transfer system. The protection network includes a differential voltage sense circuit, a first current sense circuit, and a second current sense circuit. The differential voltage sensing circuit is arranged in a wireless power transfer system to measure a rate of change of a voltage difference between portions of an impedance matching network and to generate a first signal representative of the rate of change of the voltage difference. The first current sensing circuit is arranged to measure a first current and to generate a second signal representative of the first current, wherein the first current passes through the impedance matching network. The second current sensing circuit is connected to the differential voltage sensing circuit and the first current sensing circuit. The second current sensing circuit is configured to calculate a second current based on the first signal and the second signal and generate a third signal representative of the second current, wherein the second current passes through a resonator coil connected to the wireless power transfer system. This aspect may optionally include one or more of the following features.

In some implementations, the differential voltage sensing circuit is connected to the first current sensing circuit, and wherein the differential voltage sensing circuit is configured to scale the first signal in response to the second signal.

In some implementations, the differential voltage sensing circuit includes an amplification stage that includes a unity gain amplifier.

In some implementations, the unity gain amplifier is configured to provide the first signal as a single-ended voltage signal.

In some implementations, the differential voltage sensing circuit is connected to the first current sensing circuit, and wherein the differential voltage sensing circuit is arranged to apply the second signal to the unity gain amplifier to scale the first signal in response to the second signal.

In some implementations, the differential voltage sensing circuit includes a differentiator circuit. In some implementations, the second current sensing circuit includes a differential circuit configured to generate the third signal by subtracting the first signal from the second signal.

Some implementations further include a fault protection circuit connected to respective output terminals of the first and second current sensing circuits, the fault protection circuit configured to bypass (bypass) a tunable matching network, or TMN, in response to an amplitude of the second signal or an amplitude of the third signal exceeding a respective threshold.

In some implementations, the fault protection circuit is further configured to bypass the tunable matching network by latching a control signal for the TMN bypass transistor in an asserted state.

In some implementations, the fault protection circuit is further configured to delay latching the control signal until the voltage across the TMN is below a TMN voltage threshold.

Some implementations further include a fault protection circuit connected to respective output terminals of the first and second current sensing circuits, the fault protection circuit configured to cause an inverter-rectifier to turn off in response to an amplitude of the second signal or an amplitude of the third signal exceeding respective thresholds.

In a fourth general aspect, the invention features a fault protection method for a bi-directional wireless power transfer system. The method includes the act of detecting, by a control circuit of the wireless power transfer apparatus, a failure of the bi-directional wireless power transfer system. An operating characteristic of the wireless power transfer apparatus and a hardware configuration of the wireless power transfer apparatus are identified. In response to detecting the fault and based on the operating characteristics and the hardware configuration, a protection operation for protecting the wireless power transfer device from the fault is identified. The operation of the wireless power transmission device is controlled according to the protection operation. Other implementations of this aspect include corresponding systems, circuits, controllers, devices, and computer programs encoded on computer storage devices configured to perform the actions of the methods.

These and other implementations can each optionally include one or more of the following features.

In some implementations, in response to an operating characteristic that indicates that the wireless power transfer device is functioning as a wireless power transmitter, the protection operation includes turning off the inverter-rectifier and shorting at least a portion of the impedance matching circuit. In some implementations, turning off the inverter-rectifier includes overriding an inverter-rectifier Pulse Width Modulation (PWM) control signal.

In some implementations, in response to an operating characteristic indicating that the wireless power transfer device is functioning as a wireless power receiver and a hardware configuration indicating that the wireless power transfer device is configured to connect to a power grid, the protection operation includes: turning off the inverter-rectifier; shorting at least a portion of the impedance matching circuit to dissipate current from the resonator coil; and tapping a resistor configured to dissipate excess power from the inverter-rectifier. In some implementations, turning off the inverter-rectifier includes overriding an inverter-rectifier Pulse Width Modulation (PWM) control signal.

In some implementations, in response to an operating characteristic that indicates that the wireless power transfer device is functioning as a wireless power receiver, the protecting operation includes: turning off the inverter-rectifier; and shorting at least a portion of the impedance matching circuit to be current dissipation from the resonator coil.

In some implementations, turning off the inverter-rectifier includes: an inverter-rectifier Pulse Width Modulation (PWM) control signal is overridden.

In some implementations, in response to an operating characteristic indicating that the wireless power transfer device is functioning as a wireless power receiver and a hardware configuration indicating that the wireless power transfer device is configured as a system of connected devices, the protection operation includes: the inverter-rectifier switches are closed to provide a short circuit between the terminals of the resonator coils. In some implementations, the protection operation causes a corresponding fault condition in a second wireless power transfer device magnetically coupled to the first wireless power transfer device.

In some implementations, the fault is at least one of: tunable impedance matching network fault, over-current fault, or over-voltage fault.

In some implementations, the fault is an overvoltage fault or an overcurrent fault triggered by the load opening.

In some implementations, the method includes: a fault is initiated by disconnecting the load from the wireless power transfer device in response to detecting a vehicle collision.

In a fifth general aspect, the invention features a method of operating a two-way wireless power transfer system. The method comprises the following actions: an instruction to reverse the direction of the power flow between the first wireless power transmission device and the second wireless power transmission device is transmitted by the first wireless power transmission device to the second wireless power transmission device. An indication is received from the second wireless power transfer device that the second wireless power transfer device has been reconfigured to operate according to a reverse direction of the power flow. In response to the indication, the first wireless power device assigns an operating characteristic of the first wireless power transmission device according to a reverse direction of the power flow, and controls operation of an inverter-rectifier of the first wireless power transmission device to operate according to the operating characteristic. Other implementations of this aspect include corresponding systems, circuits, controllers, devices, and computer programs encoded on computer storage devices configured to perform the actions of the methods.

In some implementations, the operating characteristic is indicative that the first wireless power transfer device is operating as a wireless power transmitter, and controlling operation of the inverter-rectifier includes: a Pulse Width Modulation (PWM) control signal is generated for operating the inverter-rectifier as an inverter.

In some implementations, the operating characteristic is indicative that the first wireless power transfer device is operating as a wireless power receiver, and controlling operation of the inverter-rectifier includes: a Pulse Width Modulation (PWM) control signal is generated for operating the inverter-rectifier as a rectifier.

In some implementations, the operating characteristic is indicative that the first wireless power transfer device is operating as a wireless power receiver, and controlling operation of the inverter-rectifier includes: in response to the power at the inverter-rectifier being less than the threshold, operating the inverter-rectifier in a passive rectifier mode; and generating a Pulse Width Modulation (PWM) control signal for operating the inverter-rectifier in an active rectification mode in response to the power at the inverter-rectifier being greater than a threshold.

In some implementations, the PWM control signals alternately turn on respective transistor pairs in the inverter-rectifier to generate a Direct Current (DC) output signal.

In some implementations, the PWM control signals alternately turn on respective transistor pairs in the inverter-rectifier in response to detecting a zero current condition at an input to the inverter-rectifier.

In some implementations, the method includes: responsive to the indication, the tunable matching network of the first wireless power transfer device is reset and operation of the tunable matching network is controlled according to the assigned operating characteristic.

In some implementations, the first wireless power transfer device is connected to the vehicle and the second wireless power transfer device is connected to the power grid.

In a sixth general aspect, the invention features a method for protecting a wireless power system during a load-off condition, wherein during the load-off condition, a load is disconnected from an output of a rectifier of a wireless power receiver, the wireless power system including a wireless power receiver and a wireless power transmitter, the wireless power receiver configured to receive power from the wireless power transmitter. The method includes detecting a load off condition by a load off sensor. Two or more rectifier protection switches are shorted by a first controller, each rectifier protection switch being connected to a diode of the rectifier. A first TMN protection switch connected to a receiver side tunable capacitor connected to the input of the rectifier is shorted by a second controller. An over-current condition in an inverter of the transmitter is detected by a current sensor connected to the transmitter. The inverter is turned off by the third controller. A second TMN protection switch connected to a receiver side tunable capacitor connected to the output of the receiver is shorted by a fourth controller. Other implementations of this aspect include corresponding systems, circuits, controllers, devices, and computer programs encoded on computer storage devices configured to perform the actions of the methods.

In a sixth general aspect, the invention features a method for protecting a wireless power system during a load short circuit condition, wherein during the load short circuit condition, a load is shorted at an output of a rectifier of a wireless power receiver, the wireless power system including a wireless power receiver configured to receive power from the wireless power transmitter and a wireless power transmitter. The method comprises the following steps: an undervoltage condition is detected by a voltage sensor connected to the rectifier output. A first protection switch connected to a tunable capacitor of a wireless power receiver is shorted by a first controller. An over-current condition in a tunable capacitor of a wireless power transmitter is detected by a current sensor connected to the tunable capacitor. A second protection switch connected to the tunable capacitor of the wireless power transmitter is shorted by a second controller. Other implementations of this aspect include corresponding systems, circuits, controllers, devices, and computer programs encoded on computer storage devices configured to perform the actions of the methods. In some implementations, the method includes: an inverter of the wireless power transmitter is turned off, the inverter being connected to a tunable capacitor of the wireless power transmitter.

In a seventh general aspect, the invention features a method for protecting a bidirectional wireless power system during a load-off condition, wherein during the load-off condition, a load is disconnected from an output of a ground-side inverter of a ground-side wireless power transmitter, the bidirectional wireless power system includes a wireless power transmitter and a wireless power receiver, and the wireless power transmitter is configured to receive power from the bidirectional wireless power receiver. The method comprises the following steps: the load off condition is detected by a load off sensor. The ground side inverter is turned off by the first controller. A first TMN protection switch connected to a first ground side tunable capacitor is shorted by a second controller, the at least one tunable capacitor being connected to an input of the ground side inverter. A first resistor is connected in parallel with the disconnected load by a first controller. An error signal is sent from the wireless power transmitter to the wireless power receiver. Upon receiving the error signal, the vehicle-side inverter is turned off by the third controller. Other implementations of this aspect include corresponding systems, circuits, controllers, devices, and computer programs encoded on computer storage devices configured to perform the actions of the methods.

Particular implementations of the subject matter described in this specification can be implemented to realize one or more of the following advantages. These implementations may provide a modular sensor network that can be easily configured for use on a wireless power transmitter or receiver. These implementations may provide a modular sensor network that can be easily configured for use on a wireless power transmitter or receiver. These implementations may provide a sensor/protection network that can be used in a unidirectional or bidirectional wireless power transfer system. These implementations provide a sensor network that enables remote measurement of resonator coil current. For example, these implementations may provide a sensor network capable of measuring current through a transmitter resonator coil located (e.g., along an 8-10 foot cable) away from other control circuitry and sensors of the wireless power transmitter. In some implementations, implementing the sensor and protection circuitry using analog circuitry may provide a faster protection response to dangerous operating conditions. Some implementations provide protection without relying on a communication scheme. For example, some implementations may initiate a protection action between a wireless power receiver and a wireless power transmitter without relying on wired or wireless communication links in a forward charging direction and a reverse charging direction. Some implementations allow for modularity of non-redundant hardware, code, and memory. For example, assigning operating characteristics to components in a bi-directional system may allow for a higher degree of modularity of hardware and software, which may allow for fast, secure, and on-the-fly power reversal. In addition, increased modularity may improve efficiency of product manufacturing.

Implementations of the disclosed apparatus, circuits, and systems may also include any other features disclosed herein, including the disclosed features combined with different implementations or in any suitable manner.

The details of one or more implementations of the subject matter described in this specification are set forth in the accompanying drawings and the description below. Other features, aspects, and advantages of the subject matter will become apparent from the description, the drawings, and the claims.

Drawings

Fig. 1A is a diagram of a circuit model of an exemplary wireless power transmitter.

Fig. 1B is a diagram of a circuit model of an exemplary wireless power receiver.

Fig. 1C is a block diagram of an exemplary sensor network used in a wireless power system.

Fig. 1D is a block diagram of an exemplary protection network used in a wireless power transfer system.

Fig. 2A is a schematic diagram of an exemplary voltage sensor for use with a Tunable Matching Network (TMN).

Fig. 2B is a plot showing an exemplary waveform output of a voltage sensor compared to the waveform output of a direct voltage measurement at a tunable capacitor.

Fig. 3A-3C are schematic diagrams of exemplary voltage sensors across one or more capacitors in position C2 of a wireless power transmitter or receiver.

FIG. 3D is an exemplary waveform output of the voltage sensor and V provided in FIGS. 1A-1B _C2 A plot of an exemplary waveform output for direct measurement of voltage (vc2+, VC 2-).

Fig. 3E-3F are plots of exemplary waveforms of voltages vc2_diff, vy, and vc2_sense.

Fig. 4A is a schematic diagram of an exemplary current sensor to calculate the current I1 at inductor Ls 1.

Fig. 4B is a plot of an exemplary waveform output of the current sensor and an exemplary waveform output of a direct measurement of the current I1 at the inductor Ls 1.

Fig. 4C is a plot of an exemplary waveform of the voltage vc2_diff.

Fig. 4D is a plot of an exemplary waveform of the voltage V1.

Fig. 5A is a schematic diagram of an exemplary current phase detection circuit with inputs CS1 and CS2 from a Current Sense Transformer (CST).

Fig. 5B is a schematic diagram of an exemplary circuit configured to generate a reset signal for the peak detection circuit.

Fig. 5C is an exemplary peak detection circuit configured to detect a peak value of the voltage signal vc2_sense.

Fig. 5D is an exemplary peak detection circuit configured to detect a peak value of a signal representative of coil current v_i1_sense.

Fig. 5E is a plot of an exemplary waveform output of the circuit of fig. 5A.

Fig. 5F is a plot of an exemplary waveform of the input voltage signal vc2_sense and an exemplary waveform of the output vc2_peak_detect.

FIG. 5G is a plot of an exemplary waveform of the input signal V_I1_sense and an exemplary waveform of the output V_I1_sense_pk.

Fig. 5H is a plot of an exemplary waveform output of the reset voltage signal Vreset.

Fig. 6A is an exemplary peak detection circuit configured to sample current in the TMN of a transmitter or receiver.

Fig. 6B is an exemplary zero crossing detector circuit.

Fig. 7A-7E are schematic diagrams of exemplary window comparator circuits configured to detect an over-voltage or under-voltage condition of a signal within a system.

Fig. 8A-8E are schematic diagrams of exemplary fault latch circuits configured to latch upon detection of a fault.

Fig. 8F is a schematic diagram of an exemplary latch circuit that combines two or more of the faults from the latch circuits of fig. 8A-8E.

Fig. 9A and 9B are schematic diagrams of exemplary protection circuits for TMN.

Fig. 10A illustrates the effect of a failure of a latch in an exemplary transmitter when the duty cycle is greater than zero.

Fig. 10B shows the effect of a fault of latching when the duty cycle is equal to zero.

Fig. 11A is a digital logic circuit to enable or disable switching in a TMN in the presence of a hardware FAULT (HW FAULT) or an external FAULT (EXT FAULT).

Fig. 11B is a switch to enable or disable hardware protection.

FIG. 12 is an exemplary plot of waveforms during a hardware test of a TMN overvoltage fault condition.

Fig. 13 is an exemplary wireless power system with one or more protection mechanisms.

Fig. 14 is a plot of an exemplary waveform in an exemplary wireless power system during a load-off condition.

Fig. 15 is a plot of an exemplary waveform in an exemplary wireless power system during a load short circuit condition.

Fig. 16 is a schematic diagram of an exemplary two-way wireless power transfer system.

Fig. 17 depicts a flowchart of example bi-directional control processing that may be performed in accordance with implementations of the invention.

Fig. 18 depicts a schematic diagram of an exemplary inverter-rectifier and a timing diagram illustrating operation of the inverter-rectifier in an inverter mode of operation.

Fig. 19 depicts a schematic diagram of an exemplary inverter-rectifier and a timing diagram illustrating operation of the inverter-rectifier in a rectifier mode of operation.

FIG. 20 depicts a flowchart of example protection operations that may be performed in accordance with an implementation of the present invention.

Fig. 21 is a diagram of a bidirectional wireless power transmission device showing a configuration of a failure sensing circuit.

Fig. 22A is a block diagram of exemplary protection logic for a bi-directional wireless power transfer device.

Fig. 22B illustrates a logic truth table associated with the exemplary protection logic illustrated in fig. 22A.

Fig. 23 shows a series of diagrams describing the operation of the inverter-rectifier in response to the load being disconnected when assigned the rectifier operating characteristics.

Like reference numbers and designations in the various drawings indicate like elements.

Detailed Description

In general, the invention features a control and protection system for unidirectional and bidirectional wireless power transfer systems. Implementations include sensors and protection networks to protect wireless power transfer systems from various dangerous conditions including over-voltage, over-current, over-temperature, and sudden changes in power that may cause damage to the system. Implementations include a control system for managing shutdown of wireless power transfer system components (e.g., a tunable matching network, an inverter, a rectifier, and an inverter-rectifier) in response to a protection action. A control system and process are implemented that include a reverse for managing power flow in a two-way wireless power transfer system.

Fig. 1A is a diagram of an equivalent model of an exemplary wireless power transmitter 100, also referred to as a wireless power supply or ground component (GA). The wireless power transmitter 100 is part of an overall wireless power system that also includes a wireless power receiver 112 (in fig. 1B) configured to receive power transmitted by the wireless power transmitter 100. The wireless power transmitter 100 is typically connected to a power source such as a power grid, an AC generator, or the like. Further, the wireless power transmitter 100 is typically used to transmit power from a power source to power a load or to charge a battery connected to the wireless power receiver 112. This mode of operation is referred to herein as a normal mode of operation and is used to refer to a normal power flow direction in a unidirectional wireless power transfer system. However, in a two-way wireless power transfer system, the power flow may be reversed (e.g., reverse power flow direction). This operation will be considered as a reverse mode of operation. For example, in a two-way wireless power transfer system, transmitter 100 may operate as a "receiver" and receiver 112 may operate as a "transmitter", e.g., to transfer power from a battery or stored power source to a load connected to transmitter 100. For example, during a power outage, a battery of an electric vehicle may be used to provide emergency power to a home through a bi-directional wireless power system. Thus, the terms "transmitter" and "receiver" as used herein refer to the function of the individual components in their normal operating mode, but are not intended to limit the function of these components to only transmitting or receiving power.

The exemplary wireless power transmitter 100 includes an inverter 102, the inverter 102 receiving an input voltage and being connected to an impedance matching network 103 and a resonator coil 104. Note that the model considers the equivalent reflection impedance R of the wireless power receiver _refl 105 and the load reflected to the transmitter. Within the impedance matching network 103 is a Tunable Matching Network (TMN) 106 having at least one first tunable capacitor. In this example, the TMN 106 includes a first tunable capacitor 108a and a second tunable capacitor 108b. In some implementations, the TMN 106 is connected to one or more controllers 109, such as microcontrollers, the one or more controllers 109 being configured to provide control signals, such as tuning signals to tune the tunable capacitors 108 a-108 b, and protection signals to protect the TMN 106 from damage, and the like. Examples and illustrations of tunable matching networks can be found in commonly owned U.S. patent application 15/427,186, filed on 8 of 2 nd 2017, entitled "PWM capacitor control".

In the exemplary implementation shown in fig. 1A, inverter 102 provides a voltage (v1+, V1-) to an impedance matching circuit 103 having inductors Ls3a and Ls 3b. These inductors Ls3a and Ls3b are connected in series with tunable capacitors 108a and 108b, respectively. The tunable capacitor 108a has a positive voltage vcap+ at a first terminal and a negative voltage Vcap-at a second terminal. The tunable capacitor 108b has a positive voltage vcap++ at a first terminal and a negative voltage vcap—ata second terminal. The tunable capacitor 108a is connected in series with an optional current sensing transformer 110. In some implementations, the tunable capacitors 108a, 108b may be connected in series to the fixed capacitors Cs3a, cs3b, respectively. A capacitor Cs2 having a voltage (vc2+, vc 2-) is connected to the right end of the capacitor Cs3a, cs3b. The capacitor Cs1a, the inductor Ls1, and the capacitor Cs1b are connected in parallel to the capacitor Cs2. The inductor Ls1, when driven, is configured to generate an oscillating magnetic field to transmit energy to the wireless power receiver. Note that any of the electrical components discussed herein may represent one or more components connected to each other. For example, a single capacitor in the emitter model 100 may represent two or more capacitors connected in parallel or in series. It is also noted that any values of components shown in any of the provided figures are exemplary values and may be adjusted for a particular application.

Fig. 1B is a diagram of an equivalent model of an exemplary wireless power receiver, also referred to as a wireless power device or vehicle component (VA). The structure of the wireless power receiver largely reflects the structure of the transmitter 100, but there are some important differences. In the receiver model 112, a voltage is induced in the receiver coil 114 as the transmitter 100 generates an oscillating magnetic field. The voltage source 116 in the receiver 112 is a model of this induced voltage. The receiver coil 114 is connected to a capacitor network comprising capacitors C12 and C32 in series and capacitor C11 in parallel. A Tunable Matching Network (TMN) 122 comprising a Current Sensing Transformer (CST) 118 and tunable capacitors 120a, 120b is connected in series to the network. Note that CST 118 and/or tunable capacitors 120a, 120b may be packaged together in a module such as an Integrated Circuit (IC). Finally, the matching voltage from the receiver coil is rectified at rectifier 124 and output to load 126. In some implementations, the load 126 may be a battery manager connected to the battery. In some implementations, the load 126 may be the battery itself. In a typical implementation, a smoothing capacitor 128 may connect the output of the rectifier 124 to the load 126 and serve to filter the rectified output. In some implementations, the TMN 122 is connected to one or more controllers 130, such as microcontrollers, the one or more controllers 130 being configured to provide control signals, such as tuning signals to tune the tunable capacitors 120 a-120 b, and protection signals to protect the TMN 106 from damage, and the like.

Note that many of the following implementations of the sensor and protection mechanisms are discussed in the context of a wireless power transmitter. However, these implementations may be applied to similar structures and functions of a wireless power receiver.

In some implementations, the inverter 102 may be implemented as a bi-directional inverter-rectifier as discussed in more detail below. Similarly, in some implementations, the rectifier 124 may be implemented as a bi-directional inverter-rectifier as discussed in more detail below.

Fig. 1C is a block diagram of an example sensor network 132 for use in a wireless power system. For clarity, the sensor network 132 is depicted in fig. 1C as being implemented in the wireless power transmitter 100. It should be noted that the wireless power transmitter 100 is similar to the wireless power transmitter 100 shown in fig. 1A, except that the wireless power transmitter 100 is shown as a block diagram rather than a circuit model. In addition, the sensor network 132 may be implemented within a wireless power receiver (e.g., the wireless power receiver 112 shown in fig. 1B). For example, the sensor network 132 may be arranged in a similar manner in the wireless power receiver 112 to measure the voltage and current of wireless power receiver components corresponding to the wireless power transmitter components discussed below.

Sensor network 132 includes TMN voltage sensor 134, differential voltage sensor 136, voltage sensor 138, current sensor 140, current phase sensor 142, and current sensor 150. As shown, for example, in fig. 2A, 3A-3C, 4A, 5A, and 6A and as described in more detail below, the sensors 134, 136, 138, 140, 142, and 150 may each be implemented as analog circuitry. In some implementations, one or more of the sensors 134, 136, 138, 140, 142, and 150, or a portion thereof, may be implemented in software. For example, the voltages or currents measured by the sensors 134, 136, 138, 140, 142, and 150 may be converted from analog to digital and further processed by a microprocessor or microcontroller according to software instructions.

The TMN voltage sensor 134 is arranged to measure the voltage across the TMN 106. For example, a TMN voltage sensor A is electrically connected on either side of TMN A to measure the voltage drop across TMN A. For example, voltage sensor 134 is connected at Vcap+ and Vcap-. In some implementations, the sensor network 132 may include one voltage sensor 134 for each TMN 106 in the wireless power transmitter 100. For example, the wireless power transmitter 100 may have only one TMN 106 and only one corresponding voltage sensor 134, while in another implementation, the wireless power transmitter 100 may have a plurality of TMNs 106 with corresponding voltage sensors 134 present for each TMN 106. As described in more detail below with reference to fig. 2A, the voltage sensor 134 is configured to generate an output voltage signal representative of a measured voltage across the TMN 106. In some examples, the output voltage signal is a single-ended voltage signal, e.g., a voltage signal ranging between zero and a positive or negative boundary (e.g., 0-3V or 0-3V).

Although illustrated as being in series with the resonator coil 104, in some implementations, the TMN 106 is arranged in parallel with the resonator coil 104. In these implementations, the voltage sensor 134 may also be arranged in parallel with the TMN 106.

The differential voltage sensor 136 is arranged to measure a rate of change (e.g., a first derivative) of a voltage difference between portions of the impedance matching network. For example, the differential voltage sensor 136 is arranged to measure the rate of change of the voltage difference between the respective output terminals of TMN a and TMN B. For example, differential voltage sensor 136 may be connected at Vcap-and Vcap++. As described in more detail below with reference to fig. 3A and 3B, the differential voltage sensor 136 is configured to generate an output signal representative of the rate of change of the voltage between the measured outputs of the TMN 106. In some examples, the output voltage signal is a single-ended voltage signal. The output of the differential voltage sensor 136 also represents the rate of change of the voltage across the capacitor C2 s. Two different transmitter 100 parameters may be determined based on the differential voltage obtained at that location in the transmitter 100: the voltage across capacitor C2s and the current through the resonator coil 104 (current I1 s).

The voltage sensor 138 is configured to measure the voltage across the capacitor C2 s. As described in more detail below with reference to fig. 3C, the voltage sensor 138 is configured to generate an output signal representative of the voltage across the capacitor C2 s. For example, the voltage sensor 138 may be configured to integrate the output of the differential voltage sensor 136 to provide an output signal representative of the voltage across the capacitor C2s (or more generally any parallel component of the matching network). In some examples, the output signal is a single-ended voltage signal.

The current sensor 140 is configured to measure a current (e.g., current I1 s) through the resonator coil 104. As described in more detail below with reference to fig. 4A, the current sensor 140 is configured to generate an output signal representative of the current through the resonator coil 104. For example, the current sensor 140 is configured to calculate a current I2s through the capacitor C2s based on the differential voltage measured by the differential voltage sensor 136, and obtain the current through the coil 104 by subtracting the calculated current I2s from the current I3s through the impedance matching network measured by the current sensor 150. In some examples, the output signal of the current sensor 140 is a single-ended voltage signal.

The current sensor 150 is connected to a transformer 110, for example in the transmitter 100. Similarly, current sensor 150 may be connected to a corresponding transformer, such as CST 118 in receiver 112. The current sensor 150 is configured to measure a current (e.g., current I3 s) through the impedance matching network. As described in more detail below with reference to fig. 6A, current sensor 150 is configured to generate an output signal (CSI) representative of current I3s through an impedance matching network (e.g., TMN 106, inductor L3sA, and capacitor C3 sA).

The current phase sensor 142 is configured to measure the phase of the current I3s through the impedance matching network. As described in more detail below with reference to fig. 5A, the current phase sensor 142 is configured to generate an output signal representative of the phase of the current I3 s.

In some implementations of the wireless power transmitter 100, it is impractical to directly measure the current through the resonator coil 104, as the coil may be located at the end of the cable that is spaced from the control circuitry of the transmitter. In such a case, the indirect measurements provided by the sensor network 132 may provide accurate and efficient current measurements to effectively maintain safe operation of the wireless power transmitter 100. In some implementations, the sensors in the sensor network 132 may be implemented in analog circuitry. Such an implementation may provide faster detection and response to dangerous conditions than digital circuit or software based sensors.

In some implementations, the differential voltage sensor 136 is configured to scale the output signal of the differential voltage sensor 136 based on the current measurement obtained by the current sensor 150. For example, differential voltage sensor 136 may scale its output signal based on the output (CSI) of current sensor 150 to account for the voltage drop across capacitors C3sA and C3sB (when present in transmitter 100).

Fig. 1D is a block diagram of an exemplary protection network 180 for use in a wireless power transfer system. The protection network 180 includes the sensor network 132. The protection network 180 is configured to fail in response to detecting a dangerous operating condition in the wireless power transmitter 100 (or receiver 112). The protection network 180 may also be configured to perform a protection action on the wireless power transmitter 100 (or receiver 112) in response to detecting a dangerous operating condition. Dangerous operating conditions may include, but are not limited to, over-voltage/under-voltage/over-current/under-current conditions in the impedance matching network and/or TMN, over-voltage/under-voltage/over-current/under-current conditions in the resonator coil, over-voltage/under-voltage conditions at capacitor C2. These or other dangerous operating conditions may represent one or more operational faults within the wireless power transfer system, including, but not limited to, a load short, a load disconnection, the presence of Foreign Objects (FODs) too close to the resonator coil 104, or a fault of one or more components of the transmitter 100 or receiver 112.

Protection network 180 includes sensor network 132, peak detectors 146, 148, 151, reset signal generator 144, comparator circuits 152-160, fault logic 162-170, optional combinational fault logic 172, and protection/control circuit 109. As shown, for example, in fig. 2A, 3A-3C, 4A, 5A, 6B, 7A-7E, and 8A-8F, and as described in more detail below, the various components of protection network 180 may be implemented as analog circuits. In some implementations, one or more of the sensors 134, 136, 138, 140, 142, and 150, or a portion thereof, may be implemented in software. For example, the voltages or currents measured by the sensors 134, 136, 138, 140, 142, and 150 may be converted from analog to digital and further processed by a microprocessor or microcontroller according to software instructions.

The protection/control circuitry may include separate protection and control circuitry for the TMN (e.g., TMN protection/control circuitry 174) and protection and control circuitry for the inverter (or rectifier in the receiver) (e.g., inverter protection/control circuitry 176). Furthermore, the protection and control functions of the protection/control circuit 109 may be integrated (e.g., into a single common processor or group of processors) or segmented (e.g., individual protection circuits acting separately to override normal control signals from the control circuit during response to a fault condition). The protection/control circuit 109 may be implemented in hardware, software, or a combination thereof. For example, the protection/control circuit 109 may be implemented as one or more software programs executed by one or more processors. The protection/control circuit 109 may be implemented in analog circuitry or digital circuitry. For example, the protection/control circuit 109 may be implemented as an analog circuit, ASIC, or FPGA.

The current phase sensor 142 and peak detectors 146, 148, 151 provide output signals to a TMN protection/control circuit 174 that may be used to control the operation of the TMN 106. Details of the current phase sensor 142 and the peak detectors 146, 148, and 151 are described below with reference to fig. 5A, 5D, 5C, and 6A. Typically, the peak detector 146 generates an output signal that is representative of the timing, amplitude, or both, of the voltage peaks (e.g., positive and negative peaks) across the capacitor C2s based on the output of the voltage sensor 138. The peak detector 148 generates an output signal that is representative of the timing, amplitude, or both, of the current peaks (e.g., positive and negative peaks) passing through the resonator coil 104 based on the output of the current sensor 140. The peak detector 151 generates an output signal representing the timing, amplitude, or both of the current peaks (e.g., positive and negative peaks) (e.g., I3 s) through the impedance matching network based on the output of the current sensor 150. The reset signal generator 144 generates a reset signal for resetting the circuitry in the peak detectors 148 and 146. The reset signal generator 144 is configured to generate a reset signal based on the output of the differential voltage sensor 136.

The comparator circuits 152-160 and fault logic 162-170 detect abnormal output values from respective sensors in the sensor network 132 and generate corresponding fault signals. Details of the comparator circuits 152-160 and fault logic 162-170 are described below with reference to fig. 7A-7E and 8A-8E. In general, the comparator circuits 152-160 detect abnormal conditions in the transmitter 100 by comparing the output of each sensor to one or more thresholds. The fault logic 162-170 receives outputs from respective ones of the comparator circuits 152-160 and generates a fault detection signal in the event an abnormal condition is detected. For example, fault logic 162-170 may include a latch circuit to latch (e.g., temporarily or permanently store) the output of the comparator circuit when a fault is indicated. In response, the fault logic passes the fault signal to the combinational fault logic 172 (if available), or to one or both of the TMN protection/control circuitry 174 and the inverter protection/control circuitry 176. If the combinational fault logic 172 is not implemented, each fault logic 162-170 passes its output along signal path 178 to the protection/control circuit 109.

The TMN protection/control circuitry 174 is configured to shut down the TMN 106 (or TMNs 106) or bypass the TMN 106 (or TMNs 106) in response to detecting a fault in the wireless power transfer system. As described in more detail below with reference to fig. 9A-10B, the TMN protection/control circuitry 174 is configured to bypass the TMN in response to a fault. For example, the TMN protection/control circuitry 174 may be configured to bypass the TMN 106 by having the current path bypass the TMN (e.g., shorting the TMN). In some implementations, the TMN protection/control circuitry 174 is configured to bypass the TMN 106 by holding (e.g., latching) one or more control signals, such as Pulse Width Modulation (PWM) signals, in an asserted state. The asserted state refers to the signal value that keeps the bypass transistor in the "on" state. For example, the asserted state of the P-type transistor may be a negative drive signal and the asserted state of the N-type transistor may be a positive drive signal. In some implementations, the TMN protection/control circuitry 174 may delay latching the control signal until the voltage across the TMN is below a threshold (e.g., 50V), for example, to minimize current transients.

Inverter (or rectifier) protection/control circuit 176 is configured to shut down inverter 102 (or rectifier 124) in response to detecting a fault in the wireless power transfer system. As described in more detail below with reference to fig. 14 and 20-23, the inverter protection/control circuit 176 is configured to shut down the inverter (rectifier) in response to a fault by isolating the inverter from the power source to stop current flow through the transmitter 100 (receiver 112).

Fig. 2A is a schematic diagram of an exemplary voltage sensor 134 of Tunable Matching Networks (TMNs) 106 and 122. Examples of the voltage sensor 134 may be connected to the respective tunable capacitors 108a, 108b of the TMN 106 or the respective tunable capacitors 120a, 120b of the TMN 122. For example, in TMN 106, lead 202a of the first instance of voltage sensor 134 is configured to be connected to voltage node Vcap+ of tunable capacitor 108a, and lead 202b of the first instance of voltage sensor 134 is configured to be connected to voltage node Vcap-of tunable capacitor 108 a. Similarly, lead 202a of the second instance of voltage sensor 134 is configured to be connected to voltage node Vcap++ of tunable capacitor 108b, and lead 202b of the second instance of voltage sensor 134 is configured to be connected to voltage node Vcap— of tunable capacitor 108 b. Thus, in an exemplary tunable matching network having two tunable capacitors, there are two voltage sensors each connected to a tunable capacitor.

The exemplary voltage sensor 134 is a two-stage sensor having a first stage or passive stage 204 and a second stage or amplification stage 206. The exemplary passive stage 204 includes a capacitive coupler (which consists of capacitors C17 and C18) that connects the voltages at leads 202a, 202b to the rest of the sensor circuit. In some implementations, the passive stage 204 may include a capacitive coupler, a resistive divider, a magnetic coupler, an optical coupler, or any combination of these. A capacitive divider consisting of capacitors C20 and C21 is connected to the capacitive coupler. The capacitor divider divides the voltage connected to the sensor for transfer to the amplification stage 206. The capacitor divider includes a bias voltage 207. The bias voltage may be set in a range between 0 volts and 2 volts (or between 1 volt and 1.5 volts in some implementations). The amplification stage 206 is a unity gain amplifier U13 that converts the differential voltage from the passive stage 204 into a single-ended voltage output vcap_sense 2. Note that the bias voltage 208 is on the positive input to the amplifier U13. For this sensor structure, the bias voltage 208 may be between 0V and 3V. In other implementations, the bias voltage 208 is tailored to a particular sensor structure and may have different values. In some implementations, the amplifier may be implemented using a single positive voltage supply or a dual voltage supply. Although a capacitive voltage divider is shown as part of the voltage sensor in this figure, a resistive voltage divider may be used as the voltage sensor. In some implementations, a unity gain amplifier is used as the filter. For example, the amplification stage 206 may be configured as a low pass filter (e.g., having a bandwidth of about 0-2 MHz).

Fig. 2B is a diagram illustrating an exemplary waveform 210 of the output of the voltage sensor 134 compared to a waveform 212 of a direct voltage measurement at the tunable capacitor 108a or 108B. The two waveforms 210 and 212 overlap each other. Because of the high accuracy, the difference between the sensor waveform 210 (light waveform) and the directly measured waveform 212 (dark waveform) is almost imperceptible. In some implementations, the accuracy of the voltage sensor may be within +/-10%, +/-5% or less of the direct voltage measurement. To generate waveform 210, the bias voltage is subtracted from the single-ended voltage output Vcap_sense2 and the difference is scaled by the sensor gain. Thus, waveform 210 is defined by the following relationship: waveform 210 = (vcap_sense 2-bias voltage 208) sensor gain. In the plot shown in fig. 2B, the bias voltage 208 is 1.5V, which may be modified for the needs of a particular wireless power transmitter or receiver. In this plot, a manual sensor gain 750 is applied to show the correspondence of the sensor waveform 210 and the measured voltage waveform 212.

In some implementations, the output Vcap_sense2 of the voltage sensor is passed to one or more protection mechanisms. For example, the output Vcap_sense2 may be passed to a window comparator to determine the presence or absence of an overvoltage condition in the TMN 106 or 122. For example, if the desired voltage level for that particular system is 500-550V, an error signal may be generated if the output reading of the sensor exceeds 550V. The error signal may be used to prevent any potential damage due to an overvoltage condition in the TMN 106 or 122. In another implementation, the output Vcap_sense2 is passed to a controller 109 connected to TMN 106 or 122. The controller 109 may digitize the output Vcap_sense2 for use in controlling tunable capacitors within the TMN 106 or 122. In yet another implementation, the output Vcap_sense2 of the voltage sensor is passed to a protection mechanism and controller.

Fig. 3A is a schematic diagram of an exemplary first stage 300 of a differential voltage sensor 136 across one or more capacitors in a location C2 of a wireless power transmitter (for capacitor Cs 2) or receiver (for capacitor Cd 2). The operational amplifier U5 in the first stage 300 of the differential voltage sensor 136 acts as a differentiator. The output of the first stage 300 is a single-ended voltage Vy, which is passed to the second stage 302 of fig. 3B. The second stage 302 includes an amplifier U10 as a unity gain amplifier having inputs Vy and 304. For a voltage sensor implemented in a transmitter, if the impedance matching network 103 of the transmitter 100 does not include fixed capacitors Cs3a, cs3b, then the input 304 is equal to the bias voltage. However, if the network 103 includes fixed capacitors Cs3a, cs3b, V1 is used for input 304. V1 is TMN input current information. The output of the second stage 302 is the differential voltage at position C2, vc2_diff. The implementation in the receiver is a mirror image of the implementation of the transmitter.

Fig. 3C is a schematic diagram of a voltage sensor 138 including an amplifier U7 employing an integrator structure. The differential voltage vc2_diff is passed to the negative input of the amplifier U7 with a bias voltage at the positive input of the amplifier U7. The output of the third stage 306 is the voltage signal vc2_sense.

FIG. 3D is an exemplary waveform output 310 and V of the voltage sensor 138 (provided in FIGS. 1A-1B) _C2 A plot of an exemplary waveform output 312 for direct measurement of voltage (vc2+, VC 2-). Waveform output 310 is obtained by the relationship: output 310 = - (vc2_sense 2) -bias voltage sensor gainWherein the bias voltage is equal to 1.5V and the sensor gain is 1000. Note that the phase of vc2_sense is negative (see plot of the original vc2_sense waveform in fig. 3F). Fig. 3E is an exemplary waveform diagram of voltages vc2_diff and Vy. Note that these waveforms are generated using fixed capacitors cs3a=cs3b=300 nF.

Fig. 4A is a schematic diagram of an exemplary current sensor 140 in transmitter 100 to calculate current I1. The differentiator circuit 400 uses the measured value vc2_diff, which contains the current information through the capacitor Cs2 or C2D (see waveform of fig. 4C), and V1, which is the current information through the portion 111 of the impedance matching network 103 (see waveform of fig. 4D), to output the differentiated signal v_i1_sense having the coil current information. The differential current signal is obtained by subtracting the current through capacitor Cs2 from the current from TMN 106.

Fig. 4B is a plot of an exemplary waveform output 402 of the current sensor 140 and an exemplary waveform output 404 of a direct measurement of the current I1 in the transmitter 100. Waveform output 402 is obtained by the relationship: output 402= ((v_i1_sense) -bias voltage) sensor, wherein: the bias voltage is equal to 1.5V and the sensor gain is 142.5. Note that, since the accuracy of the current sensor 140 is high, it is difficult to perceive the difference between the waveform output by the current sensor 140 and the waveform of the direct measurement I (Ls 1). Fig. 4C is a plot of an exemplary waveform of the voltage vc2_diff, and fig. 4D is a plot of an exemplary waveform of the voltage V1.

Fig. 5A is a schematic diagram of an exemplary current phase detector 142 having inputs CS1 and CS2 from CST 110 or 118. In some implementations, the sensor 142 is configured to detect the phase of the current signal (I3 current) from the tunable capacitor 108a or the tunable capacitor 120 a. In some implementations, the sensor 142 is configured to detect rising or falling Current Phases (CPs) or both. Fig. 5E is a plot of an exemplary waveform output 502 (with dashed lines) of sensor 142. Waveform 502 is a square wave representing the output CP of sensor 142. In an implementation, the analog-to-digital converter of the controller samples on positive transitions (rising edges) and/or negative transitions (falling edges) of waveform 502. The current phase sensor may include a filter to filter out harmonics. The filter may be after the current sensing transformer. For example, the filter may comprise a low pass filter, a high pass filter, or a band pass filter.

Fig. 5B is a schematic diagram of an exemplary reset generator 144 configured to generate the reset signals for the peak detection circuits 506, 508. The inputs to the reset generator 144 are a differential voltage signal vc2_diff and a bias voltage (1.5V in this example). The circuit 144 outputs a voltage reset signal Vreset. Fig. 5H is a plot of an exemplary waveform output 510 of the reset voltage signal Vreset. The reset signal Vreset 510 is generated once for the period of the differential voltage signal vc2_diff and placed on the rising edge of the voltage signal vc2_sense.

Fig. 5C is an exemplary peak detector 146 configured to detect a peak of the voltage signal vc2_sense. Thus, the circuit 146 outputs the peak detection signal vc2_peak_detect using the voltage signals vc2_sense and Vreset. Fig. 5F is a plot of an exemplary waveform of the input voltage signal vc2_sense 512 and an exemplary waveform of the output vc2_peak_detect 514. Note that peak detect signal 514 maintains the peak value of voltage signal vc2_sense 512 until reset signal Vreset 510 is triggered.

Fig. 5D is an exemplary peak detector 148 configured to detect a peak value of a signal representative of coil current v_i1_sense. Thus, the circuit 148 outputs the peak detection signal v_i1_sense_pk using the voltage signals v_i1_sense and Vreset. Fig. 5G is a plot of an exemplary waveform of the input signal v_i1_sense 518 and an exemplary waveform of the output v_i1_sense_pk 520. Note that peak detection signal 520 maintains the peak of voltage signal v_i1_sense 518 until reset signal Vreset 510 is triggered.

Fig. 6A is a schematic diagram of an exemplary current sensor 150 and peak detector 151. The peak detector 151 is configured to sample the current in the TMN 106 or 122. Note that in the exemplary implementation, integrator 602 is included in peak detector 151. This structure has the following advantages over, for example, differentiators: the integrator 602 may attenuate noise at frequencies higher than the operating frequency of the wireless power system. An exemplary operating frequency is 85kHz. To obtain information about the current in the TMN, the output CSI2 of integrator 602 is sampled by current phase signal 502. This implementation avoids being affected by switching noise associated with the inverter 102. Fig. 6B is an exemplary Zero Crossing Detector (ZCD) circuit 604. The zero crossing detector circuit outputs a digital CP signal that is high when the current in the TMN is negative and low when the current in the TMN is positive.

Fig. 7A-7E show schematic diagrams of exemplary comparator circuits 152-160. Comparator circuits 152-160 are window comparator circuits configured to detect an over-voltage or under-voltage condition of a signal within the system. In some implementations, the window comparator circuit may be connected to various measurement circuits described herein. For example, a comparator circuit 156 or 158 may be connected to the output of the voltage sensor 134 to detect an overvoltage condition of any of the tunable capacitors 108a, 108b, 120a, and 120 b. In some implementations, the window comparator circuits each generate a count for each input value that exceeds a range of a preset window defined by an upper limit and a lower limit. For example, the window comparator circuit 700 generates the count signal nvtmnb_high when the TMN voltage signal VtmnB is greater than 550V, and generates the count signal nvtmnb_low when the TMN voltage signal VtmnB is less than-550V. In other words, vtmnA is equal to the output signal vcap_sense2 for the voltage sensor 134 on the tunable capacitor 108a (transmitter) or 120a (receiver). VtmnB is equal to the output signal vcap_sense2 for the voltage sensor 134 on the tunable capacitor 108b (transmitter) or 120b (receiver).

Note that the over-current or under-current condition may be derived from the detected over-voltage or under-voltage condition. For example, fig. 7B is a window comparator circuit 154 with an input voltage input v_i1_sense converted to a current reading. The following table lists the exemplary window comparator circuits shown in fig. 7A-7E and their respective inputs and outputs.

Drawing designation	Input signal	Output signal
			FIG. 7A	VC2_sense	nVC2_LOW,nVC2_HIGH
FIG. 7B	V_I1_sense	nI1_LOW,nI1_HIGH
			FIG. 7C	VtmnB	nVtmnB_LOW,nVtmnB_HIGH
FIG. 7D	VtmnA	nVtmnA_LOW,nVtmn_HIGH
			FIG. 7E	CSI1	nCSI_LOW,nCSI_HIGH

TABLE 1 input and output signals of Window comparator

Fig. 8A-8E are schematic diagrams of exemplary fault logic circuits 162-170 configured to latch upon detection of a fault. The output signals from the window comparators 152-160 are fed into logic circuitry configured to latch or shut down the circuitry in the event of values exceeding a range of predetermined thresholds. For example, count signals nvtmnb_low, nvtmnb_high from the window comparator 156 are input into the fault logic 166. The exemplary FAULT logic 166 includes a NAND gate 802 that provides an output to a flip-flop circuit 804, thereby generating a FAULT signal VtmnB_FAULT.

The following is a table of exemplary latch circuits and their respective inputs and outputs.

TABLE 2 input and output signals of Window comparator

Fig. 8F is a schematic diagram of an exemplary combinational fault logic 172 and includes logic circuitry 808, the logic circuitry 808 combining fault output signals from two or more of the fault logic circuits of fig. 8A-8E. For example, as shown, the combinational fault logic 172 uses logical OR (OR) gates to combine the fault output signals from two OR more of the fault logic circuits of FIGS. 8A-8E. In some implementations, the controllers 109 and/or 130 are configured to read each fault signal independently. In other implementations, the controllers 109 and/or 130 are configured to read the output of the logic 808, and the logic 808 generates the overall hardware FAULT signal hw_fault. In some implementations, the controller can read any combination of the fault signals described herein.

Fig. 9A is an exemplary detection circuit configured to detect whether the TMN voltage is a low voltage when the TMN duty cycle is zero. The detection circuit receives PWM signals s_pwm_1 and s_pwm_2 generated by the controller 109 or 130 for controlling the switching (e.g., FET) of the TMN 106 or 122, respectively, and outputs a detection signal fet_low. These PWM signals and detection signals fet_low are input to circuits 902 and 904 (as shown in fig. 9B) to generate control signals s_pwm_1_o and s_pwm_2_o, which are configured to control switching of the TMN. The fault signal latch_fets short circuits the switch of the TMN to protect the switch from damage.

In a first implementation, in the event that the duty cycle of the TMN is greater than zero and a fault is detected, the TMN voltage is allowed to drop to zero before the switching of the TMN shorts. This prevents any damage from occurring due to a short circuit. Fig. 10A illustrates the effect of a latch-up fault in an exemplary transmitter at a time 1000 when the duty cycle is greater than zero. The signal V (latch_fets) becomes 1V and the voltage V (s_Vcap+, s_Vcap-) at the tunable capacitor 108a becomes zero.

In a second implementation, where the duty cycle of the TMN is zero and a fault is detected, the shutdown occurs when the voltage in the TMN reaches a certain low range (such as within +/-50V, etc.). Fig. 10B shows the effect of a lock failure at duty ratio=0. At time 1002, the latch signal becomes 1V. The voltage V (s_Vcap+, s_Vcap-) at tunable capacitor 108a is of a magnitude and is allowed to approach 50V before time 1004 becomes zero. The graph of fig. 10B illustrates the operation of the TMN protection/control circuit 174 to delay latching the control signal until the voltage across the TMN is below a threshold (e.g., 50V), for example, to minimize current transients.

Fig. 11A is a digital logic circuit to enable or disable access to a TMN in the presence of a hardware FAULT (HW FAULT) or an external FAULT (EXT FAULT). Fig. 11B is a switch to enable or disable hardware protection. Note that if pins 2 and 3 are switched on, then the hardware is enabled to switch the TMN switch on. If pins 1 and 4 are switched on, the enable signal is bypassed. In some implementations, if a fault is detected, the TMN is configured to close during one switching cycle of the TMN switch.

FIG. 12 is an exemplary plot of waveforms during a hardware test of a TMN overvoltage fault condition. The output voltage 1202 and the output current 1204 are from the exemplary inverter 102. Waveform 1206 represents a voltage at TMN, while waveform 1208 represents a TMN over-voltage fault signal. At time 1210, a fault is detected as shown in waveform 1208. Shortly thereafter, at time 1212, the inverter is shut down. At time 1214, the switching of the TMN is forced to short. This creates a bypass at the TMN by routing a transmit current around the TMN. Note that when the voltage at the TMN (e.g., at the tunable capacitor) is high, as in this example, the circuit waits for the voltage to drop before shorting the switch of the TMN.

Fig. 13 is an exemplary wireless power system 1302 having one or more protection mechanisms for various fault conditions. Exemplary fault conditions that may occur in system 1302 include, but are not limited to: load disconnection (e.g., disconnection of the load from the wireless power receiver); load shorting (e.g., load shorting); load overvoltage (e.g., battery overcharge or load disconnection occurs); coil overcurrent (e.g., an overcurrent condition is detected in resonator coils L1d and/or L1 s); TMN overvoltage (e.g., an overvoltage condition occurs in TMN 122 or 106); or a combination thereof. These fault conditions can cause large transients in the system that can lead to damage to various components. Note that one or more controllers coupled to one or more sensors described herein may protect the system and components of the system from damage. These controllers include a controller 1304 connected to an inverter, a controller 1306 connected to a transmitter side TMN (Tx-TMN), a controller 1308 connected to a receiver side TMN (Tx-TMN), and a controller 1310 connected to a rectifier. In some implementations, the controllers 1304 and 1306 may be one controller 1312. In some implementations, the controllers 1308 and 1310 may be one controller 1314. The following illustrates a scenario in which the sensors discussed herein mitigate these fault conditions.

Fig. 14 is a plot of an exemplary waveform in an exemplary wireless power system 1302 during a load-off condition. At time 1402, the load is disconnected for various reasons. For example, a battery manager connected to the battery may feel an adverse condition and disconnect the battery from the wireless power receiver. The load is disconnected causing the charging current to pass through decoupling capacitor C7 at the output of the rectifier. Subsequently, the voltage V (v_bus+) of the output capacitor C7 starts to rise from the timing 1402 to the timing 1404. At time 1404, an overvoltage condition at the output capacitor C7 is detected. An overvoltage fault signal (signal V (ov flg)) may be generated. At or near time 1404, the protection switches S5, S6, S9, and S10 of fig. 13 short circuit the rectifier 124. In some implementations, the rectifier 124 may be shorted by closing a set of switches (e.g., the switches on the high side of rectifier bridges S9 and S10 or the switches on the low side of rectifier bridges S5 and S6). This causes the voltage at the output capacitor C7 to stop rising. This may result in a distorted current through TMN 122; thus, at or near time 1404, the protection switch shorts the receiver side TMN 122.

From time 1404 to time 1406, the distorted reflected impedance in the transmitter electronics causes currents in the inverter (current signal I (Ls 3 a) at the output of the inverter) and the resonator coil (current signal I (L1 s)). At time 1406, an over-current condition at the inverter is detected and the inverter is turned off. At or near time 1406, the switch of the transmitter side TMN 106 is shorted such that current through the TMN is diverted by closing the switch instead of the capacitor. This prevents damage to the TMN. Note that from time 1404 to time 1406, many current signals become distorted. These signals include the current I (Ls 3 a) at the output of the inverter, the current I (L1 s) in the transmitter resonator coil and the current I (L1 d) in the transmitter resonator coil. These distortions may result in triggering the various sensors described herein. When the peak value of the current signal I (Ls 3 a) exceeds the threshold value, an overcurrent flag signal V (oc_flag) is generated. After time 1406, the energy in the system decreases. In some implementations, the receiver may be able to communicate with the transmitter fast enough for the transmitter to protect itself.

In some implementations, a normally open voltage blocking switch may be provided in parallel with the parallel capacitor C10 or C13 shown in fig. 13. For example, if an over-current condition is detected at the inverter, a normally open switch in parallel with capacitor C10 may be closed, thereby reducing any excess coil current in coil L1 s.

In some implementations, the load disconnection may be initiated by the system itself. For example, the VA-side wireless power transfer system may include a sensor connected to a controller. The value or range of values from the sensor may be read by the controller. For example, a collision sensor (e.g., accelerometer) may be connected to the controller (1314 and/or vehicle-side 1310). Readings from the crash sensor indicating that another vehicle has hit the charging vehicle may cause the load to disconnect. The controller may open at least one switch (e.g., relay, MOSFET, IGBT) connected between the output of the rectifier and the load (on the positive side and/or ground side) in response to detecting a fault value from the sensor. The system further protects itself and the system shuts down and/or powers down via a response as shown in fig. 14.

In some implementations, instead of (or in addition to) detecting the rising voltage of the output capacitor C7, a current sensor may be connected to the output towards the load. If the current sensor reads zero (or approximately zero) current, the system may detect a load off condition.

Fig. 15 is a plot of an example waveform in an example wireless power system 1302 during a load short circuit condition. There are a number of reasons why a load short circuit condition may occur. For example, if the output capacitor C7 fails, this may lead to a short circuit. If the output filter fails, such as for electromagnetic interference (EMI) reduction purposes, this may result in a short circuit. This also causes a short circuit if the rectifier fails. In the example provided in fig. 15, a LOAD short illustrated by signal V (v_load+) occurs at time 1502. Shortly thereafter, at time 1504, a short circuit is detected. At this time, an undervoltage fault signal (signal V (uv_flg)) is generated. To protect itself, the TMN switch is also shorted, as indicated by the voltage signal V (V2d_1, d_Vcap-). After time 1504, an over-current condition is detected in the transmitter side TMN 106, and then the switching of the transmitter side TMN 106 is shorted. At time 1506, an over-current condition (flag V (oc_flg)) is detected in the inverter and the inverter is turned off, which results in a system outage.

Fig. 16 shows a schematic diagram of an exemplary bi-directional wireless power system 1600. The schematic diagram depicts both the Ground Assembly (GA) -side wireless power transfer device 1600a and the device-side wireless power transfer device 1600 b. As described above, the GA-side wireless-power transfer apparatus 1600a generally operates as a wireless power transmitter for use in the case of a similar unidirectional wireless power transfer system. However, as discussed below, in a bi-directional system, the GA side generally refers to a wireless power transfer device connected to or configured to be connected to a stationary power source or a load such as a power grid, AC generator, or the like. Further, GA-side systems are generally capable of handling higher power, voltage, or current transients as compared to the device-side wireless power transfer device 1600 b. On the other hand, the device-side wireless power transmission device 1600b generally operates as a wireless power receiver for use in the case of a similar unidirectional wireless power transmission system. However, as discussed below, in a bi-directional system, the device side generally refers to a wireless power transfer device connected to or configured to be connected to a mobile (or generally more limited) power source or a load such as a battery or battery-powered device (e.g., a computing device or an electric vehicle). The device-side wireless power transfer device 1600b may also be referred to as a vehicle component (VA) or VA-side device when used in the context of a wireless power transfer device connected to an electric vehicle or other mobile vehicle.

Both the GA wireless-power transfer device 1600a and the VA wireless-power transfer device 1600b include an inverter-rectifier 1602. The inverter-rectifier 1602 includes a bridge structure of switching elements. For example, the inverter-rectifier 1602 may include active switching elements, such as MOSFETs or the like, that allow the inverter-rectifier 1602 to operate as an inverter or rectifier in a bi-directional system. As discussed in more detail below, the mode of operation (also referred to herein as "operating characteristics") of the inverter-rectifier 1602 may be controlled based on the mode of the PWM control signal supplied to the switching elements.

The system 1600 is capable of powering a load through power transfer (such as a battery of a vehicle, etc.) in a first direction (e.g., a normal power flow direction) without inputting power to a ground side (GA). Alternatively, the system 1600 may supply power in a second direction (e.g., a reverse power flow direction), such as from a battery of an electric vehicle connected to the VA-side device 1600b to a grid connected to the GA-side device 1600 a. As another example, the bi-directional system 1600 may be used to power a home from a battery of an electric vehicle parked in a garage during a power outage. Note that any or all of the sensors and protection mechanisms discussed above may be implemented in a bi-directional system 1600 that uses an inverter-rectifier 1602. Where a single component is shown comprising resistors, inductors and capacitors, libraries comprising components in series and/or parallel fashion may be utilized. In the case of the tunable assembly shown, the fixed assembly may be included in series and/or parallel with the tunable assembly. In some implementations, the controllers 1304 and 1306 may be combined in a single controller 1620. Also, in some implementations, controllers 1308 and 1310 may be combined in a single controller 1640. Further, the controllers 1304, 1306, 1620, 1308, 1310 and 1640 may be implemented in a structure similar to the control and protection circuits 176 and 178 discussed above.

In some implementations, the controllers 1620 and 1640 include a bi-directional manager. The bi-directional manager coordinates the structure of the different hardware and software components of the wireless power transfer device (e.g., 1600a/1600 b) according to the direction of power flow as represented by the operating characteristics assigned to the device. For example, the operating characteristics of INV indicate that the inverter-rectifier is operating as an inverter, and thus the wireless power transfer device 1600a/1600b is operating as a transmitter. Similarly, for example, the operating characteristics of the REC indicate that the inverter-rectifier is operating as a rectifier, and thus the wireless power transfer device 1600a/1600b is operating as a receiver. The bi-directional manager also coordinates transitions from one direction of power flow to the opposite direction of power flow. For example, the bi-directional manager of VA-side device 1600b can communicate with the bi-directional manager of GA-side device 1600a via wireless communication link 1650 (e.g., wiFi link) to coordinate power reversal. The bi-directional manager may be implemented as a separate controller within each device 1600a/1600b or may be implemented in software.

More specifically, the various hardware and software components of the system may have different operating set points, modes, and/or operating ranges depending on the direction of flow of power, and the operational characteristics of the wireless power transfer device 1600a/1600 b. The various operating set points, modes, and/or operating ranges may be stored in memory or in hardware. The various components of the system (e.g., inverter-rectifier 1602, TMN 106, and other components) including the various controllers, filters, communication systems, and/or protection systems may take on different "operating characteristics" depending on the direction of power flow.

The bi-directional manager of the wireless power transfer apparatus may assign appropriate characteristics at system start-up and/or during power flow transitions based on the expected direction of power flow through the wireless power transfer system 1600 as a whole. For example, upon receiving a command to switch from one mode of operation of the system to another, the bi-directional manager may assign respective operating characteristics to the various component controllers (e.g., 1304, 1306, 1308, and 1310), e.g., via an operator interface, and/or a user interface connected to any or all controllers on either or both sides of the system or outside the system (such as on a network, grid, mobile device, etc.). Each controller may use the assigned operating characteristics to identify and load the appropriate operating procedures or software code to control the associated components of the wireless power transfer device 1600a/1600 b. For example, when an inverter-rectifier controller is assigned operating characteristics of an inverter (e.g., INV), the controller will load software code to generate a PWM control signal pattern to operate the inverter-rectifier switching element to generate an AC output signal from the DC input signal. On the other hand, when the inverter-rectifier controller is assigned the operating characteristics of the rectifier (e.g., REC), the controller will load software code to generate PWM control signal patterns to operate the inverter-rectifier switching elements to rectify the AC input signal to a DC output signal.

Further, the bi-directional manager may provide power demand, power flow direction, select appropriate software code blocks, and assign characteristics to the sub-controllers or other controllers. The bi-directional manager may determine recoverable or non-recoverable errors based on which side the controller is located in the system and the operating characteristics the controller assumes for the components of the system. The operating characteristics may be assigned based on an expected power flow direction (e.g., V2G-vehicle-to-grid power flow or G2V grid-to-vehicle power flow). In addition, the bi-directional manager may determine the recovery time and/or pattern of these errors and/or clear the errors when they are recovered, thus eliminating the need for user intervention. The bi-directional manager may communicate with a user, a controller on the other side of the system (e.g., a bi-directional manager on the other side of the system).

The bi-directional manager may receive notification of the error from the component of the wireless power transfer system and may distribute the error message to other components of the wireless power transfer system directly through the bi-directional manager or after a callback request from the component.

The bi-directional manager may receive communications from components of the wireless power transfer system (e.g., via WiFi from components from the other side of the system). The bi-directional manager may implement callback requests from the components for messages related to the components, or may distribute messages to related components. The bi-directional manager may control (including dynamically control) the permissions of the components of the wireless power system to receive and transmit error and communication messages. The bi-directional manager may be responsible for controlling components of the wireless power transfer system during the transition phase, including handling any erroneous conduction due to changes in power transfer direction (both V2G transitions and G2V transitions). For example, the bi-directional manager may monitor the power supply for a drop, confirm that the power supply has been completely or partially turned off, and rank the components of the system (while assigning characteristics to them) to turn on.

As an example, a bi-directional manager on the GA controller receives a command to power up from idle, and the bi-directional manager can assign G2V characteristics to various controllers and hardware in the system. Upon receiving a communication to change the power transmission direction, the bidirectional manager communicates between the GA and the VA to change the power transmission direction. The bi-directional manager may be responsible for handling any errors due to changes in the direction of power transfer, including during power down in the first direction and power up in the second direction. Upon clearing the error, the bi-directional manager may assign the characteristic to the controller, for example, by selecting a subset of instructions from the non-transitory computer readable medium, or having the controller select the subset of instructions.

In some implementations, each controller of the system (e.g., a dedicated inverter-rectifier processor, or a dedicated TMN processor, or a dedicated transmitter or receiver processor) may include a bi-directional manager. The bi-directional manager may operate as a top level manager.

In general, assigning features to components/controllers may allow for modular, non-redundant components, codes, and memory, allowing for faster on-the-fly switching from G2V (grid-to-vehicle power flow) to V2G (vehicle-to-grid power flow) and back.

Fig. 17 depicts a flowchart of an exemplary bi-directional control process 1700 that may be performed in accordance with an implementation of the present invention. The example process 1700 may be implemented, for example, by an example wireless power transfer system disclosed herein. For example, process 1700 may be performed between a bi-directional manager of GA wireless-power transfer device 1600a and a bi-directional manager of VA wireless-power transfer device 1600 b. The process 1700 shows a divided master-side operation 1702 and slave-side operation 1704. Typically, the master-side operation 1702 is performed by the VA wireless power transmission device 1600b, while the slave-side operation 1704 is performed by the GA wireless power transmission device 1600 a. For example, VA (or device side) wireless power transfer device 1600b may typically be connected to a smaller or more limited capacity power source or load. Implementing VA wireless power transfer device 1600b as a master device may provide more precise control of bi-directional control process 1700 to prevent exceeding the possible operating lower limits of the VA-side system or its loads/sources. In some examples, the example process 1700 may be provided by one or more computer-executable programs executed using one or more computing devices, processors, or microcontrollers. For example, the example process 1700, or portions thereof, may be provided by one or more programs executed by control circuitry of the wireless power transfer apparatus 1600a, 1600 b.

The master device initiates a power flow transition within the wireless power system. Initiation may be prompted by user input, or in some implementations by an automatic power transition determination (1706) by the master device. For example, the master device may deviate the power flow based on various criteria including, but not limited to, the state of charge of the battery, time of day, and availability and/or demand of the grid. For example, VA wireless power transfer device 1600b may be configured to initiate a power flow reversal process if the connected battery is above a threshold charge level and a grid loss occurs. As another example, VA wireless power transfer device 1600b may be configured to initiate a power flow reversal process if the connected battery is above a threshold charge level and during a preset time of day. For example, VA wireless power transfer device 1600b may be configured to reverse power flow to provide supplemental power to the household during peak load periods of the power grid (e.g., periods of high demand and/or high energy prices such as at night). In some implementations, the slave device may determine when to initiate a power flow transition, but will perform the additional step of requesting initiation of a power flow transition from the master device.

The master device transmits an instruction to the slave device to reverse the direction of the power flow (1708). In response to these indications, the slave device reconfigures to operate in a power flow direction opposite the current operation (1710). For example, if the slave device is operating as a transmitter, the slave device will reconfigure operation as a receiver. If the slave device is operating as a receiver, the slave device will reconfigure operation as a transmitter. For example, the bi-directional manager of the slave device may coordinate the controller operation within the slave device to shut down power flow in the current direction by, for example, ensuring operation of the inverter-rectifier, switching the switch to turn off the load/power supply (as the case may be), toggling the bypass switch to dissipate residual current within the slave device, or a combination thereof.

The slave device assigns new operating characteristics according to the new flow direction (1712). For example, the bi-directional manager of the slave device assigns new operating characteristics to the various controllers within the slave device to accommodate the new direction of power flow. The bi-directional power manager may assign new operating characteristics by toggling a flag bit (tmn_side, described in more detail below) to indicate operation as a transmitter/inverter or as a receiver/inverter.

Each slave controller may reconfigure its respective operation in response to the new operating characteristic assignment. For example, the controller may load a control algorithm (e.g., a block of software code) to operate according to the new power flow direction. For example, the TMN controller may reset the TMN and load a control code to generate the appropriate TMN control signal for operation according to the new power flow direction. The TMN may need to adjust the set point (e.g., impedance value, impedance adjustment step size, and/or protection scheme) to accommodate power transmission in the new direction, or to provide for power rise in the new direction, or both. For example, the power flow in V2G mode is typically lower than in G2V mode, e.g., due to asymmetry between the GA-side resonator coil and the VA-side resonator coil and/or discharge constraints on the battery. Thus, instead of G2V mode, the TMN and/or inverter-rectifier set point may be different for operating in V2G mode.

The slave device (e.g., the inverter controller of the slave device) may control the inverter-rectifier operation according to the new operating characteristics (1714). For example, the inverter-rectifier controller may load an appropriate algorithm to generate the PWM control signal to operate as an inverter when the slave is a transmitter and as a rectifier when the slave is a receiver. Specific inverter and rectifier operations are described in more detail below with reference to fig. 18 and 19.

The slave sends a reply to the master indicating its reconfiguration status 1716. The master waits and/or resends the indication 1708 when the slave indicates that its reconfiguration is still in progress or stopped. The process 1700 may provide for safer and more robust operation by the master waiting for an acknowledgement that the slave has completed updating its operating characteristics. For example, this may prevent the start or reversal of power flow in the event that a non-matching characteristic is assigned to a slave or master. When the slave device indicates that its reconfiguration is complete, the master device reconfigures to operate in a power flow direction opposite to its current operation (1718). For example, if the master device is operating as a transmitter, the master device will be reconfigured to operate as a receiver. If the master device is operating as a receiver, the master device will be reconfigured to operate as a transmitter. For example, the bi-directional manager of the master device may coordinate the controller operation within the slave device to shut down power flow in the current direction by, for example, ensuring operation of the inverter-rectifier, switching the switch to turn off the load/power supply (as the case may be), toggling the bypass switch to dissipate residual current within the slave device, or a combination thereof.

The master device assigns a new operating characteristic based on the new flow direction 1720. For example, the bi-directional manager of the master device assigns new operating characteristics to each controller within the master device to accommodate the new direction of power flow. The bi-directional (power) manager may assign new operating characteristics by toggling a flag bit (tmn_side, described in more detail below) to indicate operation as a transmitter/inverter or as a receiver/inverter.

Responsive to the new operating characteristic assignment, each master device controller may reconfigure its respective operation. For example, the controller may load a control algorithm (e.g., a block of software code) to operate according to the new power flow direction. For example, the TMN controller may reset the TMN and load a control code to generate the appropriate TMN control signal for operation according to the new power flow direction. The TMN may need to adjust the set point (e.g., impedance value and/or protection scheme) to accommodate power transmission in the new direction, or to provide for power rise in the new direction, or both.

The master device (e.g., an inverter controller of the master device) may control operation of the inverter-rectifier according to the new operating characteristics (1722). For example, the inverter-rectifier controller may load an appropriate algorithm to generate the PWM control signal to operate as an inverter when the slave is a transmitter and as a rectifier when the slave is a receiver. In some implementations, the TMN controller in the master device may control the TMN according to the new operating characteristics. For example, a TMN controller on a master device may load an appropriate control algorithm to generate the TMN adjustment signal to operate as a load coupled TMN in a first direction or as a power coupled TMN in a second direction.

Fig. 18 depicts a schematic 1800 of an exemplary inverter-rectifier 1602, and a timing diagram 1802 illustrating operation of the inverter-rectifier in an inverter mode of operation. Schematic 1800 shows a phase-shifted full-bridge inverter. The inverter bridge circuit employs active switching elements Q1, Q2, Q3, and Q4, which may be, for example, MOSFETs, transistors, FETs, IGBTs, or the like.

Timing diagram 1802 shows a switchDrive signal patterns of Q1, Q2, Q3, and Q4. These switches are grouped into two branches: branch a (Q1, Q3) and branch B (Q2, Q4). The corresponding switches in each leg are alternately switched on and off by the respective PWM control signals. The on-time and the off-time are shown for each gate drive signal G1, G2, G3, and G4. Dead time t shown _d When both gate drivers of the same leg are off. The off-time may be greater than the on-time for each drive signal within the period Ts.

The delay time tps between the branch line a (Q1 and Q3) and the branch line B (Q2 and Q4) is referred to as a phase shift angle when expressed in degrees, and is a means for adjusting the overall power from the inverter-rectifier when operating as an inverter. At start-up, from inverter-rectifier terminal V _A And V _B Output power V of (2) _AB (t) may have a duty cycle of 11% (branch phase shift angle θps=20 degrees). At maximum power, VAB (t) may be at a duty cycle of 100% (spur phase θps=180 degrees). By adjusting the delay time t between the branch APWM signal and the branch B PWM signal _PS To control the overall power output.

Although a full-bridge inverter is shown, in some implementations, the inverter-rectifier switches may be arranged in a half-bridge configuration. In some implementations, the inverter-rectifier may implement zero voltage switching operations to ensure that the switches operate when the voltage across the inverter-rectifier is at or near zero.

Fig. 19 depicts a schematic 1900 of an exemplary inverter-rectifier, and a timing diagram 1902 showing operation of the inverter-rectifier 1602 in a rectifier mode of operation. Fig. 19 illustrates synchronous rectifier operation using the same switches as shown in fig. 18. The gate drive signals (G1, G2, G3, G4) corresponding to the respective switches (Q1, Q2, Q3, Q4) are shown in timing chart 1902. Although a zero current switching operation is shown, zero Voltage Switching (ZVS) naturally follows the operation and may be used in some implementations. However, ZVS switching in active rectification mode is not shown in the figure.

The synchronous rectifier may receive zero crossings of the I3s current (shown as I3d or I3s in fig. 16) andand creates timing for synchronous rectification (zero current switching) as shown in timing diagram 1902. In the rectifier mode, the inverter-rectifier 1602 rectifies the AC input signal to a DC output signal by alternately switching on the corresponding pair of switches (Q1/Q4 and Q2/Q3). For example, an inverter-rectifier controller (e.g., inverter/protection and control circuit 176) may receive I3D or I3s current and/or phase measurements from a current or phase sensor (such as phase sensor 142 or current sensor 150 shown in fig. 1C, 1D, 5A, and 6A, etc.). The switches Q1, Q2, Q3, and Q4 may be opened at zero current (or near zero current) to the input of the inverter-rectifier 1602, and may allow an appropriate time delay t before the next pair of switches (e.g., Q1 and Q4 or Q2 and Q3) is operated _d Through the process. This can prevent power loss within the switch. In some implementations, the system may adjust the time delay as needed.

In some implementations, during start-up, the inverter-rectifier does not begin switching until the measured input power exceeds a threshold that ensures continuous conduction of the I3 current. The threshold value may be, for example, between 2kW and 4kW, and/or between 20-40% of the target power. During low power operation below the threshold input power value, the input AC signal may contain noise, which may lead to inaccurate zero crossing detection and may cause large transients resulting in inaccurate switching. For example, the I3 current used to generate PWM synchronization may be intermittent and noisy, which results in inaccurate zero crossing detection and may cause large transients or even destructive shorts of the power stage. Instead, rectification may be performed passively when the power is made below a threshold by conduction via the body diode of the switch. In these implementations, switching operations above the threshold input power value may be considered active rectification mode and body diode conduction below the threshold input power value may be considered passive rectification mode.

Fig. 20 depicts a flowchart of example protection operations 2000 that may be performed in accordance with implementations of the invention. For example, the example operations 2000 may be implemented, for example, by example wireless power transfer apparatus (e.g., 1600a, 1600 b) disclosed herein. For example, operation 2000 may be performed by a control circuit of a wireless power transfer apparatus. For example, operation 2000 may be performed by an inverter-rectifier controller and an inverter protection circuit, such as the logic circuit shown in fig. 22A. In some implementations, the operations 2000 may be performed in a different order than that shown in fig. 20. Further, the protection operation 2000 will be described with reference to fig. 20 to 22B.

Fig. 21 is a diagram 2100 of a bidirectional wireless power transfer device showing the arrangement of a fault sensing circuit. The diagram 2100 shows the locations of various fault signals described below measured in a wireless power transmission device. The fault signals shown include OV_CMD, VOUT_ I, VOUT _ V, OVP, WIFI _FLT, and TMN_FLT. Fig. 22A is a block diagram 2200 of exemplary protection logic for a bi-directional wireless power transfer device, and fig. 22B illustrates a logic truth table associated with the exemplary protection logic shown in fig. 22A.

In fig. 22A, the logic circuit 2210 evaluates a fault during operation characteristics as an inverter, and the logic circuit 2212 evaluates a fault during operation characteristics as a rectifier. The logic 2220 is capable of performing certain protection operations that are specific to the operating characteristics of the rectifier. The protection logic shown is exemplary and may be simplified or further extended and may be implemented in hardware or software. Logic may be active high or active low and may appropriately negate the output of previous logic.

Logic 2210 evaluates various system faults including DESAT_flg, UVLO_flg, WIFI_FLT, TMN_FLT, and OC_FLT. The desat_flg and uvlo_flg are flags used in some implementations to represent proper operation of the rectifier-inverter switches. For example, both may represent a desaturation condition in an IGBT switch. Wifi_flt indicates that a WIFI failure has occurred. For example, if a fault occurs in one wireless power transfer device (e.g., receiver), WIFI FLT may communicate the fault to another device (e.g., transmitter) to allow the device to perform appropriate operations to maintain the security of the system as a whole. Tmn_flt is discussed above and represents a fault (e.g., TMN over-current and/or under-current fault) occurring at the TMN. Oc_flt indicates that an over-current fault occurred at the inverter-rectifier. Logic 2220 typically evaluates the same faults as logic 2210, but may also include additional fault signals: OV_FLT. Ov_flt may represent an overvoltage fault at a wireless power device. For example, as discussed below, the OV FLT may be used as an indication of a load-off fault when operating as a rectifier.

The control circuit detects a fault condition (2002). For example, the control circuit receives one of the fault signals shown in fig. 21, 22A, and 22B. For example, truth table 2 of fig. 22B shows the logical combinations that generate the inverter enable signal (inv_enbl). When the INV_ENBL signal is high, the PWM signal passes through NAND gate 2202 of FIG. 22A. However, if any fault in truth table 2 is detected (e.g., fault signal goes low), the inv_enbl signal is disabled (low), which indicates that a fault condition exists.

The control circuit identifies an operating characteristic and a hardware configuration of the wireless power transfer device (2004). For example, a specific protection action to be performed by the control circuit is performed based on the operation characteristics and hardware configuration of the wireless power transmission device. As discussed above, the operating characteristics may be represented by a flag, such as the timside flag shown in fig. 22A, and the truth table of fig. 22B. The timside flag indicates whether the wireless power transfer device is operating as a receiver or a transmitter. Referring to truth tables 1 and 4, the values of tmn_side correspond to the operating characteristics of INV at a value of 0 (e.g., as operation of inverter and transmitter) and REC at a value of 1 (e.g., as operation of rectifier and receiver). The hardware configuration refers to a flag indicating whether the control circuit is controlling a wireless power transmission device configured as a GA-side device (e.g., a grid connection system) or a VA-side device (e.g., a device connection system). The hardware configuration indicates to the control circuitry which protection actions can be performed based on the operating configuration and restrictions of the hardware. For example, the GA side resonator and the TMN may be configured in a different manner from the VA side resonator and the TMN. Thus, the GA-side resonator and TMN may have different (e.g., generally higher) operating limits than the VA-side components, and may require different protection actions. Referring to truth table 1 and truth table 4, the values of invrec_side represent: when the value is 0, the wireless power transmission device is configured as a GA-side device, and when the value is 1, the wireless power transmission device is configured as a VA-side device.

The control circuit identifies a protection operation for protecting the wireless power transfer device from the fault condition based on the identified operating characteristics and hardware configuration (2006). The control circuit controls the operation of the wireless power transmission device according to the protection operation (2008). For example, as shown in truth table 1, if the wireless power transfer device is operating as an inverter (e.g., a power transmitter) (tmn_side=0) and is configured as GA or VA (invrec_side=0 or 1), then in the event of any failure that disables inv_enbl, the PWM control signal for the inverter-rectifier will be overridden and forced to zero, thereby turning off the inverter-rectifier. In addition, components of IMN 103 may be shorted to dissipate residual current in the resonator coil. For example, the switch SW1 1608 of fig. 16 may be closed to dissipate any residual resonator current. In some implementations, if the hardware configuration of the wireless power transfer device indicates that the device is configured as a GA-side device and the operating characteristic is an inverter (power transmitter), the protecting operation may further include switching in a resistor configured to dissipate excess power from the inverter-rectifier. For example, the control circuit may cause switch SW2 1610 to close to dissipate excess power from power source 1604 through resistor R1 1612 shown in fig. 16. In some implementations, the resistor may be accessed only for a particular fault type. For example, if the device is configured as a GA and is operating as an inverter, the resistor may be switched in for an over-current fault. If the device is configured as a GA and is operating as a rectifier, the resistor may be switched in for overvoltage faults.

If the operating characteristics indicate that the wireless power transfer device is functioning as a rectifier (power receiver) (e.g., tmn_side=1) and fails (e.g., as indicated by inv_enbl going low in truth table 1), the control circuit may cause the inverter-rectifier to turn off by overriding the PWM control signal. In some implementations, the control circuit may also short circuit components of the matching network to dissipate residual current in the resonator coil by, for example, closing switch SW1 1608 of fig. 16.

As shown in truth tables 1 and 4, if the operating characteristics indicate that the wireless power transfer device is functioning as a rectifier (power receiver) (e.g., tmn_side=1) and the hardware is configured to VA (invrec_side=1) when a fault occurs (e.g., as shown by rec_flts going high), the control circuit may turn off the inverter-rectifier (e.g., gate drive signals G3, g4=1) by overriding the PWM control signal to short-circuit the AC SIDE of the inverter-rectifier. For example, fig. 23 shows a series of graphs 2300 depicting operation of an inverter-rectifier in response to a load being disconnected when assigned a rectifier operating characteristic. Graph 2300 shows switching of a grid-tie inverter in the presence of grid disconnection, or switching of a vehicle inverter in the presence of battery disconnection (in the case where the battery is a load). In graph 2302, the inverter-rectifier is operating normally as a rectifier. In fig. 2304, load disconnection occurs, which causes a current to be sent via the capacitor Cdc wiring. The output capacitor (decoupling capacitor Cdc) operates as an overvoltage/load disconnection sensor as described above, but it should be understood that other sensing components may be employed. As discussed above, upon detecting that the load is off and recognizing that the inverter-rectifier is operating as a rectifier and has a hardware configuration as VA, the control circuit shorts the AC side of the inverter by turning on transistors Q3 and Q4 and opens the DC side by turning off transistors Q1 and Q2 (fig. 2306).

In some implementations, as discussed above with reference to fig. 14, the AC side of the inverter-rectifier is shorted in response to a VA-side fault (such as a load disconnection, etc.) during operation as a rectifier (power receiver), which causes a corresponding fault to occur on the associated GA-device side by initiating an over-current and/or over-voltage transient at the GA-device side. Initiating GA-side shutdown in this manner may provide a faster system-wide fault response than having the fault code pass through the communication link. Such as where the communication link fails or experiences a slow connection (e.g., increased noise or bit errors).

In some implementations, assertion of the rec_flts also causes assertion of the oc_cmd signal. This signal drives switch 2102 in fig. 21, which is switched in to assist in power dissipation.

In some implementations, in the event of grid disconnection (e.g., when the hardware is configured as a GA), the control circuit may turn off the inverter by turning off all of the transistors Q1-Q4. The signal may also directly drive a switch that shorts out components of the impedance matching network, such as SW1 1608 of fig. 16.

In some implementations, the wireless power transfer apparatus may include a load disconnect sensor. For example, the load disconnection can be detected by an overvoltage or an undercurrent state of the output (load side) of the inverter-rectifier when operating as a rectifier. For example, a VA-side device operating as a receiver may detect a load disconnection by receiving an overvoltage fault, an undercurrent fault, or both. In response, the control and protection circuitry in the VA-side device may cause the inverter-rectifier to turn off by shorting two or more rectifier protection switches (e.g., Q3 and Q4 of fig. 21). Each protection switch may also be connected to a diode to include a body diode. The control and protection circuitry in the VA-side device may short circuit the protection switch connected to the TMN to short circuit (and protect) the TMN. Shorting the inverter-rectifier may result in a corresponding over-current transient on the GA-side device. In response to an over-current fault, the GA-side device (operating as a transmitter) may turn its inverter-rectifier off and short its TMN. The current and voltage response to a load off event is described in more detail above with reference to fig. 14.

Referring to fig. 16, in some implementations, the resonator coil L1s may be designed to accommodate higher currents in the off-load condition. However, in implementations where excess coil current/voltage may cause arcing or heating at the coil L1s, methods such as shorting parallel TMN elements (such as C2, etc.) and/or switching in resistors (such as R1, etc.) may be important.

In some implementations, a communication link (e.g., a WiFi link) may be used to protect the system from failure. For example, if a load disconnection occurs, the receiver may notify the transmitter of the fault via the communication link. During low power operation, the shutdown operation of the receiver as described above may not cause a sufficiently large transient current in the transmitter, resulting in a corresponding over-current fault. Thus, a failure to communicate over the communication link may be used to trigger a protective action of the transmitter. For example, the receiver side, upon detecting a fault, such as a load disconnection (overvoltage) or the like, communicates fault information to the transmitter side via WiFi or other out-of-band communication, thereby requiring the source side inverter to be turned off. At the same time, protection mechanisms on the receiver side, such as switching in resistor R1 and/or shorting out components of the TMN and/or IMN, may allow for reduced coil current until the transmitter side inverter is turned off.

In some implementations, upon detecting an overvoltage condition (e.g., due to a load being off), upon detecting a rise in V (v_bus+) in the output capacitor, a resistor R1 in parallel with the load may be accessed and/or a capacitor C2 in parallel with the load may be shorted by the controller. Switching in parallel resistor R1 may allow some or all of the current to circulate in the resistor and shorting capacitor C2 may reduce the excess coil current at the load side coil. This may ensure system security until an error message containing information about the failure can be communicated from the load side to the source side. The error message may include a command to turn off the source side inverter, or the error message may be interpreted by the source side inverter as a command to turn off. In some implementations (e.g., for an 11kW system), resistor R1 may be sized according to the power rating and communication channel delay (from load side to source side) time of the system and/or the time required for the source side to turn off the power supply.

In some implementations, a load short circuit fault may be detected by an undervoltage fault at the output of the rectifier. For example, a VA-side device operating as a receiver (e.g., an inverter-rectifier operating as a rectifier) may detect a load short circuit condition when the output voltage at the rectifier output drops. In response, the control and protection circuitry of the VA-side device may short circuit the protection switch of the TMN connected to the VA-side device. This may lead to corresponding current transients in the GA-side device operating as a transmitter. In response, control and protection circuitry on the GA-side device may detect an over-current condition. In response, the control and protection circuitry on the GA-side device may short circuit the protection switch connected to the TMN on the GA-side device.

In the present invention, certain circuits or system components, such as capacitors, inductors, resistors, and the like, are referred to as circuit "components" or "elements. The invention may also refer to these components or series or parallel combinations of components as elements, networks, topologies, circuits, and the like. More generally, however, where a single component or a particular network of components is described herein, it should be understood that alternative embodiments may include networks of elements and/or alternative networks, etc.

As used herein, the term "directly connected" or "directly connected" refers to a direct connection between two elements, where no intervening active elements are connected between the elements. The term "electrically connected" or "electrically connected" refers to an electrical connection between two elements, where the elements are connected such that the elements have a common potential. In addition, the connection between the terminals of the first component and the second component means that there is a path between the first component and the terminal that does not pass through the second component.

As used herein, the term "connected" when referring to a circuit or system component is used to describe an appropriate, wired or wireless, direct or indirect connection between one or more components via which information or signals may be transferred from one component to another component. Furthermore, the term "connected" when used in reference to an electrical circuit assembly or electrical circuit, generally refers to "electrically connected" unless stated otherwise.

Implementations of the subject matter and operations described in this specification can be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed herein and their structural equivalents, or in combinations of one or more of them. Implementations of the subject matter described in this specification can be implemented using one or more computer programs, i.e., one or more modules of computer program instructions, encoded on a computer storage medium for execution by, or to control the operation of, data processing apparatus. Alternatively or additionally, the program instructions may be encoded on a manually-generated propagated signal (e.g., a machine-generated electrical, optical, or electromagnetic signal generated to encode information for transmission to suitable receiver apparatus) for execution by data processing apparatus. The computer storage medium may be or include a computer readable storage device, a computer readable memory board, a random or serial access memory array or device, or a combination of one or more of them. Furthermore, although the computer storage medium is not a propagated signal, the computer storage medium may be a source or destination of computer program instructions encoded in an artificially generated propagated signal. Computer storage media may also be or be included in one or more separate physical components or media (e.g., a plurality of CDs, discs, or other storage devices).

The operations described in this specification may be implemented as operations performed by a data processing apparatus on data stored on one or more readable storage devices or received from other sources.

The term "data processing apparatus" includes all types of apparatus, devices, and machines for processing data, including, for example, a programmable processor, a computer, a system on a chip, or a plurality of programmable processors, a plurality of computers, a plurality of systems on a chip, or a combination of the foregoing. The device may comprise a dedicated logic circuit, such as an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit). In addition to hardware, the apparatus may include code that creates an execution environment for the computer program in question, such as code that constitutes processor firmware, a protocol stack, a database management system, an operating system, a cross-platform runtime environment, a virtual machine, or a combination of one or more of them. Devices and execution environments may implement a variety of different computing model infrastructures, such as web services, distributed computing infrastructures, and grid computing infrastructures.

A computer program (also known as a program, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, declarative languages, or procedural languages, and it can be deployed in any form, including as a stand-alone program or as a module, suitable for use in a computing environment. The computer program may, but need not, correspond to a file in a file system. The program may be stored in the following file: a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), a single file dedicated to the program in question, or multiple coordinated files (e.g., files that store one or more modules, sub-programs, or portions of code). A computer program can be deployed to be executed on one computer or on multiple computers at one site or distributed across multiple sites and interconnected by a communication network.

The processes and logic flows described in this specification can be performed by one or more programmable processors executing one or more computer programs to perform actions by operating on input data and generating output. The processes and logic flows can also be implemented by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application-specific integrated circuit).

Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer. Generally, a processor will receive instructions and data from a read-only memory or a random access memory or both. Elements of a computer include a processor for performing actions in accordance with instructions and one or more memory devices for storing instructions and data. Typically, a computer will also include, or be operatively connected to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto-optical disks, or optical disks. However, the computer does not have to have these devices. Further, the computer may be embedded in a wireless power transmitter or receiver or another device that is wirelessly charged or powered, such as the following: a vehicle, a mobile phone, a Personal Digital Assistant (PDA), a mobile audio or video player, a game console, or a Global Positioning System (GPS) receiver, just to name a few. Suitable means for storing computer program instructions and data include all forms of non-volatile memory, media and memory devices, including by way of example the following: semiconductor memory devices such as EPROM, EEPROM, and flash memory devices; magnetic disks such as internal hard disks or removable disks; magneto-optical disk; CD-ROM discs and DVD-ROM discs. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.

While this specification contains many specific implementation details, these should not be construed as limitations on the scope of the invention or of any implementation that may be claimed, but rather as descriptions of features specific to particular implementations. The specific features described in this specification in the context of separate implementations may also be combined in a single implementation. Conversely, various features that are described in the context of a single implementation can also be implemented in multiple implementations separately or in any suitable subcombination. Furthermore, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.

Also, although the operations are illustrated in the drawings in a particular order, this should not be understood as requiring that the operations be performed in the particular order or sequence illustrated, or that all illustrated operations be performed, in order to achieve desirable results. In certain situations, multitasking and parallel processing may be advantageous. Moreover, the separation of various system components in the implementations described above should not be understood as requiring such separation in all implementations, and it should be understood that the described program components and systems can generally be integrated into a single software product or packaged into multiple software products.

Claims

1. A protection system for a wireless power transfer system, the protection system comprising:

a differential voltage sensing circuit disposed within the wireless power transfer system to measure a rate of change of a voltage difference between portions of the impedance matching network and to generate a first signal representative of the rate of change of the voltage difference;

a first current sensing circuit arranged to measure a first current and to generate a second signal representative of the first current, the first current passing through the impedance matching network;

a second current sensing circuit connected to the differential voltage sensing circuit and the first current sensing circuit, the second current sensing circuit configured to calculate a second current based on the first signal and the second signal and generate a third signal representative of the second current, the second current passing through a resonator coil connected to the wireless power transfer system; and

a fault protection circuit connected to respective output terminals of the first and second current sensing circuits, the fault protection circuit configured to bypass a tunable matching network, TMN, in response to an amplitude of the second signal or an amplitude of the third signal exceeding a respective threshold.

2. The protection system of claim 1, wherein the differential voltage sensing circuit is connected to the first current sensing circuit, and the differential voltage sensing circuit is configured to scale the first signal in response to the second signal.

3. The protection system of claim 1, wherein the differential voltage sensing circuit comprises an amplification stage comprising a unity gain amplifier.

4. The protection system of claim 3, wherein the unity gain amplifier is configured to provide the first signal as a single-ended voltage signal.

5. A protection system according to claim 3, wherein the differential voltage sensing circuit is connected to the first current sensing circuit, and the differential voltage sensing circuit is arranged to apply the second signal to the unity gain amplifier to scale the first signal in response to the second signal.

6. A protection system according to claim 3, wherein the differential voltage sensing circuit comprises a differentiator circuit.

7. The protection system of claim 3, wherein the second current sensing circuit comprises a differential circuit configured to generate the third signal by subtracting the first signal from the second signal.

8. The protection system of claim 1, wherein the fault protection circuit is further configured to bypass the tunable matching network by latching a control signal for the TMN bypass transistor in an asserted state.

9. The protection system of claim 8, wherein the fault protection circuit is further configured to delay latching the control signal until the voltage across the TMN is below a TMN voltage threshold.

10. The protection system of claim 1, wherein the fault protection circuit is further configured to cause an inverter-rectifier to shut down in response to the magnitude of the second signal or the magnitude of the third signal exceeding a respective threshold.

11. A wireless power transfer system, comprising:

a resonator coil;

an impedance matching network connected to the resonator coil; and

a sensor network, comprising:

a differential voltage sensing circuit arranged to measure a rate of change of a voltage difference between portions of the impedance matching network and to generate a first signal representative of the rate of change of the voltage difference;