CN110752194B - 微型粘合结构和其形成方法 - Google Patents

微型粘合结构和其形成方法 Download PDF

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Publication number
CN110752194B
CN110752194B CN201910606173.0A CN201910606173A CN110752194B CN 110752194 B CN110752194 B CN 110752194B CN 201910606173 A CN201910606173 A CN 201910606173A CN 110752194 B CN110752194 B CN 110752194B
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conductive pad
adhesive layer
layer
micro
substrate
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CN110752194A (zh
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陈立宜
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Mikro Mesa Technology Co Ltd
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Mikro Mesa Technology Co Ltd
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Abstract

本发明是微型粘合结构和其形成方法。该微型粘合结构包含基板、导电垫、粘合层、微型元件和扩散粘合部分。导电垫设置在基板上。粘合层位于导电垫上。微型元件位于粘合层上。扩散粘合部分位于粘合层和导电垫之间并电性连接粘合层和导电垫。扩散粘合部分是由粘合层的至少一部分元素和导电垫的至少一部分元素所组成。多个空穴位于粘合层和导电垫之间，这些空穴的其中一个是由扩散粘合部分以及导电垫和粘合层当中的至少一个所界定。本发明所提出的微型粘合结构让粘合层的电阻显著减少，从而可降低粘合于粘合层上的微型元件于操作时的能量消耗，此外，通过较低温度的间隙扩散而非熔化界面所形成的粘合，让微型元件的定位精度不会变差，品质亦得以维持。

Description

微型粘合结构和其形成方法
技术领域
本发明是有关于微型粘合结构和形成微型粘合结构的分法。
背景技术
此处的陈述仅提供与本发明有关的背景信息，而不必然地构成现有技术。
近年来，微型元件在各类应用中逐渐蓬勃发展。在关于微型元件的所有科技方面，转移过程对于微型元件商品化而言是其中一个最具挑战性的工作。转移过程的其中一个重要议题为将粘合微型元件粘合至基板上。
发明内容
本发明的目的在于克服现有技术的缺陷，而提出一种微型粘合结构和其形成方法，具有较佳的定位精度。
本发明的目的及解决其技术问题是采用以下技术方案来实现的。
本发明的一些实施方式公开了一种微型粘合结构，微型粘合结构包含基板、导电垫、粘合层、微型元件和扩散粘合部分。根据本发明的一些实施例，微型粘合结构包含基板、导电垫、粘合层、微型元件和扩散粘合部分。导电垫设置在基板上。粘合层位于导电垫上。微型元件位于粘合层上。扩散粘合部分位于粘合层和导电垫之间并电性连接粘合层和导电垫。扩散粘合部分是由粘合层的至少一部分元素和导电垫的至少一部分元素所组成。多个空穴位于粘合层和导电垫之间，这些空穴的其中一个是由扩散粘合部分以及导电垫和粘合层当中的至少一个所界定。
根据本发明的一实施例，扩散粘合部分是由加热导电垫和粘合层的至少其中之一所形成。
根据本发明的一实施例，扩散粘合部分是由施加一外部压力至导电垫和粘合层所形成。
根据本发明的一实施例，扩散粘合部分是形成于具有还原气体的环境中。
根据本发明的一实施例，导电垫和粘合层的其中之一包含铜、锡、钛和铟当中的一个，铜、锡、钛和铟当中的一个占导电垫和粘合层之一的原子数的一半以上。
根据本发明的一实施例，从导电垫扩散至粘合层的扩散系数大于从粘合层扩散至导电垫的扩散系数。
根据本发明的一实施例，更包含第一粘着层，设置在导电垫和基板之间。
根据本发明的一实施例，更包含第二粘着层，设置在微型元件和粘合层之间。
根据本发明的一实施例，更包含至少一个电极，设置在粘合层和微型元件之间。
根据本发明的一实施例，微型元件的侧向长度等于或小于50微米。
根据本发明的一实施例，空穴的垂直长度等于或小于200纳米。
根据本发明的一实施例，导电垫和粘合层其中之一的表面粗糙度小于或等于80纳米。
根据本发明的一实施例，导电垫的面积小于或等于2500平方微米。
根据本发明的一实施例，粘合层为图案化粘合层，其包含至少两个独立部分，这些独立部分彼此电性隔离。
根据本发明的一实施例，微型元件包含第一型半导体层、主动层和二型半导体层，主动层位于第一型半导体层上，第二型半导体层位于主动层上。
根据本发明的一实施例，更包含填充材料，位于基板上并接触导电垫、粘合层和微型元件，其中填充材料相对于基板的高度大于主动层相对于基板的高度，且小于微型元件相对于基板的高度。
根据本发明的一实施例，粘合层的厚度范围小于或等于10微米。
根据本发明的一实施例，粘合层的厚度范围在约0.2微米至约2微米之间。
本发明的一些实施例公开了一种形成微型粘合结构的方法。此方法包含：形成粘合层于微型元件上；准备具有导电垫于其上的基板；形成液体层于导电垫上；放置微型元件至基板上方并使微型元件接触液体层；以及加热粘合层和导电垫当中的至少一个至低于熔点的温度，此熔点为粘合层和导电垫当中熔点较低者，加热速率小于或等于每分钟12摄氏度以逐渐蒸发液体层，使得粘合层接触导电垫并在粘合层和导电垫之间形成多个空穴，且间隙扩散发生在粘合层和导电垫之间以形成扩散粘合部分。
根据本发明的一实施例，更包含施加外部压力至导电垫和粘合层，使得导电垫和粘合层受到压缩压力以增加导电垫和粘合层之间的粘合强度。
根据本发明的一实施例，扩散粘合部分形成于具有一还原气体的环境内。
本发明与现有技术相比具有明显的优点和有益效果。借由上述技术方案，本发明的微型粘合结构和形成微型粘合结构的方法可让粘合层的电阻显著减少，从而可降低粘合于粘合层上的微型元件于操作时的能量消耗。此外，由于粘合层和导电垫之间的粘合是通过较低温度的间隙扩散完成，由于焊料没有熔化，因此基板上微型元件的定位精度不会变差，且微型元件和其它部件的品质在粘合后得以维持。
上述说明仅是本发明技术方案的概述，为了能够更清楚了解本发明的技术手段，而可依照说明书的内容予以实施，并且为了让本发明的上述和其他目的、特征和优点能够更明显易懂，以下特举较佳实施例，并配合附图，详细说明如下。
附图说明
图1绘示本发明的一些实施例中微型粘合结构的剖面示意图。
图2A绘示本发明的一些实施例中图1所示的一部分的微型粘合部分的放大剖面示意图。
图2B绘示本发明的一些实施例中图1所示的一部分的微型粘合部分的放大剖面示意图。
图2C绘示本发明的一些实施例中图1所示的一部分的微型粘合部分的放大剖面示意图。
图3A绘示根据本发明的一些实施例中聚焦在一个微型元件和一部分该微型元件粘合于其上的基板的放大剖面示意图。
图3B绘示根据本发明的一些实施例中聚焦在一个微型元件和一部分该微型元件粘合于其上的基板的放大剖面示意图。
图4绘示根据本发明的一些实施例中粘合微型元件至基板的方法的流程示意图。
图5A绘示根据本发明的一些实施例中图4的方法其中一个中间步骤的剖面示意图。
图5B绘示根据本发明的一些实施例中图4的方法其中一个中间步骤的剖面示意图。
图5C绘示根据本发明的一些实施例中图4的方法其中一个中间步骤的剖面示意图。
图5D绘示根据本发明的一些实施例中的方法中可选的中间步骤的剖面示意图。
【主要元件符号说明】
100：微型粘合结构 110：基板
112：填充材料 120：导电垫
130：粘合层 140：微型元件
142：第一型半导体层 144：第二型半导体层
146：主动层 150：扩散粘合部分
1502：第一部分 1504：第二部分
160：空穴 170：第一粘着层
180：第二粘着层 190：电极
200：方法 210、220、230、240、250：作业
510：液体层 B：微型粘合部分
L：垂直长度 L1：侧向长度
H、H1、H2：高度 T：加热步骤
G：还原气体 P：外部压力
具体实施方式
为更进一步阐述本发明为达成预定发明目的所采取的技术手段及功效，以下结合附图及较佳实施例，对依据本发明提出的微型粘合结构和其形成方法，其具体实施方式、结构、方法、步骤、特征及其功效，详细说明如后。
有关本发明的前述及其他技术内容、特点及功效，在以下配合参考附图的较佳实施例的详细说明中将可清楚呈现。通过具体实施方式的说明，当可对本发明为达成预定目的所采取的技术手段及功效更加深入且具体的了解，然而所附附图仅是提供参考与说明之用，并非用来对本发明加以限制。
为简化附图，一些现有已知惯用的结构与元件在附图中将以简单示意的方式绘示。并且，除非有其他表示，在不同附图中相同的元件符号可视为相对应的元件。这些附图的绘示是为了清楚表达这些实施方式中各元件之间的连接关系，并非绘示各元件的实际尺寸。
在一方面，本发明的实施例提供一种微型粘合结构100。虽然在以下的公开内容中描述的大多数元件名称是使用单数名词，但是根据附图或实际应用，这些元件名称也可以是多个。请参考图1和图2A至图2C。图1为本发明的一些实施例中微型粘合结构100的剖面示意图。图2A为本发明的一些实施例中图1所示之一部分的微型粘合部分B的放大剖面示意图。图2B为本发明的一些实施例中图1所示之一部分的微型粘合部分B的放大剖面示意图。图2C为本发明的一些实施例中图1所示之一部分的微型粘合部分B的放大剖面示意图。在一些实施例中，微型粘合结构100包含基板110、导电垫120、粘合层130、微型元件140和扩散粘合部分150。导电垫120设置在基板110上。粘合层130位于导电垫120上。微型元件140位于粘合层130上。扩散粘合部分150位于粘合层130和导电垫120之间并电性连接粘合层130和导电垫120。
在一些实施例中，导电垫120和粘合层130的其中之一包含铜(copper,Cu)、锡(tin,Sn)、钛(titanium,Ti)和铟(indium,In)当中的一个，且前述铜、锡、钛和铟当中的一个占前述导电垫120和粘合层130的其中之一的半数以上的原子数目。在一些实施例中，导电垫120包含贵金属，且贵金属占导电垫120半数以上的原子数目。贵金属可包含铜，但并不限于此。其它贵金属亦在本发明的范围内，像是钌(ruthenium,Ru)、铑(rhodium,Rh)、钯(palladium,Pd)、银(silver,Ag)、铂(platinum,Pt)和金(gold,Au)。在一些实施例中，导电垫120包含镍(nickel,Ni)。在一些实施例中，导电垫120包含铜和镍的组合，铜占了导电垫120半数以上的原子数目。选择导电垫120的主要材料的方法可为判断该待选材料(例如，铜)扩散至粘合层130中的另一材料的扩散系数于摄氏190度下是否大于或等于数量级10-13(m2/s)，但选材方法并不以此为限。
在一些实施例中，粘合层130包含焊料，且焊料占了粘合层130半数以上的原子数目。焊料可包含锡、铅(lead,Pb)、铋(bismuth,Bi)、锡和铅的组合、锡和铋的组合、铋和铅的组合以及锡、铋和铅的组合，但不以此为限。在一些实施例中，锡占了粘合层130半数以上的原子数目。在一些实施例中，导电垫120和粘合层130两者其中之一的表面粗糙度小于或等于80纳米。在一些实施例中，从导电垫120扩散至粘合层130的扩散系数大于从粘合层130扩散至导电垫120的扩散系数，使得从导电垫120扩散至粘合层130的原子多于从粘合层130扩散至导电垫120的原子。举例而言，在摄氏190度下从铜扩散到锡的扩散系数为4.49x10-11(m2/s)，而在摄氏190度下从锡扩散到铜的扩散系数为3.10x 10-25(m2/s)(参阅例如，TableI of Z.Mei,A.J.Sunwoo and J.W.Morris,Jr.,Metall.Trans.A 23A,857(1992))。因此，铜较能趋向于透过间隙扩散而扩散至锡中。虽然间隙扩散可以是铜扩散至锡的主要机制，亦可有其它扩散机制发生，例如空位扩散。举例而言，锡扩散进入铜的空缺，但不以此为限。其中铜的空缺是由于前述的间隙扩散所造成的。
图1中一部分的微型粘合部分B的放大视图显示于图2A、图2B和图2C中。扩散粘合部分150位于粘合层130和导电垫120之间并电性连接粘合层130和导电垫120。扩散粘合部分150是由粘合层130的至少一部分元素和导电垫120的至少一部分元素所组成。多个空穴160位于粘合层130和导电垫120之间，其中一个空穴160是由扩散粘合部分150以及导电垫120和粘合层130当中的至少一个所界定。
在一些实施例中，扩散粘合部分150具有第一部分1502和第二部分1504，分别与导电垫120和粘合层130接触。在一些实施例中，第二部分1504的体积大于第一部分1502的体积。在一些实施例中，第二部分1504的体积等于第一部分1502的体积。在一些实施例中，第二部分1504的体积小于第一部分1502的体积。第一部分1502和第二部分1504的不同体积可能是由于从导电垫120扩散至粘合层130以及从粘合层130扩散至导电垫120的不同扩散系数所造成，但不以此为限。
在一些实施例中，空穴160是由扩散粘合部分150的周边的一部分、导电垫120面对粘合层130的周边的一部分和粘合层130面对导电垫120的周边的一部分所界定(例如，参考图2A)。在一些实施例中，至少其中一个空穴160是由扩散粘合部分150的周边的一部分和导电垫120的周边的一部分所界定，但并未直接由粘合层130的周边的一部分所界定(例如，参考图2B)。在一些实施例中，至少一个空穴160是由扩散粘合部分150的周边的一部分和粘合层130的周边的一部分所界定，但并未直接由导电垫120的周边的一部分所界定(例如，参考图2C)。图2A、图2B和图2C所描述的实施例的不同点可能是来自加热过程、加热过程终端温度或所选材料的扩散系数不同，但不以此为限。在一些实施例中，其中一个空穴160的垂直长度L小于或等于200纳米。图2A至图2C中所示的垂直长度L的定义是其中一个空穴160在巨观下(如图1的尺度)垂直于导电垫120接触粘合层130的表面的延伸方向上的长度。在一些实施例中，于此段落和前两个段落所描述的结构特征可以用下述方式形成。首先，形成液体层于导电垫120上并使粘合层130接触液体层。接着，加热导电垫120和粘合层130当中至少一个至低于锡熔点的温度让液体层蒸发同时避免锡熔化。液体层蒸发后，粘合层130贴附并电性接触导电垫120，从而形成前述结构特征。前述加热的详细方法和参数将于后详述。
在一些实施例中，导电垫120的厚度小于或等于2微米。在一些实施例中，导电垫120的厚度小于或等于0.5微米。在一些实施例中，粘合层130的厚度小于或等于10微米。在一些实施例中，粘合层130的厚度范围在约0.2微米至约2微米之间。在一些实施例中，粘合层130的厚度范围在约0.3微米至约1微米之间。导电垫120和粘合层130的最低限制厚度考量是为了确保存在足够的空间让焊料和贵金属(和/或镍)之间可以有间隙扩散。此处所指的厚度是指部件(例如，粘合层130或导电垫120)的最大长度，此长度的方式是垂直于前述剖面图中基板110的延伸方向。此外，粘合层130应该足够薄(亦即，小于2微米，优选小于1微米)以降低其热传导，从而让微型粘合结构100展现更佳的热散逸。除此之外，亦有足够的能力以抵抗施加至粘合层130或微型粘合结构100的剪力以避免微型粘合结构100受到损坏。再者，由于粘合层130的厚度相较于传统用来粘合的层(例如，相较于传统焊接用来粘合的层)薄得多，粘合层130的电阻显著减少，从而可降低粘合于粘合层130上的微型元件140于操作时的能量消耗。
请参考图3A和图3B。图3A为根据本发明的一些实施例中聚焦在一个微型元件140和一部分该微型元件140粘合于其上的基板110的放大剖面示意图。微型元件140可包含第一型半导体层142、第二型半导体层144和主动层146。第二型半导体层144位于第一型半导体层142上，主动层146位于第一型半导体层142和第二型半导体层144之间并接触第一型半导体层142和第二型半导体层144。第一和第二型半导体层142、144可分别为p型和n型半导体层，主动层146可以为量子井或多重量子井，但并不以此为限。在一些实施例中，第一型半导体层142(例如p型半导体层)比第二型半导体层144(例如，n型半导体层)要来得薄。微型元件140的第一型半导体层142面对基板110。在此条件下，如图3A中所示的可选地填充材料112(例如，介电材料)的厚度可具有较大范围的公差，此填充材料112填充空的地方并暴露第二型半导体层144的至少一部分。前述可具有较大范围厚度公差的原因在于填充材料112的其中一个功能为防止第一型半导体层142和第二型半导体层144之间电流短路。因此，如图3A所示，填充材料112相对于基板110的高度H可大于主动层146相对于基板110的高度H1，但小于微型元件140相对于基板110的高度H2。于是，此配置(微型元件140的第一型半导体层142面对基板110，亦即，p型面朝下)允许了较大范围的高度H容忍量。详细而言，填充材料112在基板110上并接触导电垫120、粘合层130和微型元件140。除此之外，由于p型半导体层的载子浓度低于n型半导体层的载子浓度，较薄的p型半导体层可增强微型元件140(例如，微型发光二极管)的效率。在一些实施例中，如图3A所示，微型元件140相对于基板110的高度H2小于微型元件140侧向长度L1，从而更加增强了抵抗由于施加至微型粘合结构100的剪力而造成损坏的能力。一般来说，微型元件140的侧向长度L1是从垂直于高度H2的方向测量。
在一些实施例中，微型元件140的侧向长度L1等于或小于50微米。在一些实施例中，微型元件140的侧向长度L1等于或小于20微米。此处所描述的侧向长度L1为微型元件140平行于如图1、图3A和图3B所示的侧视(剖面)图的基板110延伸方向的最大长度。在一些实施例中，导电垫120和粘合层130接触的面积小于或等于2500平方微米，例如，50微米乘以50微米的方形区域，但不以此为限。由于粘合层130和导电垫120之间的粘合主要是由焊料和贵金属(在此的定义包括铜)(和/或镍)之间的间隙扩散，在低于锡熔点的温度下完成，由于焊料(例如，锡)没有熔化，因此基板110上微型元件140的定位精度不会变差。此外，由于前述温度低于传统的粘合温度，微型元件140和其它位于基板110上的部件(例如，电路)的品质在粘合后得以维持。
应注意，前述借液体层协助的间隙扩散在尺寸(侧向长度和/或厚度)小于约50微米的微型元件140以粘合为目的时效果良好。在其它元件尺寸远大于50微米(例如，100微米)的情形，由于液体层的毛细力无法将元件维持在可控区域内，应使用传统焊接(例如，熔化锡)来粘合，且前述的间隙扩散可能无法将粘合层和元件牢固地粘合至导电垫上。
在一些实施例中，微型粘合结构100更包含第一粘着层170，设置在导电垫120和基板110之间。第一粘着层170可能包含钛(titanium,Ti)、钛钨(titaniumtungsten,TiW)、铬(chromium,Cr)、钼(molybdenum,Mo)、钼钛(molybdenum titanium,MoTi)、或其组合，但不以此为限。在一些实施例中，微型粘合结构100更包含第二粘着层180，设置在微型元件140和粘合层130之间。第二粘着层180包含钛、钛钨、铬、镍、镍铬(nickel chromium,NiCr)、铜、钼、钼钛或其组合，但不以此为限。第一和第二粘着层170、180可提升导电垫120和基板110之间以及微型元件140和粘合层130之间的粘合品质，从而防止微型粘合结构100在其形成的制造过程中或之后产生分离的情形。
在一些实施例中，微型粘合结构100更包含至少一个电极190，设置在粘合层130(或第二粘着层180)和微型元件140之间，用于微型元件140和导电垫120之间的电性接触。电极190可包含金、银、铂、铬/金、铂/金、钛/铂/金、钛/金、镍/金-锌(zinc,Zn)、镍/金、镍/硅(sislicon,Si)、镍/铬/金、钯/金或钨化硅(tungsten silicon,WSi)，但不以此为限。
图3B为根据本发明的一些实施例中聚焦在一个微型元件140和一部分该微型元件140粘合于其上的基板110的放大剖面示意图。图3A和图3B所描述的实施例的不同点在于，图3B的实施例中粘合层130为图案化粘合层，其包含至少两个隔离部分(例如，图3B所示的左右两个粘合层130)，隔离部分彼此电性隔离。此外，如图3B所示，第二粘着层180、电极190、导电垫120和第一粘着层170亦可分别具有至少两个隔离部分。
在另一方面，提供形成微型粘合结构100的方法200。虽然在以下的公开内容中描述的大多数元件名称是使用单数名词，但是根据附图或实际应用，这些元件名称也可以是多个。应当注意，前几段所描述的关于微型粘合结构100的组成部分和元件名称可应用至以下关于方法200的实施例，且为了简单起见，这里将不再重复其中的一些实施例。
参考图1至5C。图4为根据本发明的一些实施例中粘合微型元件140至基板110的方法200的流程示意图。图5A至图5C皆各为根据本发明的一些实施例中图4的方法200其中一个中间步骤的剖面示意图。方法200从作业210开始，形成粘合层130于微型元件140上。在一些实施例中，粘合层130的厚度小于或等于10微米。在一些实施例中，粘合层130的厚度介于0.2微米和2微米之间，在一些实施例中优选介于于0.3微米和1微米之间。方法200接着进行作业220，准备基板110，基板110具有导电垫120于其上(例如，参考图5A)。方法200接着进行作业230，形成液体层510于导电垫120上(例如，参考图5A)。方法200接着进行作业240，放置微型元件140至基板110上方并使微型元件140接触液体层510(例如，参考图5B)。方法200接着进行作业250，加热粘合层130和导电垫120当中的至少一个(如图5C的加热步骤T所示)至低于熔点的温度，此熔点为粘合层130和导电垫120当中熔点较低者，加热速率小于或等于每分钟12摄氏度以逐渐蒸发液体层510(例如，参考图5C)。
请参考图5A和图5B。形成液体层510于导电垫120上。在形成粘合层130于微型元件140上以及准备导电垫120于基板110上之后，放置微型元件140至基板110上方，微型元件140接触液体层510，使得微型元件140由液体层510所产生的毛细力抓住，并基本保持在基板110上的可控区域内的位置。在一些实施例中，粘合层130可由化学镀、电镀、溅镀、热蒸镀或电子枪蒸镀来形成。在一些实施例中，形成第一粘着层170于基板110上，接着形成导电垫120于第一粘着层170上。在一些实施例中，微型元件140上备有至少一个电极190，粘合层130形成于电极190上。在一些实施例中，形成第二粘着层180于电极190上，接着形成粘合层130于第二粘着层180上。第一和第二粘着层170、180可包含钛、钛钨，但不以此为限。
请参考图5C。加热粘合层130和/或导电垫120(如图5C的加热步骤T所示)至低于熔点的温度，此熔点为粘合层130和导电垫120当中熔点较低者，加热速率小于或等于每分钟12摄氏度以逐渐蒸发液体层510，使得粘合层130接触导电垫120并借由粘合层130的粗糙度和导电垫120的粗糙度在粘合层130和导电垫120之间形成多个空穴160。前述加热可驱走液体层510，从而在粘合层130和导电垫120之间可发生固相扩散。在一些实施例中，加热速率小于或等于每分钟10.33摄氏度。前述加热速率是根据保持微型元件140在可控区域内的可行性所决定。加热速率需足够慢，否则导电垫120和粘合层130之间的接触将由于液体层510的快速蒸发而分开。在前述加热步骤T过程中，在粘合层130和导电垫120之间发生间隙扩散以形成扩散粘合部分150。在一些实施例中，扩散粘合部分150形成于有还原气体G(例如，氢气(hydrogen,H2))的环境中，从而避免氧化。前述温度(亦即，终端温度)可小于或等于摄氏200度。在一些实施例中，前述温度约为摄氏180度。在一些实施例中，由于从贵金属(例如，铜)扩散至焊料(例如，锡)的扩散系数大于从焊料(例如，锡)扩散至贵金属(例如，铜)的扩散系数，间隙扩散主要是由导电垫120的贵金属(和/或镍)扩散进粘合层130的焊料中。通过前述的加热速率(例如，每分钟10.33摄氏度)以及温度(例如，摄氏180度)，导电垫120和粘合层130在其两者间的界面处于前述间隙扩散时不熔化。因此，导电垫120和粘合层130在接触时所形成的空穴160不会在加热步骤T中被填满。如此，前述加热步骤T可提供厚度远远薄于已知制造过程的扩散粘合部分150。该已知制造过程是指用熔化材料的方式形成共晶粘合层在彼此接触的两个层的界面上。贵金属和焊料可包含的材料已分别在前面提过，不会再行重复。
请参考图5D。图5D为根据本发明的一些实施例中的方法200中可选的中间步骤的剖面示意图。在一些实施例中，于蒸发后，施加外部压力P至导电垫120和粘合层130。详细而言，在1大气压(atm)的环境下，可施加大于大气压力约1/4大气压的外部压力P，使得导电垫120和粘合层130受到大于5/4大气压的压缩压力，增强了导电垫120和粘合层130之间的粘合强度。此外，外部压力P可增加导电垫120和粘合层130之间的扩散速率。在一些实施例中，可变化环境压力来施加外部压力P，例如改变包含微型粘合结构100在内的腔体的压力。在一些实施例中，可通过额外放置在微型元件140上的平板施加外部压力P。
综上所述，本发明的实施例提供了微型粘合结构以及在低于焊料熔点的温度下将微型元件粘合至基板的方法，其中微型元件具有相较于传统元件(例如，传统LED晶粒)相当微小的侧向长度(例如，小于或等于50微米)。由于适当的加热速率和加热终端温度，空穴在导电垫和粘合层的界面上有特殊特征。如此，可形成固相粘合，且微型元件和相关电路的品质在粘合后仍可维持。
以上所述，仅是本发明的较佳实施例而已，并非对本发明作任何形式上的限制，虽然本发明已以较佳实施例公开如上，然而并非用以限定本发明，任何熟悉本专业的技术人员，在不脱离本发明技术方案范围内，当可利用上述揭示的技术内容作出些许更动或修饰为等同变化的等效实施例，但凡是未脱离本发明技术方案的内容，依据本发明的技术实质对以上实施例所作的任何简单修改、等同变化与修饰，均仍属于本发明技术方案的范围内。

Claims (18)

1.一种形成微型粘合结构的方法，其特征在于，包含：
形成粘合层于微型元件上；
准备基板，所述基板具有导电垫于其上；
形成液体层于所述导电垫上；
放置所述微型元件至所述基板上方并使所述微型元件接触所述液体层；以及
加热所述粘合层和所述导电垫当中的至少一个至低于熔点的温度，此熔点的温度为所述粘合层和所述导电垫当中熔点较低者，加热速率小于或等于每分钟12摄氏度以逐渐蒸发所述液体层，使得所述粘合层接触所述导电垫并在所述粘合层和所述导电垫之间形成多个空穴，且间隙扩散发生在所述粘合层和所述导电垫之间以形成扩散粘合部分。
2.如权利要求1所述的方法，其特征在于，更包含：
施加外部压力至所述导电垫和该粘合层，使得所述导电垫和所述粘合层受到压缩压力以增加所述导电垫和所述粘合层之间的粘合强度。
3.如权利要求1所述的方法，其特征在于，所述扩散粘合部分形成于具有还原气体的环境内。
4.如权利要求1所述的方法，其特征在于，所述空穴的其中一个是由所述扩散粘合部分以及所述导电垫和所述粘合层当中的至少一个所界定。
5.如权利要求1所述的方法，其特征在于，所述导电垫和所述粘合层其中之一的表面粗糙度小于或等于80纳米。
6.如权利要求1所述的方法，其特征在于，所述导电垫和所述粘合层的其中之一包含铜、锡、钛和铟当中的一个，所述铜、锡、钛和铟当中的一个占所述导电垫和所述粘合层之一的原子数的一半以上。
7.如权利要求1所述的方法，其特征在于，从所述导电垫扩散至所述粘合层的扩散系数大于从所述粘合层扩散至所述导电垫的扩散系数。
8.如权利要求1所述的方法，其特征在于，更包含形成第一粘着层在所述导电垫和所述基板之间。
9.如权利要求1所述的方法，其特征在于，更包含形成第二粘着层，在所述微型元件和所述粘合层之间。
10.如权利要求1所述的方法，其特征在于，更包含形成至少一个电极在所述粘合层和所述微型元件之间。
11.如权利要求1所述的方法，其特征在于，所述微型元件的侧向长度等于或小于50微米。
12.如权利要求1所述的方法，其特征在于，所述空穴的垂直长度等于或小于200纳米。
13.如权利要求1所述的方法，其特征在于，所述导电垫的面积小于或等于2500平方微米。
14.如权利要求1所述的方法，其特征在于，所述粘合层为图案化粘合层，其包含至少两个独立部分，所述两个独立部分彼此电性隔离。
15.如权利要求1所述的方法，其特征在于，所述微型元件包含：
第一型半导体层；
主动层，位于所述第一型半导体层上；以及
第二型半导体层，位于所述主动层上。
16.如权利要求15所述的方法，其特征在于，更包含形成填充材料于所述基板上使所述填充材料接触所述导电垫、所述粘合层和所述微型元件，其中所述填充材料相对于所述基板的高度大于所述主动层相对于所述基板的高度，且小于所述微型元件相对于所述基板的高度。
17.如权利要求1所述的方法，其特征在于，所述粘合层的厚度范围小于或等于10微米。
18.如权利要求1所述的方法，其特征在于，所述粘合层的厚度范围在0.2微米至2微米之间。
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