CN110709965B - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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Publication number
CN110709965B
CN110709965B CN201880037037.8A CN201880037037A CN110709965B CN 110709965 B CN110709965 B CN 110709965B CN 201880037037 A CN201880037037 A CN 201880037037A CN 110709965 B CN110709965 B CN 110709965B
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substrate
side groove
groove
semiconductor device
forming
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Chinese (zh)
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CN110709965A (zh
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山田骏太郎
神田明典
吉冈彻雄
长尾高成
宫下耕一
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Denso Corp
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Denso Corp
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    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • H01L21/3043Making grooves, e.g. cutting
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B27/00Other grinding machines or devices
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    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Engineering (AREA)
  • Dicing (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Die Bonding (AREA)
CN201880037037.8A 2017-06-15 2018-05-24 半导体装置及其制造方法 Active CN110709965B (zh)

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JP2017-117856 2017-06-15
JP2017117856A JP6766758B2 (ja) 2017-06-15 2017-06-15 半導体装置およびその製造方法
PCT/JP2018/020005 WO2018230297A1 (ja) 2017-06-15 2018-05-24 半導体装置およびその製造方法

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JP7306859B2 (ja) * 2019-04-09 2023-07-11 株式会社ディスコ 透明板の加工方法
JP7339819B2 (ja) * 2019-09-04 2023-09-06 株式会社東芝 半導体装置の製造方法および半導体装置
JP7497989B2 (ja) * 2020-02-14 2024-06-11 株式会社ディスコ 半導体チップの製造方法、及び、半導体チップ
JP7696225B2 (ja) * 2021-04-07 2025-06-20 株式会社ディスコ 加工方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001085736A (ja) * 1999-09-10 2001-03-30 Sharp Corp 窒化物半導体チップの製造方法
JP2001127010A (ja) * 1999-10-25 2001-05-11 Hitachi Ltd 半導体装置及びその製造方法
JP2006086509A (ja) * 2004-08-17 2006-03-30 Denso Corp 半導体基板の分断方法
JP2006222359A (ja) * 2005-02-14 2006-08-24 Hitachi Cable Ltd 発光ダイオードアレイの製造方法
JP2007073844A (ja) * 2005-09-08 2007-03-22 Disco Abrasive Syst Ltd ウェーハの分割方法
CN103515250A (zh) * 2013-09-10 2014-01-15 天水华天科技股份有限公司 一种75μm超薄芯片生产方法
JP2015053428A (ja) * 2013-09-09 2015-03-19 住友電気工業株式会社 炭化珪素半導体装置の製造方法

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0288203A (ja) 1988-09-26 1990-03-28 Nec Corp 半導体素子の製造方法
JPH06232255A (ja) 1993-01-29 1994-08-19 Disco Abrasive Syst Ltd ウェーハのダイシング方法
US5904548A (en) * 1996-11-21 1999-05-18 Texas Instruments Incorporated Trench scribe line for decreased chip spacing
JP4687838B2 (ja) * 2000-04-04 2011-05-25 株式会社ディスコ 半導体チップの製造方法
JP4471565B2 (ja) 2002-12-10 2010-06-02 株式会社ディスコ 半導体ウエーハの分割方法
JP2005012203A (ja) * 2003-05-29 2005-01-13 Hamamatsu Photonics Kk レーザ加工方法
US7550367B2 (en) * 2004-08-17 2009-06-23 Denso Corporation Method for separating semiconductor substrate
JP2006165521A (ja) * 2004-11-12 2006-06-22 Nippon Sheet Glass Co Ltd 自己走査型発光素子チップアレイ
JP2006237375A (ja) 2005-02-25 2006-09-07 Toshiba Corp ダイシング方法
JP2007042810A (ja) 2005-08-02 2007-02-15 Tokyo Seimitsu Co Ltd ワーク切断方法
KR100675001B1 (ko) * 2006-01-04 2007-01-29 삼성전자주식회사 웨이퍼 다이싱 방법 및 그 방법을 이용하여 제조된 다이
JP2008078367A (ja) * 2006-09-21 2008-04-03 Renesas Technology Corp 半導体装置
JP5226472B2 (ja) 2008-11-17 2013-07-03 株式会社ディスコ 切削方法
JP2011159679A (ja) 2010-01-29 2011-08-18 Furukawa Electric Co Ltd:The チップの製造方法
JP2012169411A (ja) 2011-02-14 2012-09-06 Teramikros Inc 半導体装置の製造方法
US20130157414A1 (en) * 2011-12-20 2013-06-20 Nxp B. V. Stacked-die package and method therefor
JP5637330B1 (ja) 2013-07-01 2014-12-10 富士ゼロックス株式会社 半導体片の製造方法、半導体片を含む回路基板および画像形成装置
JP6281699B2 (ja) 2013-07-01 2018-02-21 富士ゼロックス株式会社 半導体片の製造方法、半導体片を含む回路基板および電子装置、ならびに基板のダイシング方法
JP2015119068A (ja) 2013-12-19 2015-06-25 株式会社ディスコ ウエーハの加工方法
JP2015185691A (ja) 2014-03-24 2015-10-22 古河電気工業株式会社 半導体ウェハ加工用粘着テープ、該粘着テープの製造方法および半導体ウェハの加工方法
JP2016134523A (ja) 2015-01-20 2016-07-25 株式会社東芝 半導体装置及びその製造方法
TW201642333A (zh) 2015-05-29 2016-12-01 Youngtek Electronics Corp 晶圓切割製程
JP2017041574A (ja) 2015-08-21 2017-02-23 株式会社ディスコ ウエーハの加工方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001085736A (ja) * 1999-09-10 2001-03-30 Sharp Corp 窒化物半導体チップの製造方法
JP2001127010A (ja) * 1999-10-25 2001-05-11 Hitachi Ltd 半導体装置及びその製造方法
JP2006086509A (ja) * 2004-08-17 2006-03-30 Denso Corp 半導体基板の分断方法
JP2006222359A (ja) * 2005-02-14 2006-08-24 Hitachi Cable Ltd 発光ダイオードアレイの製造方法
JP2007073844A (ja) * 2005-09-08 2007-03-22 Disco Abrasive Syst Ltd ウェーハの分割方法
JP2015053428A (ja) * 2013-09-09 2015-03-19 住友電気工業株式会社 炭化珪素半導体装置の製造方法
CN103515250A (zh) * 2013-09-10 2014-01-15 天水华天科技股份有限公司 一种75μm超薄芯片生产方法

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