JP6281699B2 - 半導体片の製造方法、半導体片を含む回路基板および電子装置、ならびに基板のダイシング方法 - Google Patents
半導体片の製造方法、半導体片を含む回路基板および電子装置、ならびに基板のダイシング方法 Download PDFInfo
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Description
請求項2は、前記第1の溝部分は、前記裏面側の溝を形成した後において、前記粘着層が前記第2の溝部分に進入していない深さを有する請求項1に記載の半導体片の製造方法。
請求項3は、前記基板は、表面側にメサ形状の素子による凸部と凹部とを有し、前記表面側の溝の少なくとも一部は前記凹部に設けられ、前記粘着層は、前記凹部に設けられた前記表面側の溝の入口部分に追従する厚みを有するとともに、当該入口部分に追従して貼り付けられ、前記第1の溝部分は、前記入口部分に追従して貼り付けられた前記粘着層が前記第2の溝部分に進入しない深さを有する請求項1または2に記載の半導体片の製造方法。
請求項4は、請求項1ないし3のいずれか1つに記載の製造方法によって製造された少なくとも1つの半導体片を実装する回路基板。
請求項5は、請求項4に記載の回路基板を実装する電子装置。
請求項6は、表面から裏面に向けて幅が広くなる部分を有さない第1の溝部分と、前記第1の溝部分の下端から、当該下端の幅から徐々に幅が広がる形状を有する第2の溝部分とを有する基板を準備する工程と、前記第1及び第2の溝部分が形成された前記表面に粘着層を有する保持部材を貼り付ける工程と、前記基板の裏面から、回転する切削部材で、前記下端の幅よりも広い幅の裏面側の溝を前記第2の溝部分に達する深さで形成する工程と、前記裏面側の溝の形成後に、前記表面と前記保持部材とを剥離する工程と、を備える基板のダイシング方法。
請求項7は、表面から裏面に向けて幅が広くなる部分を有さない第1の溝部分と、前記第1の溝部分の下端から、当該下端の幅から徐々に幅が広がる形状を有する第2の溝部分とを有する基板を準備する工程と、前記第1及び第2の溝部分が形成された前記表面に粘着層を有する保持部材を貼り付ける工程と、前記基板の裏面から、回転する切削部材で、前記下端の幅よりも広い幅の裏面側の溝を前記基板の厚みの一部分を残して形成する工程と、前記裏面側の溝を形成した後、前記基板に応力を加えて、前記残った一部分を分割する基板のダイシング方法。
請求項2によれば、裏面側の溝の形成に伴い粘着層が第2の溝部分に侵入する構成と比較し、粘着層の残存を抑制できる。
請求項3によれば、粘着層が残存しやすい場合において、粘着層の残存を抑制できる。
請求項6、7によれば、表面側の溝が垂直な溝形状のみの場合と比較し、基板表面での溝幅が同じであっても、裏面側の溝の形成に伴う表面側の溝周辺の破損が抑制できるとともに、表面側の溝が基板の表面位置から直ぐに幅が徐々に広がる形状の場合と比較し、粘着層の残存を抑制できる。
請求項2は、前記第1の溝部分は、前記裏面側の溝を形成した後において、前記粘着層が前記第2の溝部分に進入していない深さを有する請求項1に記載の半導体片の製造方法。
請求項3は、前記基板は、表面側にメサ形状の素子による凸部と凹部とを有し、前記表面側の溝の少なくとも一部は前記凹部に設けられ、前記粘着層は、前記凹部に設けられた前記表面側の溝の入口部分に追従する厚みを有するとともに、当該入口部分に追従して貼り付けられ、前記第1の溝部分は、前記入口部分に追従して貼り付けられた前記粘着層が前記第2の溝部分に進入しない深さを有する請求項1または2に記載の半導体片の製造方法。
請求項4は、請求項1ないし3のいずれか1つに記載の製造方法によって製造された少なくとも1つの半導体片を実装する回路基板。
請求項5は、請求項4に記載の回路基板を実装する電子装置。
請求項6は、表面から裏面に向けて幅が広くなる部分を有さない第1の溝部分と、前記第1の溝部分の下端から、当該下端の幅から徐々に幅が広がる形状を有する第2の溝部分とを有する基板を準備する工程と、前記第1及び第2の溝部分が形成された前記表面に粘着層を有する保持部材を貼り付ける工程と、前記基板の裏面から、回転する切削部材で、前記下端の幅よりも広い幅の裏面側の溝を前記第2の溝部分に達する深さで形成する工程と、前記裏面側の溝の形成後に、前記表面と前記保持部材とを剥離する工程と、を備える基板(但し、第1の溝部分の側壁をへき開して製造する端面発光レーザを除く)のダイシング方法。
請求項7は、表面から裏面に向けて幅が広くなる部分を有さない第1の溝部分と、前記第1の溝部分の下端から、当該下端の幅から徐々に幅が広がる形状を有する第2の溝部分とを有する基板を準備する工程と、前記第1及び第2の溝部分が形成された前記表面に粘着層を有する保持部材を貼り付ける工程と、前記基板の裏面から、回転する切削部材で、前記下端の幅よりも広い幅の裏面側の溝を前記基板の厚みの一部分を残して形成する工程と、前記裏面側の溝を形成した後、前記基板に応力を加えて、前記残った一部分を分割する基板(但し、第1の溝部分の側壁をへき開して製造する端面発光レーザを除く)のダイシング方法。
120:切断領域(スクライブライン)
130:レジストパターン
140:微細溝
160:ダイシング用テープ
170:溝
190:エキスパンド用テープ
210:半導体チップ
300:ダイシングブレード
400:段差部
500、500A、500B、500C:微細溝
510:第1の溝部分
520、530、540、550:第2の溝部分
600、610、620、630:段差
700、800:フォトレジスト
710、810:開口
720、830、850:保護膜
Claims (7)
- 基板の表面から裏面に向けて幅が広くなる部分を有さない第1の溝部分を形成する工程と、
前記第1の溝部分の下端から、当該下端の幅から徐々に幅が広がる形状を有する第2の溝部分を形成する工程と、
前記第1及び第2の溝部分が形成された前記表面に粘着層を有する保持部材を貼り付ける工程と、
前記基板の裏面側から回転する切削部材で、前記下端の幅よりも広い幅の裏面側の溝を前記第2の溝部分に沿って形成する工程と、
前記裏面側の溝の形成後に、前記表面と前記保持部材とを剥離する工程と、
を備える半導体片(但し、第1の溝部分の側壁をへき開して製造する端面発光レーザを除く)の製造方法。 - 前記第1の溝部分は、前記裏面側の溝を形成した後において、前記粘着層が前記第2の溝部分に進入していない深さを有する請求項1に記載の半導体片の製造方法。
- 前記基板は、表面側にメサ形状の素子による凸部と凹部とを有し、
前記表面側の溝の少なくとも一部は前記凹部に設けられ、
前記粘着層は、前記凹部に設けられた前記表面側の溝の入口部分に追従する厚みを有するとともに、当該入口部分に追従して貼り付けられ、
前記第1の溝部分は、前記入口部分に追従して貼り付けられた前記粘着層が前記第2の溝部分に進入しない深さを有する請求項1または2に記載の半導体片の製造方法。 - 請求項1ないし3のいずれか1つに記載の製造方法によって製造された少なくとも1つの半導体片を実装する回路基板。
- 請求項4に記載の回路基板を実装する電子装置。
- 表面から裏面に向けて幅が広くなる部分を有さない第1の溝部分と、前記第1の溝部分の下端から、当該下端の幅から徐々に幅が広がる形状を有する第2の溝部分とを有する基板を準備する工程と、
前記第1及び第2の溝部分が形成された前記表面に粘着層を有する保持部材を貼り付ける工程と、
前記基板の裏面から、回転する切削部材で、前記下端の幅よりも広い幅の裏面側の溝を前記第2の溝部分に達する深さで形成する工程と、
前記裏面側の溝の形成後に、前記表面と前記保持部材とを剥離する工程と、
を備える基板(但し、第1の溝部分の側壁をへき開して製造する端面発光レーザを除く)のダイシング方法。 - 表面から裏面に向けて幅が広くなる部分を有さない第1の溝部分と、前記第1の溝部分の下端から、当該下端の幅から徐々に幅が広がる形状を有する第2の溝部分とを有する基板を準備する工程と、
前記第1及び第2の溝部分が形成された前記表面に粘着層を有する保持部材を貼り付ける工程と、
前記基板の裏面から、回転する切削部材で、前記下端の幅よりも広い幅の裏面側の溝を前記基板の厚みの一部分を残して形成する工程と、
前記裏面側の溝を形成した後、前記基板に応力を加えて、前記残った一部分を分割する基板(但し、第1の溝部分の側壁をへき開して製造する端面発光レーザを除く)のダイシング方法。
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