CN110648629B - 显示面板及其制作方法、显示装置 - Google Patents

显示面板及其制作方法、显示装置 Download PDF

Info

Publication number
CN110648629B
CN110648629B CN201911054266.3A CN201911054266A CN110648629B CN 110648629 B CN110648629 B CN 110648629B CN 201911054266 A CN201911054266 A CN 201911054266A CN 110648629 B CN110648629 B CN 110648629B
Authority
CN
China
Prior art keywords
transistor
active layer
composite
electrically connected
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201911054266.3A
Other languages
English (en)
Other versions
CN110648629A (zh
Inventor
何水
世良贤二
杨淑娴
杨铭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xiamen Tianma Microelectronics Co Ltd
Original Assignee
Xiamen Tianma Microelectronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xiamen Tianma Microelectronics Co Ltd filed Critical Xiamen Tianma Microelectronics Co Ltd
Priority to CN201911054266.3A priority Critical patent/CN110648629B/zh
Priority to US16/732,084 priority patent/US10984725B1/en
Publication of CN110648629A publication Critical patent/CN110648629A/zh
Application granted granted Critical
Publication of CN110648629B publication Critical patent/CN110648629B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1251—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0417—Special arrangements specific to the use of low carrier mobility technology
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0216—Interleaved control phases for different scan lines in the same sub-field, e.g. initialization, addressing and sustaining in plasma displays that are not simultaneous for all scan lines
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/7866—Non-monocrystalline silicon transistors
    • H01L29/78672—Polycrystalline or microcrystalline silicon transistor
    • H01L29/78675—Polycrystalline or microcrystalline silicon transistor with normal-type structure, e.g. with top gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

本发明实施例提供了一种显示面板及其制作方法、显示装置，涉及显示技术领域，提高了像素驱动电路的节点电压稳定性及工作状态稳定性。上述显示面板包括：衬底基板；形成于衬底基板的多个像素驱动电路，像素驱动电路包括存储电容和晶体管；其中，晶体管包括第一类晶体管和第二类晶体管，第一类晶体管为复合型晶体管，第一类晶体管包括串联的第一子晶体管和第二子晶体管，第一子晶体管为低温多晶硅晶体管，第二子晶体管为氧化物晶体管；第一类晶体管包括复合有源层、复合栅极、复合源极和复合漏极，第一类晶体管的复合源极或复合漏极与存储电容电连接，或者，在发光阶段，第一类晶体管处于关断状态。

Description

显示面板及其制作方法、显示装置
【技术领域】
本发明涉及显示技术领域，尤其涉及一种显示面板及其制作方法、显示装置。
【背景技术】
显示面板包括电连接的像素驱动电路和有机发光元件，通过像素驱动电路向有机发光元件提供驱动电流，驱动有机发光元件发光，其中，像素驱动电路包括存储电容和多个晶体管。但是，基于现有的像素驱动电路中晶体管的设置方式，会导致像素驱动电路中节点电压不稳定及像素驱动电路的工作状态的不稳定，从而导致提供至有机发光元件的驱动电流偏离其标准值，影响显示性能。
【发明内容】
有鉴于此，本发明实施例提供了一种显示面板及其制作方法、显示装置，提高了像素驱动电路的节点电压的稳定性及工作状态的稳定性。
一方面，本发明实施例提供了一种显示面板，包括：
衬底基板；
形成于所述衬底基板的多个像素驱动电路，所述像素驱动电路包括存储电容和晶体管；
其中，所述晶体管包括第一类晶体管和第二类晶体管，所述第一类晶体管为复合型晶体管，所述第一类晶体管包括串联的第一子晶体管和第二子晶体管，所述第一子晶体管为低温多晶硅晶体管，所述第二子晶体管为氧化物晶体管；所述第一类晶体管包括复合有源层、复合栅极、复合源极和复合漏极，所述第一类晶体管的所述复合源极或所述复合漏极与所述存储电容电连接，或者，在发光阶段，所述第一类晶体管处于关断状态。
另一方面，本发明实施例提供了一种显示面板的制作方法，包括：
提供衬底基板；
在所述衬底基板上形成像素驱动电路，所述像素驱动电路包括存储电容和晶体管；
其中，所述晶体管包括第一类晶体管和第二类晶体管，所述第一类晶体管为复合型晶体管，所述第一类晶体管包括串联的第一子晶体管和第二子晶体管，所述第一子晶体管为低温多晶硅晶体管，所述第二子晶体管为氧化物晶体管；所述第一类晶体管包括复合有源层、复合栅极、复合源极和复合漏极，所述第一类晶体管的所述复合源极或所述复合漏极与所述存储电容电连接，或者，在发光阶段，所述第一类晶体管处于关断状态。
再一方面，本发明实施例提供了一种显示装置，包括上述显示面板：
上述技术方案中的一个技术方案具有如下有益效果：
在本发明实施例所提供的技术方案中，第一类晶体管包括串联的低温多晶硅晶体管和氧化物晶体管，当第一类晶体管的复合源极或复合漏极与存储电容电连接，或者，在发光阶段第一类晶体管处于关断状态时，基于氧化物晶体管在关断状态下的漏电流较小的特性，使得氧化物晶体管与低温多晶硅晶体管串联后所形成的第一类晶体管的漏电流也较小，改善了第一类晶体管的漏电流对与其电连接的存储电容的极板的电位的影响，提高了节点电位的稳定性；与此同时，基于低温多晶硅晶体管的稳定性较好的特性，能够使得第一类晶体管也具有良好的稳定性，即使第一类晶体管长时间处在负偏压状态，其特性也不会发生显著变化，避免了阈值电压漂移等问题。可见，基于第一类晶体管的复合结构，能够使第一类晶体管兼具关断状态下漏电流较小和稳定性较高的特性，既能够改善漏电流对存储电容所存储的电位产生影响，提高像素驱动电路中节点电压的稳定性，从而提高发光二极管实际发光亮度的准确性，还能够提高自身工作的稳定性，进而提高整个像素驱动电路工作状态的稳定性。
【附图说明】
为了更清楚地说明本发明实施例的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其它的附图。
图1为现有技术中像素驱动电路的一种结构示意图；
图2为图1对应的时序图；
图3为本发明实施例所提供的显示面板的结构示意图；
图4为本发明实施例所提供的像素驱动电路的一种结构示意图；
图5为本发明实施例所提供的第一类晶体管的膜层结构示意图；
图6为本发明实施例所提供的第一类晶体管的Vg-Id特性曲线图；
图7为本发明实施例所提供的第一类晶体管的另一种膜层结构示意图；
图8为本发明实施例所提供的第一类晶体管的再一种膜层结构示意图；
图9为本发明实施例所提供的第一类晶体管的另一种膜层结构示意图；
图10为本发明实施例所提供的第一类晶体管的又一种膜层结构示意图；
图11为本发明实施例所提供的第一类晶体管的再一种膜层结构示意图；
图12为本发明实施例所提供的第一类晶体管的另一种膜层结构示意图；
图13为本发明实施例所提供的像素驱动电路的另一种结构示意图；
图14为本发明实施例所提供的制作方法的流程图；
图15为本发明实施例提供的制作方法的另一种流程图；
图16为图15对应的制作方法的结构示意图；
图17为本发明实施例提供的制作方法的另一种流程图；
图18为图17对应的制作方法的结构示意图；
图19为本发明实施例所提供的显示装置的结构示意图。
【具体实施方式】
为了更好的理解本发明的技术方案，下面结合附图对本发明实施例进行详细描述。
应当明确，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其它实施例，都属于本发明保护的范围。
在本发明实施例中使用的术语是仅仅出于描述特定实施例的目的，而非旨在限制本发明。在本发明实施例和所附权利要求书中所使用的单数形式的“一种”、“所述”和“该”也旨在包括多数形式，除非上下文清楚地表示其他含义。
应当理解，本文中使用的术语“和/或”仅仅是一种描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。另外，本文中字符“/”，一般表示前后关联对象是一种“或”的关系。
应当理解，尽管在本发明实施例中可能采用术语第一、第二、第三等来描述晶体管，但这些晶体管不应限于这些术语。这些术语仅用来将晶体管彼此区分开。例如，在不脱离本发明实施例范围的情况下，第一晶体管也可以被称为第二晶体管，类似地，第二晶体管也可以被称为第一晶体管。
为更加清楚的理解本发明实施例所提供的技术方案，本发明首先以图1所示的现有的像素驱动电路的结构为例，结合图2所示的时序图，对像素驱动电路的工作原理进行具体说明：
像素驱动电路的一个驱动周期包括初始化阶段t1′、充电阶段t2′和发光阶段t3′。
在初始化阶段t1′，第一扫描线Scan1′提供高电平，第二扫描线Scan2′和发光控制信号线Emit′分别提供低电平，第五晶体管T5′和第七晶体管T7′在高电平的作用下导通，参考电压线Vref′提供的参考电压信号Vref′分别通过导通的第五晶体管T5′和第七晶体管T7′流入第三晶体管T3′的栅极和有机发光元件D′的阳极，实现对第三晶体管T3′的栅极电压和有机发光元件D′的阳极电压进行复位，此时，第一节点N1的电位VN1′＝Vref′。
在充电阶段t2′，第一扫描线Scan1′和发光控制信号线Emit′分别提供低电平，第二扫描线Scan2′提供高电平，第二晶体管T2′和第四晶体管T4′在高电平的作用下导通，数据线Data提供的数据信号VData通过导通的第二晶体管T2′、第三晶体管T3′和第四晶体管T4′写入第一节点N1′，此时，VN1′＝VData′-|Vth′|，Vth′为第三晶体管T3′的阈值电压。
在发光阶段t3′，第一扫描线Scan1′和第二扫描线Scan2′分别提供低电平，发光控制信号线Emit′提供高电平，第一晶体管T1′和第六晶体管T6′在高电平的作用下持续导通，电源信号线PVDD′提供的电源信号VPVDD′通过导通的第一晶体管T1′、第三晶体管T3′和第六晶体管T6′流入有机发光元件D′，有机发光元件D′在电源信号VPVDD′和VN1′的作用下发光，此时，流入有机发光元件D′的驱动电流即，其中，μn表示电子的迁移速率，Cox表示单位面积栅氧化层电容，/>表示第三晶体管T3′的沟道宽长比。
可以理解的是，在像素驱动电路中，存储电容C′用于对第一节点N1′的电位进行存储，使其维持在正常电位，进而保证像素驱动电路的正常工作。经发明人研究发现，在像素驱动电路所包括的多个晶体管中，当某个晶体管的源极或漏极与存储电容C′电连接时，若该晶体管在关断状态时漏电流较大或者该晶体管的稳定性较差，该晶体管就会对存储电容中与其电连接的极板的电位产生影响，导致存储电容存储的电位发生变化，进而导致对第一节点N1′的电位产生影响。尤其是在发光阶段t3′，若第一节点N1′的电位发生变化，流入有机发光元件D′的驱动电流I′也会随之发生变化，这就导致有机发光元件D′的实际发光亮度偏离其标准发光亮度，进而影响正常显示。
基于此，本发明实施例提供了一种显示面板，如图3～图5所示，图3为本发明实施例所提供的显示面板的结构示意图，图4为本发明实施例所提供的像素驱动电路的一种结构示意图，图5为本发明实施例所提供的第一类晶体管的膜层结构示意图，该显示面板包括：衬底基板1；形成于衬底基板1的多个像素驱动电路2，像素驱动电路2包括存储电容3和晶体管4；其中，晶体管4包括第一类晶体管5和第二类晶体管6，第一类晶体管5为复合型晶体管，第一类晶体管5包括串联的第一子晶体管7和第二子晶体管8，第一子晶体管7为低温多晶硅晶体管，第二子晶体管8为氧化物晶体管；第一类晶体管5包括复合有源层9、复合栅极10、复合源极11和复合漏极12，第一类晶体管5的复合源极11或复合漏极12与存储电容3电连接，或者，在发光阶段，第一类晶体管5处于关断状态。
在本发明实施例所提供的显示面板中，第一类晶体管5包括串联的低温多晶硅晶体管和氧化物晶体管，当第一类晶体管5的复合源极11或复合漏极12与存储电容3电连接，或者，在发光阶段第一类晶体管5处于关断状态时，基于氧化物晶体管在关断状态下的漏电流较小的特性，使得氧化物晶体管与低温多晶硅晶体管串联后所形成的第一类晶体管5的漏电流也较小，改善了第一类晶体管5的漏电流对与其电连接的存储电容3的极板的电位的影响，提高了节点电位的稳定性；与此同时，基于低温多晶硅晶体管的稳定性较好的特性，能够使得第一类晶体管5也具有良好的稳定性，即使第一类晶体管5长时间处在负偏压状态，其特性也不会发生显著变化，避免了阈值电压漂移等问题。结合图6，图6为本发明实施例所提供的第一类晶体管的Vg-Id特性曲线图，根据图6可以看出，对于单类型的氧化物晶体管来说，当栅极电压Vg为负，氧化物晶体管处于关断状态时，漏电流Id较小，但是，当长时间在该氧化物晶体管的栅极上加电压后，氧化物晶体管对应的Vg-Id特性曲线就会发生偏移，说明氧化物晶体管的稳定性较差；对于单类型的低温多晶硅晶体管来说，当长时间在该低温多晶硅晶体管的栅极上加电压后，低温多晶硅晶体管对应的Vg-Id特性曲线不变，说明低温多晶硅晶体管的稳定性较高，但是，当栅极电压Vg为负，低温多晶硅晶体管处于关断状态时，漏电流Id较大；而对于由氧化物晶体管和低温多晶硅晶体管串联形成的第一类晶体管5来说，当其栅极电压Vg为负，第一类晶体管5处于关断状态时，漏电流Id较小，与此同时，即使长时间在该第一类晶体管5的栅极上加电压后，第一类晶体管5对应的Vg-Id特性曲线也不会发生变化，说明第一类晶体管5具有较高的稳定性。可见，基于第一类晶体管5的复合结构，能够使第一类晶体管5兼具关断状态下漏电流较小和稳定性较高的特性，既能够改善漏电流对存储电容3所存储的电位产生影响，提高像素驱动电路2中节点电压的稳定性，从而提高发光二极管实际发光亮度的准确性，还能够提高自身工作的稳定性，进而提高整个像素驱动电路2工作状态的稳定性。
需要说明的是，将第一类晶体管5设置为复合型晶体管时，若将氧化物晶体管和低温多晶硅晶体管并联，并联后形成的晶体管虽然具有较高的稳定性，但是受到低温多晶硅晶体管的影响，关态漏电流较大，不利于稳定节点电位。而在本发明实施例中，通过将氧化物晶体管和低温多晶硅晶体管串联，基于串联晶体管的特性，串联后的晶体管的关态漏电流由氧化物晶体管和低温多晶硅晶体管中关态漏电流较小的晶体管决定，因此，串联后所形成的第一类晶体管5不仅能够具有较高的稳定性，还兼具关态漏电流较小的特性，进一步优化了第一类晶体管5的性能。
此外，还需要说明的是，氧化物晶体管也可定义为氧化物半导体，具体可包括铟镓锌氧化物晶体管或氧化锌晶体管。
可选的，请再次参见图5，第一子晶体管7包括第一有源层13、第一栅极14和第一源极15，第一源极15与第一有源层13电连接；第二子晶体管8包括第二有源层17、第二栅极18和第二漏极20，第二漏极20与第二有源层17电连接，第一有源层13与第二有源层17电连接；其中，复合有源层9包括第一有源层13和第二有源层17，复合源极11为第一源极15，复合漏极12为第二漏极20。基于上述结构，通过令第一有源层13和第二有源层17电连接，能够实现第一子晶体管7和第二子晶体管8的串联，从而形成第一类晶体管5。
需要说明的是，通常，晶体管具有有源层、栅极、源极和漏极，对于第一子晶体管7和第二子晶体管8来说，第一有源层13中与第二有源层17接触的一端可视为第一子晶体管7的漏极，第二有源层17中与第一有源层13接触的一端可视为第二子晶体管8的源极，无需再额外设置膜层形成第一子晶体管7的漏极和第二子晶体管8的源极。
进一步的，请再次参见图5，第二有源层17位于第一有源层13背向衬底基板1的一侧，并且，在垂直于衬底基板1所在平面的方向上，第二有源层17与第一有源层13交叠。第一子晶体管7和第二子晶体管8串联后，令第一有源层13和第二有源层17在垂直于衬底基板1所在平面的方向上交叠，能够降低第一有源层13和第二有源层17在平行于衬底基板1所在平面方向上占用的空间，也就是降低第一类子晶体管占用的空间，从而实现降低单个像素驱动电路2占用的空间，提高单位面积内设置的像素驱动电路2的数量，进而提高了显示面板的分辨率。
进一步的，请再次参见图5，第一栅极14复用为第二栅极18，复合栅极10为第一栅极14，如此设置，在单个第一类晶体管5中，仅需设置一个栅极作为复合栅极10即可，不仅简化了制作工艺，而且降低了复合栅极10占用的空间。
可选的，如图7所示，图7为本发明实施例所提供的第一类晶体管的另一种膜层结构示意图，第一栅极14位于第一有源层13朝向衬底基板1的一侧，此时，第一有源层13和第二有源层17之间的绝缘层的厚度较小，不仅能够降低工艺难度，而且，当第一有源层13和第二有源层17通过绝缘层上的过孔电连接时，还能提高二者的连接稳定性。
可选的，如图8所示，图8为本发明实施例所提供的第一类晶体管的再一种膜层结构示意图，第一栅极14位于第一有源层13和第二有源层17之间，第一源极15位于第二有源层17背向衬底基板1的一侧；第一源极15通过辅助连接部24与第一有源层13电连接，辅助连接部24与第一栅极14同层设置。
基于上述结构，形成第一有源层13、第一栅极14、辅助连接部24、第二有源层17和第一源极15的工艺流程为：在衬底基板1上形成第一有源层13；在第一有源层13背向衬底基板1的一侧形成第一绝缘层22，并在第一绝缘层22上形成过孔，利用过孔将第一有源层13的源漏接触区露出，并对源漏接触区进行氢氟酸处理；在第一绝缘层22背向衬底基板1的一侧形成第一栅极14和辅助连接部24，其中，辅助连接部24通过第一绝缘层22上的过孔与第一有源层13的源漏接触区电连接；然后在第一栅极14背向衬底基板1的一侧形成第二绝缘层23，并在第二绝缘层23上形成过孔；在第二绝缘层23背向衬底基板1的一侧形成第二有源层17，第二有源层17通过第二绝缘层23和第一绝缘层22的过孔与第一有源层13电连接；在第二有源层17背向衬底基板1的一侧形成第三绝缘层25，并在第三绝缘层25上形成过孔，将辅助连接部24的部分区域露出；最后在第三绝缘层25背向衬底基板1的一侧形成第一源极15，第一源极15通过第三绝缘层25上的过孔与辅助连接部24电连接，进而实现与第一有源层13的源漏接触区的电连接。若未设置第二连接部，第一源极15与第一有源层13直接电连接，那么，在形成第三绝缘层25的过孔后，需对第一有源层13的源漏接触区进行氢氟酸处理，由于此时已经形成第二有源层17，因此，氢氟酸就会在膜层中进行渗透，对第二有源层17造成腐蚀。而设置辅助连接部24，在第一绝缘层22形成过孔后，即可对第一有源层13的源漏接触区进行氢氟酸处理，由于此时还未形成第二有源层17，因此避免了氢氟酸对第二有源层17的腐蚀，提高了第二有源层17的稳定性。此外，辅助连接部24与第一栅极14同层设置，辅助连接部24无需额外占用膜层空间，不仅能够简化工艺流程，还有利于实现显示面板的轻薄化设计。
或者，如图9所示，图9为本发明实施例所提供的第一类晶体管的另一种膜层结构示意图，辅助连接部24与第二有源层17同层设置。与辅助连接部24与第一栅极14同层设置类似，通过令辅助连接部24与第二有源层17同层设置，氢氟酸处理的工艺流程在形成第一绝缘层22和第二绝缘层23的过孔之后，以及在形成第二有源层17之前，从而避免了氢氟酸对第二有源层17进行腐蚀。此外，辅助连接部24与第二有源层17同层设置，辅助连接部24无需额外占用膜层空间，不仅能够简化工艺流程，还有利于实现显示面板的轻薄化设计。
可选的，如图10所示，图10为本发明实施例所提供的第一类晶体管的又一种膜层结构示意图，复合栅极10包括第一栅极14和第二栅极18；第一栅极14与第二栅极18电连接(图中未示出)，第一栅极14位于第一有源层13朝向衬底基板1的一侧，第二栅极18与复合源极11、复合漏极12同层设置。当复合栅极10包括第一栅极14和第二栅极18时，第一栅极14位于第一有源层13朝向衬底基板1的一侧，不仅可以减小第一有源层13和第二有源层17之间的绝缘层的厚度，提高第一有源层13和第二有源层17的连接稳定性，还能够减小第一有源层13和第一源极11之间的距离，当第一源极11通过过孔与第一有源层13电连接时，能够减小过孔的深度，从而减小过孔内金属走线的长度，进而降低电阻；并且，第二栅极18与复合源极11、复合漏极12同层设置，第二栅极18无需额外占用膜层空间，不会导致显示面板厚度的增大。
为进一步减小第一源极11电连接至第一有源层13的过孔的深度，进一步降低电阻，如图11所示，图11为本发明实施例所提供的第一类晶体管的再一种膜层结构示意图，第一源极15通过辅助连接部24与第一有源层13电连接，辅助连接部24与第二有源层17同层设置。
进一步的，如图12所示，图12为本发明实施例所提供的第一类晶体管的另一种膜层结构示意图，复合栅极10还包括第三栅极26，第三栅极26位于第一有源层13和第二有源层17之间，第三栅极26分别与第一栅极14和第二栅极18电连接，增设第三栅极26后，若第一栅极14、第二栅极18和第三栅极26中的任一栅极出现损坏，仍能通过另外两个栅极保证第一类晶体管5的正常工作，提高了第一类晶体管5的工作可靠性。
进一步的，请再次参见图10，在衬底基板1所在平面的方向上，第一栅极14与第二栅极18交叠，降低了第一栅极14和第二栅极18在平行于衬底基板1所在平面方向上占用的空间，从而避免了由复合栅极10所导致的第一类晶体管5和像素驱动电路2所占用空间的增大。
可选的，为进一步提高像素驱动电路2的工作稳定性，可将第二类晶体管6设置为稳定性较高的低温多晶硅晶体管。
可选的，请再次参见图4，像素驱动电路2包括：第一存储电容27，第一存储电容27的第一极板与电源信号线PVDD电连接；第一晶体管T1，第一晶体管T1的栅极与发光控制信号线Emit电连接，第一晶体管T1的源极与电源信号线PVDD电连接；第二晶体管T2，第二晶体管T2的栅极与第二扫描信号线Scan2电连接，第二晶体管T2的源极与数据线Data电连接，第二晶体管T2的漏极与第一晶体管T1的漏极电连接；第三晶体管T3，第三晶体管T3的栅极与第一存储电容27的第二极板电连接，第三晶体管T3的源极与第二晶体管T2的漏极电连接；第四晶体管T4，第四晶体管T4为第一类晶体管5，第四晶体管T4的复合栅极10与第二扫描信号线Scan2电连接，第四晶体管T4的复合源极11与第一存储电容27的第二极板电连接，第四晶体管T4的复合漏极12与第三晶体管T3的漏极电连接；第五晶体管T5，第五晶体管T5为第一类晶体管5，第五晶体管T5的复合栅极10与第一扫描信号线Scan1电连接，第五晶体管T5的复合源极11与参考信号线Vref电连接，第五晶体管T5的复合漏极12与第一存储电容27的第二极板电连接；第六晶体管T6，第六晶体管T6的栅极与发光控制信号线Emit电连接，第六晶体管T6的源极与第四晶体管T4的复合漏极12电连接，第六晶体管T6的漏极与第一有机发光元件D1的阳极电连接；第七晶体管T7，第七晶体管T7的栅极与第一扫描信号线Scan1电连接，第七晶体管T7的源极与参考信号线Vref电连接，第七晶体管T7的漏极与第一有机发光元件D1的阳极电连接。
其中，该像素驱动电路2的工作原理与图1所示的像素驱动电路2的工作原理类似，此处不再重复说明。通过将第四晶体管T4和第五晶体管T5均设置为第一类晶体管5，在发光阶段，第四晶体管T4和第五晶体管T5关断，由于第四晶体管T4和第五晶体管T5在关断状态下漏电流较小，因而显著改善了漏电流对第一节点N1电位的影响，避免了第一节点N1的电位发生偏移，进而有效保证了第一有机发光元件D1的实际发光亮度的准确性；并且，由于第四晶体管T4和第五晶体管T5的稳定性较高，还能提高了整个像素驱动电路2工作状态的稳定性。
可选的，如图13所示，图13为本发明实施例所提供的像素驱动电路的另一种结构示意图，像素驱动电路2包括：第二存储电容28，第二存储电容28的第一极板与电源信号线PVDD电连接；第八晶体管T8，第八晶体管T8为第一类晶体管5，第八晶体管T8的复合栅极10与扫描信号线Scan电连接，第八晶体管T8的复合源极11与数据线Data电连接，第八晶体管T8的复合漏极12与第二存储电容28的第二极板电连接；第九晶体管T9，第九晶体管T9的栅极与第二存储电容28的第二极板电连接，第九晶体管T9的源极与电源信号线PVDD电连接，第九晶体管T9的漏极与第二有机发光元件D2电连接。通过将第八晶体管T8设置为第一类晶体管5，能够改善第八晶体管T8的漏电流对第二节点N2电位的影响，保证第二节点N2的电位的准确性，进而保证第九晶体管T9工作状态的稳定性，有效保证了向第二有机发光元件D2提供其所需的驱动电流，并且，由于第八晶体管T8的稳定性较高，还能提高了整个像素驱动电路2工作状态的稳定性。
本发明实施例还提供了一种显示面板的制作方法，结合图3～图5，如图14所示，图14为本发明实施例所提供的制作方法的流程图，该制作方法包括：
步骤S1：提供衬底基板1。
步骤S2：在衬底基板1上形成像素驱动电路2，像素驱动电路2包括存储电容3和晶体管；其中，晶体管包括第一类晶体管5和第二类晶体管6，第一类晶体管5为复合型晶体管，第一类晶体管5包括串联的第一子晶体管7和第二子晶体管8，第一子晶体管7为低温多晶硅晶体管，第二子晶体管8为氧化物晶体管；第一类晶体管5包括复合有源层9、复合栅极10、复合源极11和复合漏极12，第一类晶体管5的复合源极11或复合漏极12与存储电容3电连接，或者，在发光阶段，第一类晶体管5处于关断状态。
采用本发明实施例所提供的制作方法，第一类晶体管5包括串联的低温多晶硅晶体管和氧化物晶体管，能够使第一类晶体管5兼具关断状态下漏电流较小和稳定性较高的特性，既能够改善漏电流对存储电容3所存储的电位产生影响，提高像素驱动电路2中节点电压的稳定性，从而提高发光二极管实际发光亮度的准确性，还能够提高自身工作的稳定性，进而提高整个像素驱动电路2工作状态的稳定性。
可选的，结合图5，第一子晶体管7包括第一有源层13、第一栅极14和第一源极15，第二子晶体管8包括第二有源层17、第二栅极18和第二漏极20；如图15和图16所示，图15为本发明实施例提供的制作方法的另一种流程图，图16为图15对应的制作方法的结构示意图，形成第一类晶体管5的过程包括：
步骤K1：在衬底基板1上形成第一有源层13，第一有源层13具体可由低温多晶硅材料形成。
步骤K2：在第一有源层13背向衬底基板1的一侧形成第一绝缘层22。
步骤K3：在第一绝缘层22背向衬底基板1的一侧形成第一栅极14，第一栅极14复用为第二栅极18，其中，复合栅极10为第一栅极14。此时，在单个第一类晶体管5中，仅需设置一个栅极作为复合栅极10即可，不仅简化了制作工艺，而且降低了复合栅极10占用的空间。
步骤K4：在第一栅极14背向衬底基板1的一侧形成第二绝缘层23。
步骤K5：在第二绝缘层23背向衬底基板1的一侧形成第二有源层17，第二有源层17与第一有源层13电连接，且第二有源层17在衬底基板1上的正投影与第一有源层13在衬底基板1上的正投影交叠，其中，复合有源层9包括第一有源层13和第二有源层17。
令第一有源层13和第二有源层17在垂直于衬底基板1所在平面的方向上交叠，能够降低第一有源层13和第二有源层17在平行于衬底基板1所在平面方向上占用的空间，也就是降低第一类子晶体管占用的空间，从而实现降低单个像素驱动电路2占用的空间，提高单位面积内设置的像素驱动电路2的数量，进而提高了显示面板的分辨率。
步骤K6：在第二有源层17背向衬底基板1的一侧形成第三绝缘层25。
步骤K7：在第三绝缘层25背向衬底基板1的一侧形成第一源极15和第二漏极20，第一源极15与第一有源层13电连接，第二漏极20与第二有源层17电连接，其中，复合源极11为第一源极15，复合漏极12为第二漏极20。
进一步的，结合图8和图9，第一源极15通过辅助连接部24与第一有源层13电连接，辅助连接部24与第一栅极14同层设置，或，辅助连接部24与第二有源层17同层设置。结合上述实施例中对第一有源层13、第一栅极14、第一辅助连接部21、第二有源层17和第一源极15的工艺流程的具体说明，通过设置辅助连接部24，在对第一有源层13的源漏接触区进行氢氟酸处理后，能够避免氢氟酸对第二有源层17造成腐蚀。此外，辅助连接部24与第一栅极14或第二有源层17同层设置，辅助连接部24无需额外占用膜层空间，不仅能够简化工艺流程，还有利于实现显示面板的轻薄化设计。
可选的，结合图10，第一子晶体管7包括第一有源层13、第一栅极14和第一源极15，第二子晶体管8包括第二有源层17、第二栅极18和第二漏极20；如图17和图18所示，图17为本发明实施例提供的制作方法的另一种流程图，图18为图17对应的制作方法的结构示意图，形成第一类晶体管5的过程包括：
步骤H1：在衬底基板1上形成第一栅极14。
步骤H2：在第一栅极14背向衬底基板1的一侧形成第一绝缘层22。
步骤H3：在第一绝缘层22背向衬底基板1的一侧形成第一有源层13。
步骤H4：在第一有源层13背向衬底基板1的一侧形成第二绝缘层23。
步骤H5：在第二绝缘层23背向所述衬底基板1的一侧形成第二有源层17，第二有源层17与第一有源层13电连接，且第二有源层17在衬底基板1上的正投影与第一有源层13在衬底基板1上的正投影交叠，其中，复合有源层9包括第一有源层13和第二有源层17。
令第一有源层13和第二有源层17在垂直于衬底基板1所在平面的方向上交叠，能够降低第一有源层13和第二有源层17在平行于衬底基板1所在平面方向上占用的空间，也就是降低第一类子晶体管占用的空间，从而实现降低单个像素驱动电路2占用的空间，提高单位面积内设置的像素驱动电路2的数量，进而提高了显示面板的分辨率。
步骤H6：在第二有源层17背向衬底基板1的一侧形成第三绝缘层25。
步骤H7：在第三绝缘层25背向衬底基板1的一侧形成第二栅极18、第一源极15和第二漏极20，第二栅极18与第一栅极14电连接，第一源极15与第一有源层13电连接，第二漏极20与第二有源层17电连接，其中，复合栅极10包括第一栅极14和第二栅极18，复合源极11为第一源极15，复合漏极12为第二漏极20。
当复合栅极10包括第一栅极14和第二栅极18时，第一栅极14位于第一有源层13朝向衬底基板1的一侧，可以减小第一有源层13和第二有源层17之间的绝缘层的厚度，从而提高第一有源层13和第二有源层17的连接稳定性；并且，第二栅极18与复合源极11、复合漏极12同层设置，第二栅极18无需额外占用膜层空间，不会导致显示面板厚度的增大。
可选的，为进一步提高像素驱动电路2的工作稳定性，可将第二类晶体管6设置为稳定性较高的低温多晶硅晶体管。
本发明实施例还提供了一种显示装置，如图19所示，图19为本发明实施例所提供的显示装置的结构示意图，该显示装置包括上述显示面板100。其中，显示面板100的具体结构已经在上述实施例中进行了详细说明，此处不再赘述。当然，图19所示的显示装置仅仅为示意说明，该显示装置可以是例如手机、平板计算机、笔记本电脑、电纸书或电视机等任何包括显示功能的电子设备。
由于本发明实施例所提供的显示装置包括上述显示面板100，因此，采用该显示装置，既能够改善漏电流对存储电容3所存储的电位产生影响，提高像素驱动电路2中节点电压的稳定性，从而提高发光二极管实际发光亮度的准确性，还能够提高自身工作的稳定性，提高整个像素驱动电路2工作状态的稳定性，进而优化显示性能。
以上所述仅为本发明的较佳实施例而已，并不用以限制本发明，凡在本发明的精神和原则之内，所做的任何修改、等同替换、改进等，均应包含在本发明保护的范围之内。
最后应说明的是：以上各实施例仅用以说明本发明的技术方案，而非对其限制；尽管参照前述各实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。

Claims (7)

1.一种显示面板，其特征在于，包括：
衬底基板；
形成于所述衬底基板的多个像素驱动电路，所述像素驱动电路包括存储电容和晶体管；
其中，所述晶体管包括第一类晶体管和第二类晶体管，所述第一类晶体管为复合型晶体管，所述第一类晶体管包括串联的第一子晶体管和第二子晶体管，所述第一子晶体管为低温多晶硅晶体管，所述第二子晶体管为氧化物晶体管；所述第一类晶体管包括复合有源层、复合栅极、复合源极和复合漏极，所述第一类晶体管的所述复合源极或所述复合漏极与所述存储电容电连接，或者，在发光阶段，所述第一类晶体管处于关断状态；
所述像素驱动电路包括：
第一存储电容，所述第一存储电容的第一极板与电源信号线电连接；
第三晶体管，所述第三晶体管的所述栅极与所述第一存储电容的第二极板电连接；
第五晶体管，所述第五晶体管为所述第一类晶体管，所述第五晶体管的所述复合栅极与第一扫描信号线电连接，所述第五晶体管的所述复合源极与参考信号线电连接，所述第五晶体管的所述复合漏极与所述第一存储电容的第二极板电连接；
在所述第五晶体管中，所述第二子晶体管位于所述第一子晶体管靠近所述第三晶体管的所述栅极的一侧；
所述第一子晶体管包括第一有源层、第一栅极和第一源极，所述第一源极与所述第一有源层电连接；所述第二子晶体管包括第二有源层、第二栅极和第二漏极，所述第二漏极与所述第二有源层电连接，所述第一有源层与所述第二有源层电连接；
其中，所述复合有源层包括第一有源层和第二有源层，所述复合源极为所述第一源极，所述复合漏极为所述第二漏极；
所述第二有源层位于所述第一有源层背向所述衬底基板的一侧，并且，在垂直于所述衬底基板所在平面的方向上，所述第二有源层与所述第一有源层交叠；
所述第一栅极复用为所述第二栅极，所述复合栅极为所述第一栅极；
所述第一栅极位于所述第一有源层和所述第二有源层之间，所述第一源极位于所述第二有源层背向所述衬底基板的一侧；
所述第一源极通过辅助连接部与所述第一有源层电连接，所述辅助连接部与所述第一栅极同层设置，或，所述辅助连接部与所述第二有源层同层设置。
2.根据权利要求1所述的显示面板，其特征在于，所述第一栅极位于所述第一有源层朝向所述衬底基板的一侧。
3.根据权利要求1所述的显示面板，其特征在于，所述第二类晶体管为所述低温多晶硅晶体管。
4.根据权利要求1所述的显示面板，其特征在于，所述像素驱动电路包括：
第一晶体管，所述第一晶体管的栅极与发光控制信号线电连接，所述第一晶体管的源极与所述电源信号线电连接；
第二晶体管，所述第二晶体管的所述栅极与第二扫描信号线电连接，所述第二晶体管的所述源极与数据线电连接，所述第二晶体管的漏极与所述第一晶体管的所述漏极电连接；
所述第三晶体管的所述源极与所述第二晶体管的所述漏极电连接；
第四晶体管，所述第四晶体管为所述第一类晶体管，所述第四晶体管的所述复合栅极与所述第二扫描信号线电连接，所述第四晶体管的所述复合源极与所述第一存储电容的第二极板电连接，所述第四晶体管的所述复合漏极与所述第三晶体管的所述漏极电连接；
第六晶体管，所述第六晶体管的所述栅极与所述发光控制信号线电连接，所述第六晶体管的所述源极与所述第四晶体管的所述复合漏极电连接，所述
第六晶体管的所述漏极与第一有机发光元件的阳极电连接；
第七晶体管，所述第七晶体管的所述栅极与所述第一扫描信号线电连接，所述第七晶体管的所述源极与所述参考信号线电连接，所述第七晶体管的所述漏极与所述第一有机发光元件的阳极电连接。
5.一种显示面板的制作方法，其特征在于，包括：
提供衬底基板；
在所述衬底基板上形成像素驱动电路，所述像素驱动电路包括存储电容和晶体管；
其中，所述晶体管包括第一类晶体管和第二类晶体管，所述第一类晶体管为复合型晶体管，所述第一类晶体管包括串联的第一子晶体管和第二子晶体管，所述第一子晶体管为低温多晶硅晶体管，所述第二子晶体管为氧化物晶体管；所述第一类晶体管包括复合有源层、复合栅极、复合源极和复合漏极，所述第一类晶体管的所述复合源极或所述复合漏极与所述存储电容电连接，或者，在发光阶段，所述第一类晶体管处于关断状态；
所述像素驱动电路包括：
第一存储电容，所述第一存储电容的第一极板与电源信号线电连接；
第三晶体管，所述第三晶体管的所述栅极与所述第一存储电容的第二极板电连接；
第五晶体管，所述第五晶体管为所述第一类晶体管，所述第五晶体管的所述复合栅极与第一扫描信号线电连接，所述第五晶体管的所述复合源极与参考信号线电连接，所述第五晶体管的所述复合漏极与所述第一存储电容的第二极板电连接；
在所述第五晶体管中，所述第二子晶体管位于所述第一子晶体管靠近所述第三晶体管的所述栅极的一侧；
所述第一子晶体管包括第一有源层、第一栅极和第一源极，所述第二子晶体管包括第二有源层、第二栅极和第二漏极；
形成所述第一类晶体管的过程包括：
在所述衬底基板上形成所述第一有源层；
在所述第一有源层背向所述衬底基板的一侧形成第一绝缘层；
在所述第一绝缘层背向所述衬底基板的一侧形成所述第一栅极，所述第一栅极复用为所述第二栅极，其中，所述复合栅极为所述第一栅极；
在所述第一栅极背向所述衬底基板的一侧形成第二绝缘层；
在所述第二绝缘层背向所述衬底基板的一侧形成所述第二有源层，所述第二有源层与所述第一有源层电连接，且所述第二有源层在所述衬底基板上的正投影与所述第一有源层在所述衬底基板上的正投影交叠，其中，所述复合有源层包括所述第一有源层和所述第二有源层；
在所述第二有源层背向所述衬底基板的一侧形成第三绝缘层；
在所述第三绝缘层背向所述衬底基板的一侧形成所述第一源极和所述第二漏极，所述第一源极与所述第一有源层电连接，所述第二漏极与所述第二有源层电连接，其中，所述复合源极为所述第一源极，所述复合漏极为所述第二漏极；
所述第一源极通过辅助连接部与所述第一有源层电连接，所述辅助连接部与所述第一栅极同层设置，或，所述辅助连接部与所述第二有源层同层设置。
6.根据权利要求5所述的制作方法，其特征在于，所述第二类晶体管为所述低温多晶硅晶体管。
7.一种显示装置，其特征在于，包括如权利要求1～4任一项所述的显示面板。
CN201911054266.3A 2019-10-31 2019-10-31 显示面板及其制作方法、显示装置 Active CN110648629B (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201911054266.3A CN110648629B (zh) 2019-10-31 2019-10-31 显示面板及其制作方法、显示装置
US16/732,084 US10984725B1 (en) 2019-10-31 2019-12-31 Display panel, method for manufacturing the same, and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201911054266.3A CN110648629B (zh) 2019-10-31 2019-10-31 显示面板及其制作方法、显示装置

Publications (2)

Publication Number Publication Date
CN110648629A CN110648629A (zh) 2020-01-03
CN110648629B true CN110648629B (zh) 2023-09-22

Family

ID=69014037

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201911054266.3A Active CN110648629B (zh) 2019-10-31 2019-10-31 显示面板及其制作方法、显示装置

Country Status (2)

Country Link
US (1) US10984725B1 (zh)
CN (1) CN110648629B (zh)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11088229B1 (en) * 2020-01-17 2021-08-10 Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Pixel driving circuit and manufacturing method thereof
CN111312174B (zh) * 2020-02-25 2021-05-25 厦门天马微电子有限公司 有机发光显示装置的驱动方法及有机发光显示装置
CN111199709A (zh) * 2020-03-02 2020-05-26 京东方科技集团股份有限公司 一种像素驱动电路及其控制方法、显示面板
CN111179859B (zh) 2020-03-16 2021-03-02 京东方科技集团股份有限公司 一种像素电路、显示面板及显示装置
KR20210119611A (ko) * 2020-03-24 2021-10-06 삼성디스플레이 주식회사 표시 장치
CN111508435B (zh) * 2020-04-29 2021-08-03 昆山国显光电有限公司 像素驱动电路、显示面板及终端设备
CN111445848B (zh) * 2020-04-30 2021-10-08 京东方科技集团股份有限公司 像素驱动电路及其驱动方法、显示基板
CN111754920A (zh) * 2020-07-17 2020-10-09 武汉华星光电半导体显示技术有限公司 像素驱动电路及其驱动方法、显示面板
CN112071268B (zh) * 2020-08-12 2022-02-22 武汉华星光电半导体显示技术有限公司 显示面板和显示装置
WO2022052008A1 (zh) * 2020-09-10 2022-03-17 京东方科技集团股份有限公司 显示基板和显示面板
CN112925144A (zh) * 2021-03-23 2021-06-08 京东方科技集团股份有限公司 一种像素结构、阵列基板、显示面板以及显示设备
CN113112960A (zh) * 2021-04-08 2021-07-13 京东方科技集团股份有限公司 一种像素电路及其驱动方法、显示装置
GB2614200A (en) * 2021-04-28 2023-06-28 Boe Technology Group Co Ltd Display substrate and display panel
WO2023004785A1 (zh) 2021-07-30 2023-02-02 京东方科技集团股份有限公司 显示面板、显示装置
CN114220382B (zh) * 2021-12-10 2023-05-05 湖北长江新型显示产业创新中心有限公司 像素驱动电路、显示面板和显示装置
US11955082B2 (en) 2022-05-30 2024-04-09 Chongqing Boe Display Technology Co., Ltd. Pixel circuit, driving method thereof, display substrate and display apparatus
KR20240007820A (ko) * 2022-07-07 2024-01-17 삼성디스플레이 주식회사 화소 및 이를 포함하는 표시 장치

Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08148693A (ja) * 1994-09-22 1996-06-07 Sanyo Electric Co Ltd 薄膜トランジスタ及びその製造方法
CN101887684A (zh) * 2009-05-12 2010-11-17 索尼公司 显示装置
CN103367353A (zh) * 2012-03-30 2013-10-23 东莞万士达液晶显示器有限公司 主动元件及主动元件阵列基板
JP2014109707A (ja) * 2012-12-03 2014-06-12 Samsung Display Co Ltd 電気光学装置の駆動方法および電気光学装置
CN104332473A (zh) * 2014-08-29 2015-02-04 京东方科技集团股份有限公司 一种阵列基板、其制备方法、显示面板和显示装置
CN105047722A (zh) * 2015-08-19 2015-11-11 京东方科技集团股份有限公司 一种薄膜晶体管及其制作方法、阵列基板、显示面板
CN105633101A (zh) * 2016-04-01 2016-06-01 京东方科技集团股份有限公司 Tft阵列基板及其制造方法、显示装置
CN107591124A (zh) * 2017-09-29 2018-01-16 上海天马微电子有限公司 像素补偿电路、有机发光显示面板及有机发光显示装置
CN108767016A (zh) * 2018-05-21 2018-11-06 京东方科技集团股份有限公司 一种薄膜晶体管及其制作方法、阵列基板、显示装置
CN209045568U (zh) * 2018-09-20 2019-06-28 长鑫存储技术有限公司 晶体管和半导体存储器
CN110164384A (zh) * 2018-09-29 2019-08-23 京东方科技集团股份有限公司 一种亮度补偿方法及装置
CN110211974A (zh) * 2019-06-12 2019-09-06 厦门天马微电子有限公司 一种阵列基板、显示面板及阵列基板的制造方法
CN110379371A (zh) * 2019-01-28 2019-10-25 苹果公司 包括具有氧化物晶体管阈值电压补偿的显示器的电子设备

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8049253B2 (en) * 2007-07-11 2011-11-01 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
CN101847648B (zh) * 2009-03-23 2012-11-21 北京京东方光电科技有限公司 有源矩阵有机发光二极管像素结构及其制造方法
TWI397184B (zh) * 2009-04-29 2013-05-21 Ind Tech Res Inst 氧化物半導體薄膜電晶體
US9818763B2 (en) * 2013-07-12 2017-11-14 Semiconductor Energy Laboratory Co., Ltd. Display device and method for manufacturing display device
CN103715147B (zh) * 2013-12-27 2016-08-17 京东方科技集团股份有限公司 互补型薄膜晶体管驱动背板及其制作方法、显示面板
US10121430B2 (en) * 2015-11-16 2018-11-06 Apple Inc. Displays with series-connected switching transistors
US10332446B2 (en) * 2015-12-03 2019-06-25 Innolux Corporation Driving circuit of active-matrix organic light-emitting diode with hybrid transistors
TWI722048B (zh) * 2016-06-10 2021-03-21 日商半導體能源研究所股份有限公司 顯示裝置及電子裝置
CN107086227B (zh) * 2017-05-11 2020-02-21 京东方科技集团股份有限公司 发光电路、电子装置、薄膜晶体管及其制备方法
KR102405932B1 (ko) * 2017-09-14 2022-06-08 삼성디스플레이 주식회사 유기 발광 표시 장치

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08148693A (ja) * 1994-09-22 1996-06-07 Sanyo Electric Co Ltd 薄膜トランジスタ及びその製造方法
CN101887684A (zh) * 2009-05-12 2010-11-17 索尼公司 显示装置
CN103367353A (zh) * 2012-03-30 2013-10-23 东莞万士达液晶显示器有限公司 主动元件及主动元件阵列基板
JP2014109707A (ja) * 2012-12-03 2014-06-12 Samsung Display Co Ltd 電気光学装置の駆動方法および電気光学装置
CN104332473A (zh) * 2014-08-29 2015-02-04 京东方科技集团股份有限公司 一种阵列基板、其制备方法、显示面板和显示装置
CN105047722A (zh) * 2015-08-19 2015-11-11 京东方科技集团股份有限公司 一种薄膜晶体管及其制作方法、阵列基板、显示面板
CN105633101A (zh) * 2016-04-01 2016-06-01 京东方科技集团股份有限公司 Tft阵列基板及其制造方法、显示装置
CN107591124A (zh) * 2017-09-29 2018-01-16 上海天马微电子有限公司 像素补偿电路、有机发光显示面板及有机发光显示装置
CN108767016A (zh) * 2018-05-21 2018-11-06 京东方科技集团股份有限公司 一种薄膜晶体管及其制作方法、阵列基板、显示装置
CN209045568U (zh) * 2018-09-20 2019-06-28 长鑫存储技术有限公司 晶体管和半导体存储器
CN110164384A (zh) * 2018-09-29 2019-08-23 京东方科技集团股份有限公司 一种亮度补偿方法及装置
CN110379371A (zh) * 2019-01-28 2019-10-25 苹果公司 包括具有氧化物晶体管阈值电压补偿的显示器的电子设备
CN110211974A (zh) * 2019-06-12 2019-09-06 厦门天马微电子有限公司 一种阵列基板、显示面板及阵列基板的制造方法

Also Published As

Publication number Publication date
US10984725B1 (en) 2021-04-20
CN110648629A (zh) 2020-01-03
US20210134224A1 (en) 2021-05-06

Similar Documents

Publication Publication Date Title
CN110648629B (zh) 显示面板及其制作方法、显示装置
CN110610684B (zh) 一种有机电致发光显示面板及显示装置
US11393397B2 (en) Pixel driving circuit, pixel unit and driving method, array substrate, and display device
WO2018161463A1 (zh) 像素电路和具有该像素电路的显示装置
US10490136B2 (en) Pixel circuit and display device
US10262584B2 (en) Pixel circuit, method for driving the same, array substrate and display device
CN109801592B (zh) 像素电路及其驱动方法、显示基板
US11183120B2 (en) Pixel array substrate having common electrodes distributed in plurality of pixel rows and driving method thereof
CN114550653B (zh) 像素驱动电路以及显示装置
JP4547605B2 (ja) 表示装置及びその駆動方法
WO2021175150A1 (zh) 像素驱动电路及其控制方法、显示面板
CN113744683B (zh) 像素电路、驱动方法和显示装置
TW200844954A (en) Pixel circuit and display apparatus as well as fabrication method for display apparatus
CN117765880A (zh) 像素电路、驱动方法、电致发光显示面板及显示装置
CN110706654A (zh) 一种oled像素补偿电路及oled像素补偿方法
CN114664253B (zh) 像素电路、像素驱动方法及显示装置
CN113707089A (zh) 一种像素驱动电路、显示面板及显示装置
WO2020143215A1 (zh) 像素电路及其驱动方法、显示装置
WO2020206857A1 (zh) 像素驱动电路及显示面板
WO2018157619A1 (zh) 一种像素驱动电路及其驱动方法、显示装置
CN111369944A (zh) 像素结构及其驱动方法、显示装置
CN114882834A (zh) 像素驱动电路、像素驱动方法和显示面板
CN114783378A (zh) 像素驱动电路、像素驱动方法及显示面板
CN115101005B (zh) 像素电路及显示面板
CN213988253U (zh) 有机显示模组像素电路

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant