CN109860136A - 集成扇出封装件及其形成方法 - Google Patents
集成扇出封装件及其形成方法 Download PDFInfo
- Publication number
- CN109860136A CN109860136A CN201810707996.8A CN201810707996A CN109860136A CN 109860136 A CN109860136 A CN 109860136A CN 201810707996 A CN201810707996 A CN 201810707996A CN 109860136 A CN109860136 A CN 109860136A
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- Prior art keywords
- tube core
- opening
- moulding compound
- redistribution
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
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- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
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- H01L25/162—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits the devices being mounted on two or more different substrates
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Abstract
方法包括将第一管芯和第二管芯附接至载体;在第一管芯和第二管芯之间形成模塑料;以及在第一管芯、第二管芯和模塑料上方形成再分布结构,再分布结构包括第一再分布区域;第二再分布区域;以及位于第一再分布区域和第二再分布区域之间的切割区域。该方法还包括在切割区域中形成第一开口和第二开口,第一开口和第二开口延伸穿过再分布结构并且暴露模塑料;以及从模塑料的第二侧朝向模塑料的第一侧通过切割穿过模塑料的与切割区域对准的部分来分离第一管芯和第二管芯,第二侧与第一侧相对。本发明实施例涉及集成扇出封装件及其形成方法。
Description
技术领域
本发明实施例涉及集成扇出封装件及其形成方法。
背景技术
由于各个电组件(例如,晶体管、二极管、电阻器、电容器等)的集成密度的持续改进,半导体工业已经经历了快速增长。对于大部分而言,这种集成密度的改进来自于最小部件尺寸的连续减小,这使得更多的组件集成到给定的区域。随着最近对更小的电子器件的需求的增长,对半导体管芯的更小且更具创造性的封装技术的需求已经出现。
这些封装技术的实例是叠层封装(POP)技术。在PoP封装件中,顶部半导体封装件堆叠在底部半导体封装件的顶部上以允许高集成度和组件密度。另一个实例是多芯片模块(MCM)技术,其中,将多个半导体管芯封装在一个半导体封装件中以提供具有集成功能的半导体器件。
先进的封装技术的高集成度使得能够产生具有增强的功能和较小的覆盖区的半导体器件,这对于诸如手机、平板电脑和数字音乐播放器的小型器件是有利的。另一个优势是连接半导体封装件内的互操作部分的导电路径的长度缩短。这提高了半导体器件的电性能,这是由于电路之间互连的更短的路径产生更快的信号传播并且减少了噪声和串扰。
发明内容
根据本发明的一些实施例,提供了一种形成半导体封装件的方法,包括:将第一管芯和第二管芯附接至载体;在所述第一管芯和所述第二管芯之间形成模塑料;在所述第一管芯、所述第二管芯和所述模塑料上方形成再分布结构,所述再分布结构包括:第一再分布区域,位于所述第一管芯上方;第二再分布区域,位于所述第二管芯上方;和切割区域,位于所述第一再分布区域和所述第二再分布区域之间;在所述切割区域中形成第一开口和第二开口,所述第一开口和所述第二开口延伸穿过所述再分布结构并且暴露所述模塑料的第一侧;以及通过切割穿过所述模塑料的与所述切割区域对准的部分来分离所述第一管芯和所述第二管芯,其中,从所述模塑料的第二侧朝向所述模塑料的第一侧实施所述切割,所述第二侧与所述第一侧相对。
根据本发明的另一些实施例,还提供了一种形成半导体封装件的方法,包括:在载体的第一侧上方形成第一导电柱和第二导电柱;将所述第一管芯和所述第二管芯附接至所述载体的第一侧,所述第一管芯和所述第二管芯分别邻近所述第一导电柱和所述第二导电柱;在所述载体的第一侧上方形成模塑料,所述模塑料沿着所述第一管芯的侧壁、所述第二管芯的侧壁、所述第一导电柱的侧壁和所述第二导电柱的侧壁延伸;在所述第一管芯、所述第二管芯和所述模塑料上方形成再分布结构,所述再分布结构包括位于所述第一管芯上方的第一再分布区域、位于所述第二管芯上方的第二再分布区域以及位于所述第一再分布区域和所述第二再分布区域之间的切割区域;去除所述切割区域中的所述再分布结构的部分以形成靠近所述第一管芯的第一开口和靠近所述第二管芯的第二开口,所述第一开口通过所述切割区域中的所述再分布结构的剩余部分与所述第二开口分隔开;使所述载体脱粘;将所述第一半导体封装件电连接至所述第一导电柱;将所述第二半导体封装件电连接至所述第二导电柱;以及使用刀片从所述第一管芯的背侧切割穿过所述模塑料,所述切割将所述第一管芯与所述第二管芯分离。
根据本发明的又一些实施例,还提供了一种半导体封装件,包括:下封装件,包括:管芯和靠近所述管芯的导电柱,所述管芯和所述导电柱位于再分布结构上方;以及模塑料,位于所述再分布结构上方,所述模塑料插入在所述管芯和所述导电柱之间,所述模塑料延伸超出所述再分布结构的横向范围。
附图说明
当结合附图进行阅读时,从以下详细描述可最佳理解本发明的各个方面。应该指出,根据工业中的标准实践,各个部件未按比例绘制。实际上,为了清楚的讨论,各个部件的尺寸可以任意地增大或减小。
图1至图6、图7A、图7B和图8至图11示出了根据实施例的处于各个制造阶段的半导体封装件的各个视图。
图12示出了根据一些实施例的用于形成半导体封装件的方法的流程图。
具体实施方式
以下公开内容提供了许多用于实现本发明的不同特征的不同实施例或实例。下面描述了组件和布置的具体实例以简化本发明。当然,这些仅仅是实例,而不旨在限制本发明。例如,以下描述中,在第二部件上方或者上形成第一部件可以包括第一部件和第二部件直接接触形成的实施例,并且也可以包括在第一部件和第二部件之间可以形成额外的部件,从而使得第一部件和第二部件可以不直接接触的实施例。
而且,为便于描述,在此可以使用诸如“在…之下”、“在…下方”、“下部”、“在…之上”、“上部”等空间相对术语,以描述如图所示的一个元件或部件与另一个(或另一些)原件或部件的关系。除了图中所示的方位外,空间相对术语旨在包括器件在使用或操作中的不同方位。装置可以以其他方式定向(旋转90度或在其他方位上),而本文使用的空间相对描述符可以同样地作出相应的解释。
本发明的实施例在半导体封装件和形成半导体封装件的方法的上下文中讨论,并且更具体地,在集成扇出(InFO)半导体封装件的上下文中讨论。在一些实施例中,在载体上方形成多个半导体管芯和导电柱,并且在载体上方和管芯周围以及导电柱周围形成模塑料。在模塑料、管芯和导电柱上方形成再分布结构以形成半导体结构,该半导体结构包括将在随后的工艺中切割的多个单独的半导体封装件。根据一些实施例,在管芯周围的再分布结构中不形成密封环,这节省了用于密封环的空间并且允许在载体上方形成更多单独的半导体封装件,从而提高了制造工艺的生产能力。在一些实施例中,为了分离单独的半导体封装件,实施预切割工艺以在半导体结构的第一侧(例如,在再分布结构的切割区域中)形成开口,随后从半导体结构的与第一侧相对的第二侧开始切割工艺。由预切割工艺形成的开口可以防止或减少切割工艺期间再分布结构的分层。
图1至图6、图7A、图7B和图8至图11示出了根据实施例的处于各个制造阶段的叠层封装(PoP)半导体封装件500的各个视图(例如截面图、俯视图)。具体地,图1至图6、图7A、图7B和图8示出了PoP封装件的一个或多个底部封装件1100(例如,1100A、1100B)的各个视图,并且图9至图11示出了在顶部封装件160(例如,160A、160B)附接至底部封装件1100之后的PoP封装件的截面图。
参照图1,在载体101上方形成可以是缓冲层的介电层110。在介电层110上方形成导电柱119。
载体101可以由诸如硅、聚合物、聚合物复合材料、金属箔、陶瓷、玻璃、玻璃环氧树脂、氧化铍、带或用于结构支撑的其他合适材料的材料制成。在一些实施例中,介电层110由聚合物,诸如聚苯并恶唑(PBO)、聚酰亚胺、苯并环丁烯(BCB)等;氮化物,诸如氮化硅;氧化物,诸如氧化硅、磷硅酸盐玻璃(PSG)、硼硅酸盐玻璃(BSG)、硼掺杂的磷硅酸盐玻璃(BPSG)等形成。可以通过诸如旋涂、化学汽相沉积(CVD)、层压等或它们的组合的合适的沉积工艺形成介电层110。
在一些实施例中,在形成介电层110之前,在载体101上方沉积或层压粘合层(未示出)。粘合层可以是感光的并且可以通过例如在随后的载体脱粘工艺中在载体101上照射超紫外(UV)光而容易地从载体101脱离。例如,粘合层可以是由明尼苏达州圣保罗的3M公司或其他供应商制造的光热转换(LTHC)涂层。
仍参照图1,在介电层110上方形成导电柱119。导电柱119可以通过以下步骤形成:在介电层110上方形成晶种层;在晶种层上方形成图案化的光刻胶,其中,图案化的光刻胶中的每个开口均对应于将要形成的导电柱119的位置;使用例如电镀或化学镀用诸如铜的导电材料填充开口;使用例如灰化或剥离工艺去除光刻胶;以及去除晶种层的其上未形成导电柱119的部分。用于形成导电柱119的其他方法也是可能的并且均完全地旨在包括在本发明的范围内。在一些实施例中,省略介电层110,并且在沉积或层压在载体101上方的粘合层(例如,LTHC涂层)上形成导电柱119。
下一步,在图2中,将半导体管芯120(也可以称为管芯或集成电路(IC)管芯)附接至介电层110的上表面。诸如管芯附接模(DAF)的粘合膜118可以用于将管芯120附接至介电层110。
在粘合至介电层110之前,可以根据可应用的制造工艺处理管芯120以在管芯120中形成集成电路。例如,管芯120可以包括半导体衬底和一个或多个上面的金属化层,共同示出为元件121。半导体衬底可以是例如掺杂或未掺杂的硅,或绝缘体上半导体(SOI)衬底的有源层。半导体衬底可以包括其他半导体材料,诸如锗;化合物半导体,包括碳化硅、砷化镓、磷化镓、氮化镓、磷化铟、砷化铟和/或锑化铟;合金半导体,包括SiGe、GaAsP、AlInAs、AlGaAs、GaInAs、GaInP和/或GaInAsP;或它们的组合。也可以使用诸如多层衬底或梯度衬底的其他衬底。诸如晶体管、二极管、电容器、电阻器等的器件(未示出)可以形成在半导体衬底中和/或上,并且可以通过金属化层互连以形成集成电路,金属化层例如位于半导体衬底上方的一个或多个介电层中的金属化图案。
管芯120还包括制成外部连接的焊盘126,诸如铝焊盘。焊盘126位于可以称为管芯120的有源侧或前侧的位置上。在管芯120的前侧处和焊盘126的部分上形成钝化膜127。形成穿过钝化膜127延伸至焊盘126的开口。诸如导电柱(例如,包括诸如铜的金属)的管芯连接件128延伸至穿过钝化膜127的开口内并且机械和电连接至相应的焊盘126。可以通过例如镀等形成管芯连接件128。管芯连接件128电连接管芯120的集成电路。
在管芯120的有源侧处(诸如在钝化膜127和/或管芯连接件128上)形成介电材料129。介电材料129横向密封管芯连接件128,并且介电材料129与管芯120横向共末端。介电材料129可以是聚合物,诸如聚苯并恶唑(PBO)、聚酰亚胺、苯并环丁烯(BCB)等;氮化物,诸如氮化硅等;氧化物,诸如氧化硅、磷硅酸盐玻璃(PSG)、硼硅酸盐玻璃(BSG)、硼掺杂的磷硅酸盐玻璃(BPSG)等;或它们的组合,并且可以例如通过旋涂、层压、CVD等形成。
下一步,在图3中,在介电层110上方、管芯120周围和导电柱119周围形成模塑料130。例如,模塑料130可以包括环氧树脂、有机聚合物、添加或不添加基于二氧化硅或玻璃填料的聚合物或其他材料。在一些实施例中,模塑料130包括施加时为凝胶型液体的液体模塑料(LMC)。当施加时,模塑料130也可以包括液体或固体。可选地,模塑料130可以包括其他绝缘和/或密封材料。在一些实施例中,使用晶圆级模制工艺来施加模塑料130。模塑料130可以使用例如压缩模制、传递模制或其他方法来模制。
下一步,在一些实施例中,使用固化工艺来固化模塑料130。固化工艺可以包括使用退火工艺或其他加热工艺将模塑料130加热至预定的温度并持续预定时间段。固化工艺也可以包括紫外(UV)曝光工艺、红外(IR)能量曝光工艺、它们的组合或它们与加热工艺的组合。可选地,可以使用其他方法来固化模塑料130。在一些实施例中,不包括固化工艺。
可以可选地实施诸如化学和机械抛光(CMP)的平坦化工艺,以去除管芯120的前侧上方的模塑料130的过量部分。在一些实施例中,在平坦化工艺之后,模塑料130、导电柱119以及管芯连接件128具有共面的上表面。
下一步,参照图4,在模塑料130、导电柱119和管芯120上方形成再分布结构140(也可以称为前侧再分布结构)。再分布结构140包括形成在一个或多个介电层(例如,142、144、146和148)中的一层或多层导电部件(例如,导线143、通孔145)。
在一些实施例中,一个或多个介电层(例如,142、144、146和148)由聚合物,诸如聚苯并恶唑(PBO)、聚酰亚胺、苯并环丁烯(BCB)等;氮化物,诸如氮化硅;氧化物,诸如氧化硅、磷硅酸盐玻璃(PSG)、硼硅酸盐玻璃(BSG)、硼掺杂的磷硅酸盐玻璃(BPSG)等形成。可以通过诸如旋涂、化学汽相沉积(CVD)、层压等或它们的组合的合适的沉积工艺形成一个或多个介电层。
在一些实施例中,再分布结构140的导电部件包括由诸如铜、钛、钨、铝等合适的导电材料形成的导线(例如,143)和导电通孔(例如,145)。在一些实施例中,通过在再分布结构140的介电层中形成开口以暴露下面的导电部件,在介电层上方和开口中形成晶种层(未示出),在晶种层上方形成具有设计的图案的图案化的光刻胶(未示出),在设计的图案中和晶种层上方镀(例如,电镀或化学镀)导电材料,并且去除光刻胶和晶种层的其上未形成导电材料的部分来形成导电部件。形成再分布结构140的其他方法也是可能的,并且均完全旨在包括在本发明的范围内。
图4的再分布结构140中的介电层的数量和导电部件的层的数量仅仅是非限制性实例。介电层的其他数量和导电部件的层的其他数量也是可能的并且均完全旨在包括在本发明的范围内。
图4也示出了在再分布结构140上方形成并且电连接至再分布结构140的凸块下金属(UBM)结构147。为了形成UBM结构147,在再分布结构140的最上面的介电层(例如,142)中形成开口以暴露再分布结构140的导电部件(例如,铜线或铜焊盘)。在形成开口之后,UBM结构147可以形成为与暴露的导电部件电接触。在实施例中,UBM结构147包括三个导电材料层,诸如钛层、铜层和镍层。然而,存在适合于形成UBM结构147的许多合适的材料和层布置,诸如铬/铬-铜合金/铜/金的布置、钛/钛钨/铜的布置或铜/镍/金的布置。可以用于UBM结构147的任何合适的材料或材料层均完全旨在包括在本发明的范围内。
UBM结构147可以通过以下步骤形成:在最上面的介电层(例如,142)上方并且沿着最上面的介电层中的开口的内部形成晶种层;在晶种层上方形成图案化的掩模层(例如,光刻胶);在图案化的掩模层的开口中和晶种层上方形成(例如,通过镀)导电材料;去除掩模层并且去除晶种层的其上未形成导电材料的部分。用于形成UBM结构147的其他方法是可能的,并且均完全旨在包括在本发明的范围内。图4中的UBM结构147的上表面示出为平面仅作为实例,UBM结构147的上表面可以不是平面。例如,可以在最上面的介电层(例如,142)上方形成每个UBM结构147的部分(例如,外围部分),并且可以沿着由对应的开口暴露的最上面的介电层的侧壁共形地形成每个UBM结构147的其他部分(例如,中心部分),如本领域技术人员可以理解的。
下一步,在图5中,根据一些实施例,在UBM结构147上方形成连接件155。连接件155可以是焊料球、金属柱、可控塌陷芯片连接(C4)凸块、微凸块、化学镀镍化学镀钯浸金技术(ENEPIG)形成的凸块、它们的组合(例如,具有附接的焊料球的金属柱)等。连接件155可以包括诸如焊料、铜、铝、金、镍、银、钯、锡等或它们的组合的导电材料。在一些实施例中,例如,连接件155包括共晶材料并且可以包括焊料凸块或焊料球。焊料材料可以是例如铅基焊料和无铅焊料,诸如用于铅基焊料的Pb-Sn组分;包括InSb的无铅焊料;锡、银和铜(SAC)组分;以及具有共同熔点并且在电子应用中形成导电焊料连接件的其他共晶材料。例如,对于无铅焊料,可以使用不同组分的SAC焊料,诸如SAC 105(Sn 98.5%、Ag 1.0%、Cu 0.5%)、SAC 305和SAC 405。诸如焊料球的无铅连接件也由不使用银(Ag)的SnCu化合物形成。可选地,无铅焊料连接件可以包括不使用铜的锡和银,Sn-Ag。连接件155可以形成栅格,诸如球栅阵列(BGA)。在一些实施例中,可以实施回流工艺,在一些实施例中给出局部球形形状的连接件155。可选地,连接件155可以包括其他形状。例如,连接件155也可以包括非球形导电连接件。
在一些实施例中,连接件155包括通过溅射、印刷、电镀、化学镀、CVD等形成的金属柱(诸如铜柱),金属柱上具有或不具有焊料材料。金属柱可以是无焊料的并且具有基本垂直的侧壁或锥形侧壁。
图5进一步示出了通过例如UBM结构147电连接至再分布结构140的电子器件171,诸如集成无源器件(IPD)。可以在电子器件171和再分布结构140之间形成诸如焊料接头的导电接头173。导电接头173可以包括与连接件155相同的材料(例如,焊料)。此外,可以在电子器件171和再分布结构140之间的间隙中形成底部填充材料175。
为了说明的目的,图5的实例示出了在载体101上方形成的一个半导体封装件1100。本领域技术人员将理解,可以在与图1至图5示出的相同的工艺步骤中在载体101上方形成数十、数百或甚至更多的半导体封装件(例如,1100)。图6至图10示出了使用在载体101上方形成两个半导体封装件(例如,1100A和1100B)为例对图5的半导体封装件1100的进一步处理,应该理解,可以在载体101上方形成多于两个半导体封装件。
图6示出了分别包括形成在半导体结构的区域100和200中的半导体封装件1100A和半导体封装件1100B的半导体结构。在示出的实施例中,每个半导体封装件1100A和1100B均与图5中示出的半导体封装件1100相同。
如图6示出的,在模塑料130上方和所有管芯120上方连续地形成再分布结构140’。区域100中的再分布结构140’的部分位于区域100中的管芯120/导电柱119上方(例如,正上方)并且电连接至区域100中的管芯120/导电柱119,并且对应于诸如图5中示出的再分布结构140的再分布结构。类似地,区域200中的再分布结构140’的部分位于区域200中的管芯120/导电柱119上方(例如,正上方)并且电连接至区域200中的管芯120/导电柱119,并且对应于诸如图5中示出的再分布结构140的再分布结构。
如图6示出的,再分布结构140’还包括在区域100和200之间的区域300(也可以称为切割区域)中的部分。切割区域300的宽度可以介于约40μm和约260μm之间,诸如约40μm,但是其他尺寸也是可能的。在一些实施例中,区域300中的再分布结构140’的部分仅包括介电层(例如,见图4中的142、144、146、148),并且不存在导电部件(例如,导线、通孔)。此外,在示出的实施例中,在再分布结构140’中不形成密封环。
密封环通常包括伪导电部件,诸如形成在每个半导体封装件(例如,1100A和1100B)的周界周围的再分布结构(例如,140’)中的金属线和金属通孔。换句话说,在平面图中,每个密封环均具有环形(例如,矩形形状)并且环绕相应的半导体封装件(例如,1100A、1100B)。可以在同一工艺步骤中并且使用与再分布结构140’的导线(例如,见图4中的143)和导电通孔(例如,见图4中的145)相同的材料形成密封环的金属线和金属通孔。例如,除了密封环的金属线和金属通孔是电隔离的之外,可以在形成再分布结构140’的导线和导电通孔的相同的介电层中形成密封环的金属线和金属通孔。密封环被构建为在随后的切割工艺期间保护例如半导体封装件的再分布结构免受破裂和/或分层。例如,当切割锯的刀片切入两个相邻密封环之间的切割区域300时,由刀片引起的再分布结构140’中的破裂可以由密封环阻止并且可以避免损坏半导体封装件。类似地,再分布结构140的分层(可能由于切割而发生)也可以由密封环阻止或减少。
然而,密封环在半导体结构中占据空间。例如,密封环的宽度可以为约40μm,并且两个半导体封装件(例如,1100A和1100B)之间的约80μm的总宽度的区用于形成密封环。本发明通过在再分布结构140’中的半导体封装件(例如,1100A和1100B)周围不形成任何密封环来释放在载体101上形成半导体封装件的更多空间。例如,通过不形成密封环,可以在载体上形成约2%以上的半导体封装件,从而实现更高的生产能力。此外,在下文公开的预切割工艺和切割工艺避免或减少在不使用密封环的情况下的再分布结构140’中的破裂/分层。
现在参照图7A,实施预切割工艺以在切割区域300中的再分布结构140’中形成开口311/313。如图7A示出的,靠近半导体封装件1100A形成开口311并且靠近半导体封装件1100B形成开口313。开口311的宽度W1介于约20μm和约80μm之间,并且开口313的宽度W1’介于约20μm和约80μm之间。在一些实施例中,宽度W1与宽度W1’基本相同。在其他实施例中,宽度W1与宽度W1’不同。在开口311的侧壁311E和开口313的侧壁313E之间测量的宽度W2介于约20μm和约80μm之间,其中,侧壁311E是开口311的最靠近半导体封装件1100A的侧壁,并且在一些实施例中,侧壁313E是开口313的最靠近半导体封装件1100B的侧壁。图7A中示出的开口311和313的矩形截面仅仅是非限制性实例。用于开口311和313的截面的其他形状是可能的并且均完全制造包括在本发明的范围内。例如,取决于例如用于形成开口的方法,开口311和313的底部可以具有不规则的形状。
如图7A示出的,去除切割区域300中的再分布结构140’的介电层的部分以形成开口311/313。在图7A的实例中,开口311和313在切割区域300中通过再分布结构140的介电层的剩余部分140R彼此物理分隔开。在一些实施例中,剩余部分140R的宽度W4介于约140μm和200μm之间。此外,也去除了切割区域300中的模塑料130的部分以形成开口。因此,在示出的实施例中,开口311和313穿过再分布结构140并且延伸至模塑料130内。例如,开口311和313可以延伸至模塑料130内的深度在介于约20μm和100μm之间的范围内。
在示例性实施例中,使用两个激光束同时形成开口311和313。换句话说,使用两个激光束平行地形成开口311和313,而不是依次形成开口311和313,以增加生产的生产量,但是使用一个激光束来形成开口311和313是可能的,例如,依次地形成。在一些实施例中,所使用的激光可以是CO2激光、UV激光或绿光激光。例如光纤激光和钇铝石榴石(YAG)激光的其他类型的激光也预期在本发明的范围内。在一些实施例中,激光的平均输出功率在介于约0.5瓦和约8瓦之间的范围内,但是其他输出功率范围也是可能的并且均完全旨在包括在本发明的范围内。激光的平均输出功率由各种因素决定,各种因素诸如再分布结构140’的介电层的材料、开口311/313的深度以及所需的处理速度。
在图7A中,通过预切割工艺形成两个开口311/313,其中,每个开口均在随后的切割工艺中提供防止邻近的半导体封装件的破裂和/或分层的保护,如下文将参照图10更详细地讨论的。具体地,开口311保护半导体封装件1100A的再分布结构,并且开口313保护半导体封装件1100B的再分布结构。在两个邻近的半导体封装件之间形成多于两个的开口可能不是必需的,因为额外的开口(如果形成)不会在切割期间提供防止再分布结构140’的破裂和/或分层的更多额外的保护。另一方面,仅形成一个开口(例如仅形成311或仅形成313)可能不能为两个邻近的半导体封装件中的一个提供保护。虽然可以在两个邻近的半导体封装件之间形成具有宽的宽度的开口(例如,具有从311E延伸至313E的宽度的开口),以提供防止破裂和/或分层的保护,但是形成这种宽开口可能需要显著更长的时间,和/或可能需要更高输出功率的激光。因此,通过预切割工艺在两个邻近的半导体封装件之间形成的两个开口(例如,311和313)与下文参照图10讨论的切割工艺相结合,提供了有效的(例如,更短的制造时间以及更高的生产能力)和易于实施的制造工艺,该制造工艺不需要密封环,但仍能提供防止破裂和分层的保护。
图7B示出了在一些实施例中的图7A的半导体结构的俯视图。除了半导体封装件1100A和1100B之外,在图7B中也示出了形成在载体101上的额外的半导体封装件(例如,1100C、1100D、1100E和1100F)。为了简单起见,图7B中未示出半导体封装件的所有细节。如图7B示出的,通过预切割工艺在相邻半导体封装件之间的切割区域中形成开口(例如,311、313、311’和313’)。在图7B的俯视图中,两个相邻半导体封装件(例如,1100A和1100B)之间的每对开口(例如,311加313)均可以形成两个平行的沟槽。预切割工艺可以沿着对应的半导体封装件的每侧(例如,侧壁)形成两个平行的沟槽。换句话说,在俯视图中,每个半导体封装件均可以由例如四对开口环绕,其中,半导体封装件的每侧均具有沿着半导体封装件的侧面延伸的一对开口(例如,两个平行的沟槽)。
下一步,在图8中,翻转图7A所示的半导体结构,并且将外部连接件155附接至由框架157支撑的带159(例如,切割带)。下一步,通过诸如蚀刻、研磨或机械剥离的合适的工艺使载体101从介电层110脱粘。在载体101和介电层110之间形成粘合层(例如,LTHC膜)的实施例中,通过将载体101暴露于激光或UV光而使载体101脱粘。激光或UV光破坏结合至载体101的粘合层的化学键,并且之后可以使载体101容易地脱离。可以通过载体脱粘工艺去除粘合层(如果形成)。可以通过载体脱粘工艺之后实施的清洗工艺去除粘合层的残留物(如果有的话)。
在使载体101脱粘之后,在介电层110中形成开口116以暴露导电柱119。为了形成开口116,可以使用激光钻孔工艺、蚀刻工艺等。在一些实施例中,蚀刻工艺是等离子体蚀刻工艺。虽然未示出,但是可以使用例如焊膏印刷工艺在开口116中形成焊膏,以准备用于附接顶部封装件(见图9)。
在省略介电层110并且在沉积或层压在载体101上方的粘合层(例如,LTHC涂层)上方形成导电柱119的实施例中,在载体脱粘工艺之后,可以在模塑料130的上表面处暴露导电柱119。因此,可以省略用于暴露导电柱119的钻孔工艺或蚀刻工艺。图8至图11示出了形成介电层110的实施例。本领域技术人员在阅读本发明之后将能够使图8至图11中示出的工艺修改为用于省略介电层110的实施例。
下一步,参照图9,分别将半导体封装件160A和160B(也称为顶部封装件)(诸如存储器封装件)附接至半导体封装件1100A和1100B(也称为底部封装件)以形成图9中的半导体封装件500A和500B,从而形成具有叠层封装(PoP)结构的多个半导体封装件500(例如,500A、500B)。
如图9示出的,每个半导体封装件160(例如,160A、160B)均具有衬底161和附接至衬底161的上表面的一个或多个半导体管芯162(例如,存储器管芯)。在一些实施例中,衬底161包括硅、砷化镓、绝缘体上硅(“SOI”)或其他类似的材料。在一些实施例中,衬底161是多层电路板。在一些实施例中,衬底161包括双马来酰亚胺三嗪(BT)树脂、FR-4(由编织玻璃纤维布与阻燃性的环氧树脂粘合剂组成的复合材料)、陶瓷、玻璃、塑料、带、膜或其他支撑材料。衬底161可以包括形成在衬底161中/上的导电部件(例如,导线和通孔,未示出)。如图9示出的,衬底161具有形成在衬底161的上表面和下表面上的导电焊盘163,该导电焊盘163电连接至衬底161的导电部件。一个或多个半导体管芯162通过例如接合线167电连接至导电焊盘163。在衬底161上方和半导体管芯162周围形成可以包括环氧树脂、有机聚合物、聚合物等的模塑料165。在一些实施例中,模塑料165与衬底161共末端,如图8示出的。
在一些实施例中,实施回流工艺以通过导电接头168将半导体封装件160的导电焊盘163电和机械连接至导电柱119。在一些实施例中,导电接头168包括焊料区域、导电柱(例如,在铜柱的至少端面上具有焊料区域的铜柱)或任何其他合适的材料。
在回流工艺之后,可以实施烘烤工艺。烘烤工艺可以去除半导体结构上的湿气。下一步,在顶部封装件160(例如,160A、160B)和对应的底部封装件1100(例如,1100A、1100B)之间的间隙中形成底部填充材料169。可以使用例如针或喷射分配器将底部填充材料169分配在顶部封装件160和底部封装件1100之间的间隙中。可以实施固化工艺以固化底部填充材料169。虽然未示出,但是底部填充材料169可以沿着顶部封装件160的侧壁延伸。
下一步,在图10中,实施切割工艺以将PoP封装件500(例如,500A、500B)分成多个单独的PoP封装件。在示例性实施例中,使用宽度W3的刀片315来切割PoP封装件。在一些实施例中,宽度W3小于在开口311的侧壁311E和开口313的侧壁313E之间测量的宽度W2。在示出的实施例中,刀片315位于侧壁311E和侧壁313E之间的中心区域,并且因此在切割工艺期间不会与侧壁311E/313E重叠或接触。换句话说,刀片315横向位于侧壁311E和侧壁313E之间。在一些实施例中,刀片315的宽度W3宽于设置在开口311和313之间的再分布结构140’的剩余部分140R的宽度W4。这可以允许刀片315去除一个切口中的剩余部分140R以减小切割工艺的处理时间。例如,再分布结构140’的剩余部分140R可以横向位于刀片315的相对垂直侧壁之间,从而使得当刀片315朝向再分布结构140’向下切割时,剩余部分140R在一个切口中去除。
如图10示出的,刀片315从半导体封装件1100的与开口311/313相对的侧边切入切割区域300。换句话说,刀片315开始从靠近管芯120的背侧的底部封装件的上表面切入图10所示的半导体结构。随着刀片315朝向再分布结构140’行进,除了再分布结构140’的剩余部分140R之外,由于开口311/313将刀片315与再分布结构140’隔离,因此刀片315不会接触再分布结构140’。因此,避免或减少了再分布结构140’的破裂和/或分层。
虽然未示出,但是可以在其他切割区域(例如,PoP封装件500A/500B和其他相邻PoP封装件(未示出)之间的切割区域)中实施图7A至图10中示出的预切割工艺和切割工艺。在完成切割工艺之后,形成多个单独的PoP封装件,诸如图11中示出的PoP封装件500。
如图11示出的,单独的PoP封装件500具有再分布结构140,其中,管芯120和导电柱119电连接至再分布结构140的上表面。模塑料130形成在再分布结构140上方且位于管芯120周围和导电柱119周围。在图11的实例中,模塑料130延伸超出再分布结构140的横向范围。换句话说,模塑料130宽于(因此,不与再分布结构140共末端)再分布结构140。例如,模塑料130可以延伸超出再分布结构140的边界(例如,侧壁)宽度W5,宽度W5可以在从约1μm至约810μm的范围。这是由于在一些实施例中,刀片315的宽度W3小于侧壁311E和侧壁313E之间的宽度W2。
如图11示出的,模塑料130的上部(例如,远离再分布结构140的部分)具有延伸超出再分布结构140的横向范围的侧壁130S1。此外,模塑料130的下部(例如,物理接触再分布结构140的部分)可以具有与再分布结构140的侧壁对准的侧壁130S2,例如,模塑料130的下部可以具有与再分布结构140相同的宽度。
仍然参照图11,模塑料130的延伸超出再分布结构140的横向范围的上部具有高度H1,该高度H1小于模塑料130的设置在再分布结构140的横向范围内的部分的高度H2。前面说过开口311/313可以延伸至模塑料130内(例如,见图7A)。这意味着在一些实施例中,去除切割区域300中的模塑料130的部分,从而使得模塑料130的设置在超出再分布结构140的边界(例如,侧壁)的上部的高度H1较小。在图11中,模塑料130的上部的下表面130L示出为平坦表面。这仅仅是一个实例。如上所述,取决于用于形成开口311/313的工艺,下表面130L可以具有其他形状(例如,不规则表面)。
所公开的实施例的变型是可能的,并且均完全旨在包括在本发明的范围内。例如,可以修改每个PoP封装件中的管芯120的数量、每个PoP封装件中的导电柱119的数量和/或位置。又例如,可以从PoP封装件500完全去除介电层110。又例如,可以修改底部填充材料169的量和/或形状。例如,底部填充材料169可以是填充顶部封装件和底部封装件之间的间隙的连续体积的介电材料并且从第一导电接头168连续地延伸至另一导电接头168。可选地,底部填充材料169可以包括彼此物理分隔开的多个部分,其中,底部填充材料169的每个部分均围绕相应的导电接头168。
实施例可以实现许多优势。通过省略再分布结构中的密封环,可用于形成半导体封装件的空间更多,从而实现更高的生产能力。所公开的预切工艺和切割工艺在不使用密封环的情况下避免或减少破裂/分层,从而在不存在与破裂和分层相关的问题的情况下提高生产能力。
图12示出了根据一些实施例的制造半导体器件的方法3000的流程图。应该理解,图12所示的实施例方法仅仅是许多可能的实施例方法的实例。本领域普通技术人员将意识到许多变化、替代和修改。例如,可以添加、去除、替换、重新排列和重复图12中示出的各个步骤。
参照图12,在步骤3010中,将第一管芯和第二管芯附接至载体。在步骤3020中,在第一管芯和第二管芯之间形成模塑料。在步骤3030中,在第一管芯、第二管芯和模塑料上方形成再分布结构,再分布结构包括位于第一管芯上方的第一再分布区域;位于第二管芯上方的第二再分布区域;以及位于第一再分布区域和第二再分布区域之间的切割区域。在步骤3040中,在切割区域中形成第一开口和第二开口,第一开口和第二开口延伸穿过再分布结构并且暴露模塑料的第一侧。在步骤3050中,通过切割穿过模塑料的与切割区域对准的部分来分离第一管芯和第二管芯,其中从模塑料的第二侧朝向模塑料的第一侧实施切割,第二侧与第一侧相对。
在实施例中,方法包括将第一管芯和第二管芯附接至载体;在第一管芯和第二管芯之间形成模塑料;以及在第一管芯、第二管芯和模塑料上方形成再分布结构,再分布结构包括位于第一管芯上方的第一再分布区域;位于第二管芯上方的第二再分布区域;以及位于第一再分布区域和第二再分布区域之间的切割区域。该方法还包括在切割区域中形成第一开口和第二开口,第一开口和第二开口延伸穿过再分布结构并且暴露模塑料的第一侧;以及通过切割穿过模塑料的与切割区域对准的部分来分离第一管芯和第二管芯,其中,从模塑料的第二侧朝向模塑料的第一侧实施切割,第二侧与第一侧相对。在实施例中,切割区域没有导电部件。在实施例中,第一开口和第二开口彼此物理分隔开。在实施例中,第一开口和第二开口延伸至模塑料内。在实施例中,形成第一开口和第二开口包括使用第一激光束和第二激光束分别去除切割区域中的再分布结构的部分以形成第一开口和第二开口。在实施例中,将第一激光束和第二激光束同时施加至切割区域。在实施例中,使用刀片实施切割。在实施例中,第一开口横向位于第一管芯和第二开口之间,其中,刀片的第一宽度小于第一开口的最靠近第一管芯的第一侧壁和第二开口的最靠近第二管芯的第二侧壁之间的第二宽度。在实施例中,在切割期间,刀片横向位于第一开口的第一侧壁和第二开口的第二侧壁之间。在实施例中,再分布结构没有密封环。在实施例中,该方法还包括:在分离第一管芯和第二管芯之前:在邻近于第一管芯的模塑料中形成第一导电柱;在邻近于第二管芯的模塑料中形成第二导电柱;以及分别将第一封装件和第二封装件附接至第一导电柱和第二导电柱。
在实施例中,方法包括:在载体的第一侧上方形成第一导电柱和第二导电柱;将第一管芯和第二管芯附接至载体的第一侧,第一管芯和第二管芯分别邻近于第一导电柱和第二导电柱;在载体的第一侧上方形成模塑料,模塑料沿着第一管芯的侧壁、第二管芯的侧壁、第一导电柱的侧壁和第二导电柱的侧壁延伸;在第一管芯、第二管芯和模塑料上方形成再分布结构,再分布结构包括位于第一管芯上方的第一再分布区域、位于第二管芯上方的第二再分布区域以及位于第一再分布区域和第二再分布区域之间的切割区域;去除切割区域中的再分布结构的部分以形成靠近第一管芯的第一开口和靠近第二管芯的第二开口,第一开口通过切割区域中的再分布结构的剩余部分与第二开口分隔开;使载体脱粘;将第一半导体封装件电连接至第一导电柱;将第二半导体封装件电连接至第二导电柱;以及使用刀片从第一管芯的背侧切割穿过模塑料,该切割将第一管芯与第二管芯分离。在实施例中,去除切割区域中的再分布结构的部分还去除模塑料的部分,从而使得第一开口和第二开口延伸至模塑料内。在实施例中,使用激光来实施去除切割区域中的再分布结构的部分。在实施例中,刀片具有第一宽度,其中,第一开口的最靠近第一管芯的第一侧壁与第二开口的最靠近第二管芯的第二侧壁间隔开第二宽度,并且其中第一宽度小于第二宽度。在实施例中,在切割期间,刀片横向位于第一开口的第一侧壁和第二开口的第二侧壁之间,并且不接触第一开口的第一侧壁和第二开口的第二侧壁。在实施例中,再分布结构没有密封环。
在实施例中,半导体封装件包括下封装件,该下封装件包括管芯和靠近管芯的导电柱,管芯和导电柱位于再分布结构上方;以及位于再分布结构上方的模塑料,模塑料插入在管芯和导电柱之间,模塑料延伸超出再分布结构的横向范围。在实施例中,模塑料的延伸超出再分布结构的横向范围的第一部分具有第一高度,并且模塑料的接触管芯的第二部分具有第二高度,其中,第一高度小于第二高度高度。在实施例中,半导体封装件还包括电连接至导电柱的顶部封装件。
根据本发明的一些实施例,提供了一种形成半导体封装件的方法,包括:将第一管芯和第二管芯附接至载体;在所述第一管芯和所述第二管芯之间形成模塑料;在所述第一管芯、所述第二管芯和所述模塑料上方形成再分布结构,所述再分布结构包括:第一再分布区域,位于所述第一管芯上方;第二再分布区域,位于所述第二管芯上方;和切割区域,位于所述第一再分布区域和所述第二再分布区域之间;在所述切割区域中形成第一开口和第二开口,所述第一开口和所述第二开口延伸穿过所述再分布结构并且暴露所述模塑料的第一侧;以及通过切割穿过所述模塑料的与所述切割区域对准的部分来分离所述第一管芯和所述第二管芯,其中,从所述模塑料的第二侧朝向所述模塑料的第一侧实施所述切割,所述第二侧与所述第一侧相对。
在上述方法中,所述切割区域没有导电部件。
在上述方法中,所述第一开口和所述第二开口彼此物理分隔开。
在上述方法中,所述第一开口和所述第二开口延伸至所述模塑料内。
在上述方法中,形成所述第一开口和所述第二开口包括使用第一激光束和第二激光束去除所述切割区域中的所述再分布结构的部分以分别形成所述第一开口和所述第二开口。
在上述方法中,将所述第一激光束和所述第二激光束同时施加至所述切割区域。
在上述方法中,使用所述刀片实施切割。
在上述方法中,所述第一开口横向位于所述第一管芯和所述第二开口之间,其中,所述刀片的第一宽度小于所述第一开口的最靠近第一管芯的第一侧壁和所述第二开口的最靠近第二管芯的第二侧壁之间的第二宽度。
在上述方法中,在所述切割期间,所述刀片横向位于所述第一开口的第一侧壁和所述第二开口的第二侧壁之间。
在上述方法中,所述再分布结构没有密封环。
在上述方法中,还包括,在分离所述第一管芯和所述第二管芯之前:在邻近所述第一管芯的所述模塑料中形成第一导电柱;在邻近所述第二管芯的所述模塑料中形成第二导电柱;以及分别将所述第一封装件和所述第二封装件附接至所述第一导电柱和所述第二导电柱。
根据本发明的另一些实施例,还提供了一种形成半导体封装件的方法,包括:在载体的第一侧上方形成第一导电柱和第二导电柱;将所述第一管芯和所述第二管芯附接至所述载体的第一侧,所述第一管芯和所述第二管芯分别邻近所述第一导电柱和所述第二导电柱;在所述载体的第一侧上方形成模塑料,所述模塑料沿着所述第一管芯的侧壁、所述第二管芯的侧壁、所述第一导电柱的侧壁和所述第二导电柱的侧壁延伸;在所述第一管芯、所述第二管芯和所述模塑料上方形成再分布结构,所述再分布结构包括位于所述第一管芯上方的第一再分布区域、位于所述第二管芯上方的第二再分布区域以及位于所述第一再分布区域和所述第二再分布区域之间的切割区域;去除所述切割区域中的所述再分布结构的部分以形成靠近所述第一管芯的第一开口和靠近所述第二管芯的第二开口,所述第一开口通过所述切割区域中的所述再分布结构的剩余部分与所述第二开口分隔开;使所述载体脱粘;将所述第一半导体封装件电连接至所述第一导电柱;将所述第二半导体封装件电连接至所述第二导电柱;以及使用刀片从所述第一管芯的背侧切割穿过所述模塑料,所述切割将所述第一管芯与所述第二管芯分离。
在上述方法中,去除所述切割区域中的所述再分布结构的部分还去除所述模塑料的部分,从而使得所述第一开口和所述第二开口延伸至所述模塑料内。
在上述方法中,使用激光来实施去除所述切割区域中的所述再分布结构的部分。
在上述方法中,所述刀片具有第一宽度,其中,所述第一开口的最靠近所述第一管芯的第一侧壁与所述第二开口的最靠近所述第二管芯的第二侧壁间隔开第二宽度,并且其中所述第一宽度小于所述第二宽度。
在上述方法中,在所述切割期间,所述刀片横向位于所述第一开口的第一侧壁和所述第二开口的第二侧壁之间,并且不接触所述第一开口的第一侧壁和所述第二开口的第二侧壁。
在上述方法中,所述再分布结构没有密封环。
根据本发明的又一些实施例,还提供了一种半导体封装件,包括:下封装件,包括:管芯和靠近所述管芯的导电柱,所述管芯和所述导电柱位于再分布结构上方;以及模塑料,位于所述再分布结构上方,所述模塑料插入在所述管芯和所述导电柱之间,所述模塑料延伸超出所述再分布结构的横向范围。
在上述半导体封装件中,所述模塑料的延伸超出所述再分布结构的横向范围的第一部分具有第一高度,并且所述模塑料的接触所述管芯的第二部分具有第二高度,其中,所述第一高度小于所述第二高度。
在上述半导体封装件中,还包括电连接至所述导电柱的顶部封装件。
上面概述了若干实施例的特征,使得本领域人员可以更好地理解本发明的方面。本领域人员应该理解,它们可以容易地使用本发明作为基础来设计或修改用于实施与本人所介绍实施例相同的目的和/或实现相同优势的其他工艺和结构。本领域技术人员也应该意识到,这种等同构造并不背离本发明的精神和范围,并且在不背离本发明的精神和范围的情况下,本文中它们可以做出多种变化、替换以及改变。
Claims (10)
1.一种形成半导体封装件的方法,包括:
将第一管芯和第二管芯附接至载体;
在所述第一管芯和所述第二管芯之间形成模塑料;
在所述第一管芯、所述第二管芯和所述模塑料上方形成再分布结构,所述再分布结构包括:
第一再分布区域,位于所述第一管芯上方;
第二再分布区域,位于所述第二管芯上方;和
切割区域,位于所述第一再分布区域和所述第二再分布区域之间;
在所述切割区域中形成第一开口和第二开口,所述第一开口和所述第二开口延伸穿过所述再分布结构并且暴露所述模塑料的第一侧;以及
通过切割穿过所述模塑料的与所述切割区域对准的部分来分离所述第一管芯和所述第二管芯,其中,从所述模塑料的第二侧朝向所述模塑料的第一侧实施所述切割,所述第二侧与所述第一侧相对。
2.根据权利要求1所述的方法,其中,所述切割区域没有导电部件。
3.根据权利要求1所述的方法,其中,所述第一开口和所述第二开口彼此物理分隔开。
4.根据权利要求1所述的方法,其中,所述第一开口和所述第二开口延伸至所述模塑料内。
5.根据权利要求1所述的方法,其中,形成所述第一开口和所述第二开口包括使用第一激光束和第二激光束去除所述切割区域中的所述再分布结构的部分以分别形成所述第一开口和所述第二开口。
6.根据权利要求5所述的方法,其中,将所述第一激光束和所述第二激光束同时施加至所述切割区域。
7.根据权利要求1所述的方法,其中,使用所述刀片实施切割。
8.根据权利要求7所述的方法,其中,所述第一开口横向位于所述第一管芯和所述第二开口之间,其中,所述刀片的第一宽度小于所述第一开口的最靠近第一管芯的第一侧壁和所述第二开口的最靠近第二管芯的第二侧壁之间的第二宽度。
9.一种形成半导体封装件的方法,包括:
在载体的第一侧上方形成第一导电柱和第二导电柱;
将所述第一管芯和所述第二管芯附接至所述载体的第一侧,所述第一管芯和所述第二管芯分别邻近所述第一导电柱和所述第二导电柱;
在所述载体的第一侧上方形成模塑料,所述模塑料沿着所述第一管芯的侧壁、所述第二管芯的侧壁、所述第一导电柱的侧壁和所述第二导电柱的侧壁延伸;
在所述第一管芯、所述第二管芯和所述模塑料上方形成再分布结构,所述再分布结构包括位于所述第一管芯上方的第一再分布区域、位于所述第二管芯上方的第二再分布区域以及位于所述第一再分布区域和所述第二再分布区域之间的切割区域;
去除所述切割区域中的所述再分布结构的部分以形成靠近所述第一管芯的第一开口和靠近所述第二管芯的第二开口,所述第一开口通过所述切割区域中的所述再分布结构的剩余部分与所述第二开口分隔开;
使所述载体脱粘;
将所述第一半导体封装件电连接至所述第一导电柱;
将所述第二半导体封装件电连接至所述第二导电柱;以及
使用刀片从所述第一管芯的背侧切割穿过所述模塑料,所述切割将所述第一管芯与所述第二管芯分离。
10.一种半导体封装件,包括:
下封装件,包括:
管芯和靠近所述管芯的导电柱,所述管芯和所述导电柱位于再分布结构上方;以及
模塑料,位于所述再分布结构上方,所述模塑料插入在所述管芯和所述导电柱之间,所述模塑料延伸超出所述再分布结构的横向范围。
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