CN107369693A - 一种阵列基板及其制备方法、显示面板 - Google Patents

一种阵列基板及其制备方法、显示面板 Download PDF

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CN107369693A
CN107369693A CN201710662048.2A CN201710662048A CN107369693A CN 107369693 A CN107369693 A CN 107369693A CN 201710662048 A CN201710662048 A CN 201710662048A CN 107369693 A CN107369693 A CN 107369693A
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underlay substrate
groove
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刘军
李伟
周斌
苏同上
方金钢
张扬
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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Hefei Xinsheng Optoelectronics Technology Co Ltd
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Abstract

本发明涉及显示技术领域，公开了一种阵列基板及其制备方法、显示面板，阵列基板包括衬底基板和多个薄膜晶体管开关，每一个薄膜晶体管开关包括：形成于衬底基板的遮光块，遮光块形成有开口方向背离衬底基板的第一凹槽；形成于遮光块背离衬底基板一侧的缓冲层，缓冲层与第一凹槽对应的部位形成第二凹槽；形成于第二凹槽内的沟道层；形成于沟道层背离衬底基板一侧的栅绝缘层、栅极、层间绝缘层、源漏电极以及钝化层。上述结构采用非金属材料制备遮挡块，避免出现双TFT效应，且利用第一凹槽两侧凸起遮挡非薄膜晶体管开关区域的光线，可提高薄膜晶体管开关的稳定性。

Description

一种阵列基板及其制备方法、显示面板
技术领域
本发明涉及显示技术领域，特别涉及一种阵列基板及其制备方法、显示面板。
背景技术
近来，有机电致发光显示面板(Organic Light-Emitting Diode，简称OLED)因其高对比度和自发光等优势逐渐成为显示面板中的主流，备受大众青睐。
但是，在大尺寸OLED中为了保护沟道层的稳定性，顶栅薄膜晶体管下会形成一层金属图案以避免外界光对其特性的干扰，但因此会产生双薄膜晶体管效应。而且，由于金属图案和沟道层中间间隔一层缓冲层，加上大尺寸OLED金属布线非常密集，故而无法遮挡其他金属区域反射的光，从而造成薄膜晶体管不稳定。
发明内容
本发明提供了一种阵列基板及其制备方法、显示面板，上述阵列基板形成遮光体遮挡其他非薄膜晶体管开关区域反射的光，利于提高薄膜晶体管开关的稳定性。
为达到上述目的，本发明提供以下技术方案：
一种阵列基板，包括衬底基板和阵列分布于所述衬底基板上的多个薄膜晶体管开关，每一个所述薄膜晶体管开关包括：
形成于所述衬底基板且由非金属材料形成的遮光块，所述遮光块形成有开口方向背离所述衬底基板的第一凹槽；
形成于所述遮光块背离所述衬底基板一侧的缓冲层，所述缓冲层与所述第一凹槽对应的部位形成开口方向背离所述衬底基板的第二凹槽；
形成于所述第二凹槽内的沟道层；
形成于所述沟道层背离所述衬底基板一侧的栅绝缘层；
形成于所述栅绝缘层背离所述衬底基板一侧的栅极；
形成于所述栅极背离所述衬底基板一侧的层间绝缘层；
形成于所述层间绝缘层背离所述衬底基板一侧的源漏电极，所述源漏电极与所述沟道层之间过孔连接；
形成于所述源漏电极背离所述衬底基板一侧的钝化层。
本发明提供了一种阵列基板，上述阵列基板中，包括衬底基板和阵列分布于衬底基板上的多个薄膜晶体管开关TFT，每一个薄膜晶体管开关TFT中遮挡块形成于衬底基板，且遮挡块形成有开口方向背离衬底基板的第一凹槽，且遮光块背离衬底基板的一侧形成有用于覆盖它的缓冲层，缓冲层在与第一凹槽对应的位置形成有开口方向背离衬底基板的第二凹槽，缓冲层的第二凹槽内形成有沟道层，由于遮挡块为非金属材料，则遮挡块不会反射光线，使得形成于第二凹槽内的沟道层材料不会接受来自遮挡块的反射光线，从而不会造成双TFT效应。而且，上述结构利用第一凹槽两侧凸起遮挡非薄膜晶体管开关区域的光线，可提高薄膜晶体管开关TFT的稳定性。
另外，在沟道层上背离衬底基板的一侧形成有栅绝缘层；栅绝缘层背离衬底基板的一侧形成有栅极，在栅极背离衬底基板的一侧形成有层间绝缘层，在层间绝缘层背离衬底基板的一侧形成有源漏电极，源漏电极与沟道层采用过孔连接，在源漏电极背离衬底基板的一侧形成有钝化层。通过上述结构可知，上述阵列基板充分利用现有图层，例如层间绝缘层、栅极、源漏电极以及钝化层等，并未过多的改变上述各图层的结构，该结构使得本发明提供的阵列基板便于生产制造、实用性强。
因此，上述阵列基板形成遮光体遮挡其他非薄膜晶体管开关区域反射的光，利于提高薄膜晶体管开关的稳定性。
进一步地，所述遮光块的制备材料为黑矩阵材料。
进一步地，
所述缓冲层的制备材料为氧化硅；和/或，
所述沟道层的制备材料为铟镓锌氧化物；和/或，
所述栅绝缘层的制备材料为氧化硅；和/或，
所述栅极的制备材料为铜或铝；和/或，
所述层间绝缘层的制备材料为氧化硅；和/或，
所述源漏电极的制备材料为铜或铝；和/或，
所述钝化层的制备材料为氧化硅。
进一步地，所述第一凹槽的深度为0.5～0.7μm，所述缓冲层的厚度为0.3～0.5μm，所述沟道层的厚度为0.05～0.09μm；且沿所述衬底基板的延展方向，所述第一凹槽的宽度比所述沟道层的宽度大3～5μm。
进一步地，所述栅绝缘层厚度为0.1～0.2μm；
所述栅极厚度为0.5～0.7μm；
所述层间绝缘层厚度为0.3～0.5μm；
所述源漏电极厚度为0.5～0.7μm。
本发明还提供一种阵列基板制备方法，用于制备以上任一项技术方案中所述的阵列基板，包括:
在衬底基板上形成遮挡层，并通过半透光构图工艺形成所述遮挡块的图案，其中，所述遮挡块为由非金属材料形成的遮光块，且所述遮光块形成有开口方向背离所述衬底基板的第一凹槽；
在所述遮挡块图案上形成缓冲层，其中，所述缓冲层具有与所述第一凹槽对应的第二凹槽；
在所述缓冲层上形成沟道层涂层，并通过一次构图工艺形成沟道层图案，所述沟道层图案位于所述第二凹槽内；
在所述沟道层图案上形成栅绝缘层、且在所述栅绝缘层上形成栅极金属层，通过构图工艺形成栅极图案以及栅绝缘层图案，所述栅绝缘层图案覆盖部分所述沟道层图案；
在所述栅极图案上形成层间绝缘层，采用过孔刻蚀在所述层间绝缘层上形成过孔；
在所述层间绝缘层上形成源漏电极金属层，并通过构图工艺形成源漏电极图案，所述源漏电极图案通过所述过孔与所述沟道层图案电连接；
在所述源漏电极图案上形成钝化层。
上述阵列基板制备方法中，在衬底基板上形成遮挡层，并通过构图工艺形成遮挡块的图案，其中，遮挡块为由非金属材料形成的遮光块，且遮光块形成有开口方向背离衬底基板的第一凹槽；在遮挡块图案上形成缓冲层，其中，缓冲层具有与第一凹槽对应的第二凹槽；在缓冲层上形成沟道层涂层，并通过一次构图工艺形成沟道层图案，沟道层图案位于第二凹槽内。上述结构利用第一凹槽两侧凸起突出厚度遮挡非薄膜晶体管开关区域反射光线，可提高薄膜晶体管开关的稳定性，而且遮挡块为非金属材料不会产生反光，避免了沟道层接受来自遮挡块的反射光造成双薄膜集体管效应。
另外，在沟道层图案上形成栅绝缘层、且在栅绝缘层上形成栅极金属层，通过构图工艺形成栅极图案以及栅绝缘层图案，栅绝缘层图案覆盖部分沟道层图案；在栅极图案上形成层间绝缘层，采用过孔刻蚀在层间绝缘层上形成过孔；在层间绝缘层上形成源漏电极金属层，并通过构图工艺形成源漏电极图案，源漏电极图案通过过孔与沟道层图案电连接；在源漏电极图案上形成钝化层。由上述方法可知，本发明提供的阵列基板制备方法充分利用现有图层的制备工艺，并未过多的改变上述各图层的结构，该结构使得本发明提供的阵列基板制备方法实用性强。
进一步地，对所述栅极金属层和所述栅绝缘层采用的构图工艺包括：
对所述栅极金属层进行湿法刻蚀，形成栅极图案；
保留栅极掩膜光刻胶对所述栅绝缘层进行干法刻蚀，形成栅绝缘层图案；
采用剥离工艺剥离多余光刻胶。
进一步地，所述剥离工艺包括采用湿法剥离方法进行剥离。
进一步地，所述过孔刻蚀工艺包括采用干法刻蚀进行刻蚀。
本发明还提供一种显示面板，包括以上任一项技术方案中所述的阵列基板。
附图说明
图1为本发明实施例提供的基板制备方法的流程示意图；
图2a-图2i为本发明实施例提供的基板制备方法在制备基板过程中各层膜变化示意图。
图标：1-衬底基板；2-遮挡块；3-缓冲层；4-沟道层；5-栅绝缘层；6-栅极；7-层间绝缘层；8-源漏电极；9-钝化层。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
请参考图2i，本发明提供一种阵列基板，包括衬底基板1和阵列分布于衬底基板1上的多个薄膜晶体管开关，每一个薄膜晶体管开关包括：
形成于衬底基板1且由非金属材料形成的遮光块，遮光块形成有开口方向背离衬底基板1的第一凹槽；
形成于遮光块背离衬底基板1一侧的缓冲层3，缓冲层3与第一凹槽对应的部位形成开口方向背离衬底基板1的第二凹槽；
形成于第二凹槽内的沟道层4；
形成于沟道层4背离衬底基板1一侧的栅绝缘层5；
形成于栅绝缘层5背离衬底基板1一侧的栅极6；
形成于栅极6背离衬底基板1一侧的层间绝缘层7；
形成于层间绝缘层7背离衬底基板1一侧的源漏电极8，源漏电极8与沟道层4之间过孔连接；
形成于源漏电极8背离衬底基板1一侧的钝化层9。
本发明提供了一种阵列基板，上述阵列基板中，包括衬底基板1和阵列分布于衬底基板1上的多个薄膜晶体管开关TFT，每一个薄膜晶体管开关TFT中遮挡块2形成于衬底基板1，且遮挡块2形成有开口方向背离衬底基板1的第一凹槽，且遮光块背离衬底基板1的一侧形成有用于覆盖它的缓冲层3，缓冲层3在与第一凹槽对应的位置形成有开口方向背离衬底基板1的第二凹槽，缓冲层3的第二凹槽内形成有沟道层4，由于遮挡块2为非金属材料，则遮挡块2不会反射光线，使得形成于第二凹槽内的沟道层4材料不会接受来自遮挡块2的反射光线，从而不会造成双TFT效应。而且，上述结构利用第一凹槽两侧凸起遮挡非薄膜晶体管开关区域的光线，可提高薄膜晶体管开关TFT的稳定性。
另外，在沟道层4上背离衬底基板1的一侧形成有栅绝缘层5；栅绝缘层5背离衬底基板1的一侧形成有栅极6，在栅极6背离衬底基板1的一侧形成有层间绝缘层7，在层间绝缘层7背离衬底基板1的一侧形成有源漏电极8，源漏电极8与沟道层4采用过孔连接，在源漏电极8背离衬底基板1的一侧形成有钝化层9。通过上述结构可知，上述阵列基板充分利用现有图层，例如层间绝缘层7、栅极6、源漏电极8以及钝化层9等，并未过多的改变上述各图层的结构，该结构使得本发明提供的阵列基板便于生产制造、实用性强。
因此，上述阵列基板形成遮光体遮挡其他非薄膜晶体管开关区域反射的光，利于提高薄膜晶体管开关的稳定性。
在上述技术方案的基础上，遮光块的制备材料为黑矩阵材料。
在上述技术方案的基础上，缓冲层3的制备材料为氧化硅；和/或，沟道层4的制备材料为铟镓锌氧化物；和/或，栅绝缘层5的制备材料为氧化硅；和/或，栅极6的制备材料为铜或铝；和/或，层间绝缘层7的制备材料为氧化硅；和/或，源漏电极8的制备材料为铜或铝；和/或，钝化层9的制备材料为氧化硅。
在上述技术方案的基础上，选取第一凹槽的深度为0.5～0.7μm，缓冲层3的厚度为0.3～0.5μm，沟道层4的厚度为0.05～0.09μm；且沿衬底基板1的延展方向，第一凹槽的宽度比沟道层4的宽度大3～5μm。
需要说明的是，上述尺寸使得第一凹槽两端的凸起可更好地满足对与第一凹槽对应的第二凹槽内的沟道层4的遮光作用，更好地的避免来自非薄膜晶体管开关区域照射沟道层4，造成双薄膜晶体管效应。
在上述技术方案的基础上，
栅绝缘层5厚度为0.1～0.2μm；
栅极6厚度为0.5～0.7μm；
层间绝缘层7厚度为0.3～0.5μm；
源漏电极8厚度为0.5～0.7μm。
请参考图1和图2a-2i，本发明还提供一种阵列基板制备方法，用于制备以上任一项技术方案中的阵列基板，包括:
步骤S101，请参考图2a，在衬底基板1上形成遮挡层，并通过构图工艺形成遮挡块2的图案，其中，遮挡块2为由非金属材料形成的遮光块，且遮光块形成有开口方向背离衬底基板1的第一凹槽；
步骤S102，请参考图2b，在遮挡块2图案上形成缓冲层3，其中，缓冲层3具有与第一凹槽对应的第二凹槽；
步骤S103，请参考图2c，在缓冲层3上形成沟道层4涂层，并通过一次构图工艺形成沟道层4图案，沟道层4图案位于第二凹槽内；
步骤S104，请参考图2d和图2e，在沟道层4图案上形成栅绝缘层5、且在栅绝缘层5上形成栅极6金属层，通过构图工艺形成栅极6图案以及栅绝缘层5图案，栅绝缘层5图案覆盖部分沟道层4图案；
步骤S105，请参考图2f和图2g，在栅极6图案上形成层间绝缘层7，采用过孔刻蚀在层间绝缘层7上形成过孔；
步骤S106，请参考图2h，在层间绝缘层7上形成源漏电极8金属层，并通过构图工艺形成源漏电极8图案，源漏电极8图案通过过孔与沟道层4图案电连接；
步骤S107，请参考图2i，在源漏电极8图案上形成钝化层9。
上述阵列基板制备方法中，在衬底基板1上形成遮挡层，并通过半透光构图工艺形成遮挡块2的图案，其中，遮挡块2为由非金属材料形成的遮光块，且遮光块形成有开口方向背离衬底基板1的第一凹槽；在遮挡块2图案上形成缓冲层3，其中，缓冲层3具有与第一凹槽对应的第二凹槽；在缓冲层3上形成沟道层4涂层，并通过一次构图工艺形成沟道层4图案，沟道层4图案位于第二凹槽内。上述结构利用第一凹槽两侧凸起突出厚度遮挡非薄膜晶体管开关区域反射光线，可提高薄膜晶体管开关的稳定性，而且遮挡块2为非金属材料不会产生反光，避免了沟道层4接受来自遮挡块2的反射光造成双薄膜集体管效应。
需要说明的是，优选的，形成遮挡块2的图案的构图工艺为半透光构图工艺。
另外，在沟道层4图案上形成栅绝缘层5、且在栅绝缘层5上形成栅极6金属层，通过构图工艺形成栅极6图案以及栅绝缘层5图案，栅绝缘层5图案覆盖部分沟道层4图案；在栅极6图案上形成层间绝缘层7，采用过孔刻蚀在层间绝缘层7上形成过孔；在层间绝缘层7上形成源漏电极8金属层，并通过构图工艺形成源漏电极8图案，源漏电极8图案通过过孔与沟道层4图案电连接；在源漏电极8图案上形成钝化层9。由上述方法可知，本发明提供的阵列基板制备方法充分利用现有图层的制备工艺，并未过多的改变上述各图层的结构，该结构使得本发明提供的阵列基板制备方法实用性强。
在上述技术方案的基础上，对栅极6金属层和栅绝缘层5采用的构图工艺包括：
对栅极6金属层进行湿法刻蚀，形成栅极6图案；
保留栅极掩膜光刻胶对栅绝缘层5进行干法刻蚀，形成栅绝缘层5图案；
采用剥离工艺剥离多余光刻胶。
在上述技术方案的基础上，剥离工艺包括采用湿法剥离方法进行剥离。
在上述技术方案的基础上，过孔刻蚀工艺包括采用干法刻蚀进行刻蚀。
本发明还提供一种显示面板，包括以上任一项技术方案中的阵列基板。
显然，本领域的技术人员可以对本发明实施例进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。

Claims (10)

1.一种阵列基板，其特征在于，包括衬底基板和阵列分布于所述衬底基板上的多个薄膜晶体管开关，每一个所述薄膜晶体管开关包括：
形成于所述衬底基板且由非金属材料形成的遮光块，所述遮光块形成有开口方向背离所述衬底基板的第一凹槽；
形成于所述遮光块背离所述衬底基板一侧的缓冲层，所述缓冲层与所述第一凹槽对应的部位形成开口方向背离所述衬底基板的第二凹槽；
形成于所述第二凹槽内的沟道层；
形成于所述沟道层背离所述衬底基板一侧的栅绝缘层；
形成于所述栅绝缘层背离所述衬底基板一侧的栅极；
形成于所述栅极背离所述衬底基板一侧的层间绝缘层；
形成于所述层间绝缘层背离所述衬底基板一侧的源漏电极，所述源漏电极与所述沟道层之间过孔连接；
形成于所述源漏电极背离所述衬底基板一侧的钝化层。
2.根据权利要求1所述的阵列基板，其特征在于，所述遮光块的制备材料为黑矩阵材料。
3.根据权利要求1所述的阵列基板，其特征在于：
所述缓冲层的制备材料为氧化硅；和/或，
所述沟道层的制备材料为铟镓锌氧化物；和/或，
所述栅绝缘层的制备材料为氧化硅；和/或，
所述栅极的制备材料为铜或铝；和/或，
所述层间绝缘层的制备材料为氧化硅；和/或，
所述源漏电极的制备材料为铜或铝；和/或，
所述钝化层的制备材料为氧化硅。
4.根据权利要求1-3任一项所述的阵列基板，其特征在于，所述第一凹槽的深度为0.5～0.7μm，所述缓冲层的厚度为0.3～0.5μm，所述沟道层的厚度为0.05～0.09μm；且沿所述衬底基板的延展方向，所述第一凹槽的宽度比所述沟道层的宽度大3～5μm。
5.根据权利要求4所述的阵列基板，其特征在于：
所述栅绝缘层厚度为0.1～0.2μm；
所述栅极厚度为0.5～0.7μm；
所述层间绝缘层厚度为0.3～0.5μm；
所述源漏电极厚度为0.5～0.7μm。
6.一种阵列基板制备方法，用于制备如权利要求1-5任一项所述的阵列基板，其特征在于，包括:
在衬底基板上形成遮挡层，并通过构图工艺形成所述遮挡块的图案，其中，所述遮挡块为由非金属材料形成的遮光块，且所述遮光块形成有开口方向背离所述衬底基板的第一凹槽；
在所述遮挡块图案上形成缓冲层，其中，所述缓冲层具有与所述第一凹槽对应的第二凹槽；
在所述缓冲层上形成沟道层涂层，并通过一次构图工艺形成沟道层图案，所述沟道层图案位于所述第二凹槽内；
在所述沟道层图案上形成栅绝缘层、且在所述栅绝缘层上形成栅极金属层，通过构图工艺形成栅极图案以及栅绝缘层图案，所述栅绝缘层图案覆盖部分所述沟道层图案；
在所述栅极图案上形成层间绝缘层，采用过孔刻蚀在所述层间绝缘层上形成过孔；
在所述层间绝缘层上形成源漏电极金属层，并通过构图工艺形成源漏电极图案，所述源漏电极图案通过所述过孔与所述沟道层图案电连接；
在所述源漏电极图案上形成钝化层。
7.根据权利要求6所述的阵列基板制备方法，其特征在于，对所述栅极金属层和所述栅绝缘层采用的构图工艺包括：
对所述栅极金属层进行湿法刻蚀，形成栅极图案；
保留栅极掩膜光刻胶对所述栅绝缘层进行干法刻蚀，形成栅绝缘层图案；
采用剥离工艺剥离多余光刻胶。
8.根据权利要求7所述的阵列基板制备方法，其特征在于，所述剥离工艺包括采用湿法剥离方法进行剥离。
9.根据权利要求6所述的阵列基板制备方法，其特征在于，所述过孔刻蚀工艺包括采用干法刻蚀进行刻蚀。
10.一种显示面板，其特征在于，包括如权利要求1-5任一项所述的阵列基板。
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Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108364961A (zh) * 2018-02-24 2018-08-03 京东方科技集团股份有限公司 一种阵列基板及其制作方法、显示面板
CN108573956A (zh) * 2018-04-17 2018-09-25 京东方科技集团股份有限公司 阵列基板及其制作方法、显示装置
CN108761887A (zh) * 2018-04-28 2018-11-06 武汉华星光电技术有限公司 阵列基板及显示面板
CN109103206A (zh) * 2018-08-22 2018-12-28 京东方科技集团股份有限公司 薄膜晶体管结构、阵列基板和薄膜晶体管结构的制造方法
CN109411484A (zh) * 2018-10-23 2019-03-01 深圳市华星光电技术有限公司 一种阵列基板、显示装置及阵列基板的制备方法
CN109585304A (zh) * 2018-11-23 2019-04-05 合肥鑫晟光电科技有限公司 显示面板、阵列基板、薄膜晶体管及其制造方法
CN109920823A (zh) * 2019-03-07 2019-06-21 合肥鑫晟光电科技有限公司 像素单元及其制造方法、显示基板
WO2019128966A1 (zh) * 2017-12-26 2019-07-04 武汉华星光电技术有限公司 一种阵列基板及其制备方法
WO2020062483A1 (zh) * 2018-09-30 2020-04-02 武汉华星光电技术有限公司 薄膜晶体管阵列基板及其制造方法、显示面板
CN111403489A (zh) * 2020-04-15 2020-07-10 合肥鑫晟光电科技有限公司 薄膜晶体管、显示基板及其制作方法
CN115763499A (zh) * 2022-12-23 2023-03-07 武汉华星光电技术有限公司 阵列基板及其制备方法、显示装置

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106981478A (zh) * 2017-04-07 2017-07-25 京东方科技集团股份有限公司 顶栅型薄膜晶体管及其制作方法、阵列基板、显示面板
CN109256397B (zh) * 2018-09-20 2021-09-21 合肥鑫晟光电科技有限公司 显示基板及其制备方法、显示装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6265249B1 (en) * 1994-03-01 2001-07-24 Industrial Technology Research Institute Method of manufacturing thin film transistors
US20050218798A1 (en) * 2004-03-30 2005-10-06 Yi-Chen Chang Active matrix organic electroluminescent device and fabrication method thereof
US20050253149A1 (en) * 1999-01-21 2005-11-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and process for production thereof
CN105304722A (zh) * 2015-09-24 2016-02-03 京东方科技集团股份有限公司 一种薄膜晶体管及其制备方法、显示基板、显示装置
CN105470196A (zh) * 2016-01-05 2016-04-06 京东方科技集团股份有限公司 薄膜晶体管、阵列基板及其制造方法、和显示装置
CN106019738A (zh) * 2015-03-31 2016-10-12 精工爱普生株式会社 电光学装置以及电子设备

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102341639B1 (ko) * 2015-08-21 2021-12-21 삼성디스플레이 주식회사 액정 표시 장치 및 그의 제조 방법
CN105304500B (zh) * 2015-10-26 2018-01-30 深圳市华星光电技术有限公司 N型tft的制作方法
US10269844B2 (en) * 2017-06-27 2019-04-23 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and formation method of light sensing device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6265249B1 (en) * 1994-03-01 2001-07-24 Industrial Technology Research Institute Method of manufacturing thin film transistors
US20050253149A1 (en) * 1999-01-21 2005-11-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and process for production thereof
US20050218798A1 (en) * 2004-03-30 2005-10-06 Yi-Chen Chang Active matrix organic electroluminescent device and fabrication method thereof
CN106019738A (zh) * 2015-03-31 2016-10-12 精工爱普生株式会社 电光学装置以及电子设备
CN105304722A (zh) * 2015-09-24 2016-02-03 京东方科技集团股份有限公司 一种薄膜晶体管及其制备方法、显示基板、显示装置
CN105470196A (zh) * 2016-01-05 2016-04-06 京东方科技集团股份有限公司 薄膜晶体管、阵列基板及其制造方法、和显示装置

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019128966A1 (zh) * 2017-12-26 2019-07-04 武汉华星光电技术有限公司 一种阵列基板及其制备方法
CN108364961A (zh) * 2018-02-24 2018-08-03 京东方科技集团股份有限公司 一种阵列基板及其制作方法、显示面板
CN108364961B (zh) * 2018-02-24 2024-03-01 京东方科技集团股份有限公司 一种阵列基板及其制作方法、显示面板
CN108573956A (zh) * 2018-04-17 2018-09-25 京东方科技集团股份有限公司 阵列基板及其制作方法、显示装置
CN108573956B (zh) * 2018-04-17 2020-04-17 京东方科技集团股份有限公司 阵列基板及其制作方法、显示装置
CN108761887A (zh) * 2018-04-28 2018-11-06 武汉华星光电技术有限公司 阵列基板及显示面板
CN109103206A (zh) * 2018-08-22 2018-12-28 京东方科技集团股份有限公司 薄膜晶体管结构、阵列基板和薄膜晶体管结构的制造方法
US11342459B2 (en) 2018-08-22 2022-05-24 Boe Technology Group Co., Ltd. Thin film transistor structure, array substrate and method for manufacturing a thin film transistor structure
WO2020062483A1 (zh) * 2018-09-30 2020-04-02 武汉华星光电技术有限公司 薄膜晶体管阵列基板及其制造方法、显示面板
CN109411484A (zh) * 2018-10-23 2019-03-01 深圳市华星光电技术有限公司 一种阵列基板、显示装置及阵列基板的制备方法
CN109585304A (zh) * 2018-11-23 2019-04-05 合肥鑫晟光电科技有限公司 显示面板、阵列基板、薄膜晶体管及其制造方法
CN109585304B (zh) * 2018-11-23 2023-04-28 合肥鑫晟光电科技有限公司 显示面板、阵列基板、薄膜晶体管及其制造方法
CN109920823A (zh) * 2019-03-07 2019-06-21 合肥鑫晟光电科技有限公司 像素单元及其制造方法、显示基板
WO2020177666A1 (zh) * 2019-03-07 2020-09-10 京东方科技集团股份有限公司 像素单元及其制造方法、显示基板
CN111403489A (zh) * 2020-04-15 2020-07-10 合肥鑫晟光电科技有限公司 薄膜晶体管、显示基板及其制作方法
CN111403489B (zh) * 2020-04-15 2023-06-27 合肥鑫晟光电科技有限公司 薄膜晶体管、显示基板及其制作方法
CN115763499A (zh) * 2022-12-23 2023-03-07 武汉华星光电技术有限公司 阵列基板及其制备方法、显示装置

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