CN106952920B - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

Info

Publication number
CN106952920B
CN106952920B CN201611236524.6A CN201611236524A CN106952920B CN 106952920 B CN106952920 B CN 106952920B CN 201611236524 A CN201611236524 A CN 201611236524A CN 106952920 B CN106952920 B CN 106952920B
Authority
CN
China
Prior art keywords
gate electrode
insulating film
region
fin
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201611236524.6A
Other languages
English (en)
Chinese (zh)
Other versions
CN106952920A (zh
Inventor
津田是文
山下朋弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Publication of CN106952920A publication Critical patent/CN106952920A/zh
Application granted granted Critical
Publication of CN106952920B publication Critical patent/CN106952920B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/40EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0413Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having charge-trapping gate insulators, e.g. MNOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/62Fin field-effect transistors [FinFET]
    • H10D30/6211Fin field-effect transistors [FinFET] having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/69IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/69IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H10D30/691IGFETs having charge trapping gate insulators, e.g. MNOS transistors having more than two programming levels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/69IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H10D30/694IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/696IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes having at least one additional gate, e.g. program gate, erase gate or select gate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113Isolations within a component, i.e. internal isolations
    • H10D62/115Dielectric isolations, e.g. air gaps
    • H10D62/116Dielectric isolations, e.g. air gaps adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/017Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/031Manufacture or treatment of data-storage electrodes
    • H10D64/037Manufacture or treatment of data-storage electrodes comprising charge-trapping insulators
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0158Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including FinFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/834Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] comprising FinFETs

Landscapes

  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
CN201611236524.6A 2016-01-07 2016-12-28 半导体器件及其制造方法 Active CN106952920B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016001669A JP6591291B2 (ja) 2016-01-07 2016-01-07 半導体装置およびその製造方法
JP2016-001669 2016-01-07

Publications (2)

Publication Number Publication Date
CN106952920A CN106952920A (zh) 2017-07-14
CN106952920B true CN106952920B (zh) 2021-12-24

Family

ID=59275103

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201611236524.6A Active CN106952920B (zh) 2016-01-07 2016-12-28 半导体器件及其制造方法

Country Status (4)

Country Link
US (2) US10600799B2 (enExample)
JP (1) JP6591291B2 (enExample)
CN (1) CN106952920B (enExample)
TW (1) TW201735260A (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019050314A (ja) * 2017-09-11 2019-03-28 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
KR102403031B1 (ko) * 2017-10-19 2022-05-27 삼성전자주식회사 반도체 장치
CN109979943B (zh) * 2017-12-28 2022-06-21 联华电子股份有限公司 半导体元件及其制造方法
TWI658585B (zh) * 2018-03-30 2019-05-01 世界先進積體電路股份有限公司 半導體結構及其製造方法
JP6998267B2 (ja) * 2018-05-08 2022-01-18 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP7038607B2 (ja) * 2018-06-08 2022-03-18 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
DE102019116911B4 (de) 2018-09-27 2024-05-29 Taiwan Semiconductor Manufacturing Co. Ltd. Metall-gate-strukturen für feldeffekttransistoren
US10797151B2 (en) * 2018-09-27 2020-10-06 Taiwan Semiconductor Manufacturing Co., Ltd. Metal gate structures for field effect transistors
US11158533B2 (en) 2018-11-07 2021-10-26 Vanguard International Semiconductor Corporation Semiconductor structures and fabrication method thereof
KR102582074B1 (ko) * 2018-12-28 2023-09-21 삼성전자주식회사 반도체 장치 및 그 제조 방법
US11158648B2 (en) * 2019-03-14 2021-10-26 Taiwan Semiconductor Manufacturing Co., Ltd. Double channel memory device
US10903366B1 (en) * 2019-09-17 2021-01-26 Taiwan Semiconductor Manufacturing Co., Ltd. Forming fin-FET semiconductor structures
JP2021082656A (ja) * 2019-11-15 2021-05-27 ルネサスエレクトロニクス株式会社 半導体装置
US11114451B1 (en) * 2020-02-27 2021-09-07 Silicon Storage Technology, Inc. Method of forming a device with FinFET split gate non-volatile memory cells and FinFET logic devices
JP2021174911A (ja) 2020-04-28 2021-11-01 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2022094651A (ja) 2020-12-15 2022-06-27 キオクシア株式会社 半導体装置および半導体装置の製造方法
US12137573B2 (en) 2021-12-09 2024-11-05 Taiwan Semiconductor Manufacturing Company Limited Self-aligned multilayer spacer matrix for high-density transistor arrays and methods for forming the same
CN115295570B (zh) * 2022-09-26 2022-12-30 合肥晶合集成电路股份有限公司 Cmos图像传感器的制作方法
CN115863252B (zh) * 2023-01-29 2023-05-23 合肥晶合集成电路股份有限公司 一种半导体结构的制备方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6204126B1 (en) * 2000-02-18 2001-03-20 Taiwan Semiconductor Manufacturing Company Method to fabricate a new structure with multi-self-aligned for split-gate flash
CN101261991A (zh) * 2007-03-06 2008-09-10 台湾积体电路制造股份有限公司 半导体结构与芯片
CN103296069A (zh) * 2012-02-28 2013-09-11 台湾积体电路制造股份有限公司 FinFET及其制造方法
CN103325736A (zh) * 2012-03-19 2013-09-25 三星电子株式会社 具有不同鳍宽的鳍式场效应晶体管的制作方法
US9214358B1 (en) * 2014-10-30 2015-12-15 Taiwan Semiconductor Manufacturing Company, Ltd. Equal gate height control method for semiconductor device with different pattern densites

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4564272B2 (ja) 2004-03-23 2010-10-20 株式会社東芝 半導体装置およびその製造方法
US7098477B2 (en) * 2004-04-23 2006-08-29 International Business Machines Corporation Structure and method of manufacturing a finFET device having stacked fins
KR100652433B1 (ko) * 2005-09-08 2006-12-01 삼성전자주식회사 다중 비트 저장이 가능한 비휘발성 메모리 소자 및 그 제조방법
KR100990599B1 (ko) * 2008-05-30 2010-10-29 주식회사 하이닉스반도체 반도체 장치의 제조 방법 및 그에 따라 제조된 반도체 장치
JP2010182751A (ja) * 2009-02-03 2010-08-19 Renesas Electronics Corp 不揮発性半導体記憶装置及びその製造方法
JP2011009296A (ja) * 2009-06-23 2011-01-13 Panasonic Corp 半導体装置及びその製造方法
JP2011040458A (ja) * 2009-08-07 2011-02-24 Renesas Electronics Corp 半導体装置およびその製造方法
US8941153B2 (en) * 2009-11-20 2015-01-27 Taiwan Semiconductor Manufacturing Company, Ltd. FinFETs with different fin heights
US20110147848A1 (en) * 2009-12-23 2011-06-23 Kuhn Kelin J Multiple transistor fin heights
JP5816560B2 (ja) * 2012-01-10 2015-11-18 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP5951374B2 (ja) * 2012-07-09 2016-07-13 ルネサスエレクトロニクス株式会社 半導体装置
KR101953240B1 (ko) * 2012-09-14 2019-03-04 삼성전자 주식회사 핀 트랜지스터 및 이를 포함하는 반도체 집적 회로
US9012287B2 (en) * 2012-11-14 2015-04-21 Taiwan Semiconductor Manufacturing Company, Ltd. Cell layout for SRAM FinFET transistors
US8896067B2 (en) * 2013-01-08 2014-11-25 International Business Machines Corporation Method of forming finFET of variable channel width
US9159832B2 (en) * 2013-03-08 2015-10-13 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor fin structures and methods for forming the same
KR102054302B1 (ko) 2013-06-21 2019-12-10 삼성전자 주식회사 반도체 장치 및 그 제조 방법
US20150014808A1 (en) * 2013-07-11 2015-01-15 United Microelectronics Corp. Semiconductor structure and fabrication method thereof
US9006110B1 (en) * 2013-11-08 2015-04-14 United Microelectronics Corp. Method for fabricating patterned structure of semiconductor device
US9184087B2 (en) * 2013-12-27 2015-11-10 Taiwan Semiconductor Manufacturing Co., Ltd. Mechanisms for forming FinFETs with different fin heights
WO2015142847A1 (en) * 2014-03-17 2015-09-24 Tufts University Integrated circuit with multi-threshold bulk finfets
JP2015185613A (ja) * 2014-03-20 2015-10-22 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
KR102327143B1 (ko) * 2015-03-03 2021-11-16 삼성전자주식회사 집적회로 소자
US10396000B2 (en) * 2015-07-01 2019-08-27 International Business Machines Corporation Test structure macro for monitoring dimensions of deep trench isolation regions and local trench isolation regions

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6204126B1 (en) * 2000-02-18 2001-03-20 Taiwan Semiconductor Manufacturing Company Method to fabricate a new structure with multi-self-aligned for split-gate flash
CN101261991A (zh) * 2007-03-06 2008-09-10 台湾积体电路制造股份有限公司 半导体结构与芯片
CN103296069A (zh) * 2012-02-28 2013-09-11 台湾积体电路制造股份有限公司 FinFET及其制造方法
CN103325736A (zh) * 2012-03-19 2013-09-25 三星电子株式会社 具有不同鳍宽的鳍式场效应晶体管的制作方法
US9214358B1 (en) * 2014-10-30 2015-12-15 Taiwan Semiconductor Manufacturing Company, Ltd. Equal gate height control method for semiconductor device with different pattern densites

Also Published As

Publication number Publication date
JP6591291B2 (ja) 2019-10-16
TW201735260A (zh) 2017-10-01
US10600799B2 (en) 2020-03-24
JP2017123398A (ja) 2017-07-13
US11393838B2 (en) 2022-07-19
US20170200726A1 (en) 2017-07-13
CN106952920A (zh) 2017-07-14
US20200185394A1 (en) 2020-06-11

Similar Documents

Publication Publication Date Title
CN106952920B (zh) 半导体器件及其制造方法
TWI643263B (zh) 半導體裝置之製造方法
JP5191633B2 (ja) 半導体装置およびその製造方法
JP5592214B2 (ja) 半導体装置の製造方法
CN107591449B (zh) 半导体器件及其制造方法
CN108231561B (zh) 半导体装置的制造方法和半导体装置
CN107871748B (zh) 半导体装置和半导体装置的制造方法
CN103035650A (zh) 半导体装置以及半导体装置的制造方法
JP2016039329A (ja) 半導体装置の製造方法
US10204789B2 (en) Manufacturing method of semiconductor device and semiconductor device
US10229998B2 (en) Semiconductor device and method of manufacturing the same
JP6787798B2 (ja) 半導体装置の製造方法
CN109994542B (zh) 半导体器件及其制造方法
TW201701487A (zh) 半導體裝置及其製造方法
TW201841348A (zh) 半導體裝置及其製造方法
JP6275920B2 (ja) 半導体装置およびその製造方法
CN109524344B (zh) 半导体装置及其制造方法
CN105914211A (zh) 制造半导体器件的方法
JP2022082914A (ja) 半導体装置およびその製造方法
JP2010093154A (ja) 不揮発性半導体記憶装置およびその製造方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant