CN106030820B - 具有经改进rds＊cgd的ldmos晶体管及形成所述ldmos晶体管的方法 - Google Patents

具有经改进rds＊cgd的ldmos晶体管及形成所述ldmos晶体管的方法 Download PDF

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CN106030820B
CN106030820B CN201580010177.2A CN201580010177A CN106030820B CN 106030820 B CN106030820 B CN 106030820B CN 201580010177 A CN201580010177 A CN 201580010177A CN 106030820 B CN106030820 B CN 106030820B
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semiconductor material
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drain
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CN106030820A (zh
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蔡军
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Texas Instruments Inc
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Texas Instruments Inc
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    • H—ELECTRICITY
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149—Source or drain regions of field-effect devices
    • H10D62/151—Source or drain regions of field-effect devices of IGFETs 
    • H10D62/156—Drain regions of DMOS transistors
    • H10D62/157—Impurity concentrations or distributions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0221—Manufacture or treatment of FETs having insulated gates [IGFET] having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended-drain MOSFETs [EDMOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0281—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of lateral DMOS [LDMOS] FETs
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/603—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
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    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/65—Lateral DMOS [LDMOS] FETs
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    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
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    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
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    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149—Source or drain regions of field-effect devices
    • H10D62/151—Source or drain regions of field-effect devices of IGFETs 
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    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351—Substrate regions of field-effect devices
    • H10D62/357—Substrate regions of field-effect devices of FETs
    • H10D62/364—Substrate regions of field-effect devices of FETs of IGFETs
    • H10D62/371—Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/393—Body regions of DMOS transistors or IGBTs 
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    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps
    • H10D62/116—Dielectric isolations, e.g. air gaps adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions
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    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
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    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
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    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/22—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
    • H10P30/221—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks characterised by the angle between the ion beam and the mask
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    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/222—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the angle between the ion beam and the crystal planes or the main crystal surface

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
CN201580010177.2A 2014-03-06 2015-03-06 具有经改进rds＊cgd的ldmos晶体管及形成所述ldmos晶体管的方法 Active CN106030820B (zh)

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CN201910792601.3A CN110649100B (zh) 2014-03-06 2015-03-06 具有经改进rds*cgd的ldmos晶体管及形成所述ldmos晶体管的方法

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201461948853P 2014-03-06 2014-03-06
US61/948,853 2014-03-06
US14/556,185 US9455332B2 (en) 2014-03-06 2014-11-30 LDMOS transistor and method of forming the LDMOS transistor with improved Rds*Cgd
US14/556,185 2014-11-30
PCT/US2015/019258 WO2015134909A1 (en) 2014-03-06 2015-03-06 Ldmos transistor and method of forming the ldmos transistor with improved rds*cgd

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CN201910792601.3A Active CN110649100B (zh) 2014-03-06 2015-03-06 具有经改进rds*cgd的ldmos晶体管及形成所述ldmos晶体管的方法

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US (4) US9455332B2 (https=)
JP (1) JP6574792B2 (https=)
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WO (1) WO2015134909A1 (https=)

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US20160035822A1 (en) * 2014-07-30 2016-02-04 Freescale Semiconductor, Inc. High Voltage Semiconductor Devices and Methods for their Fabrication
US9893146B1 (en) * 2016-10-04 2018-02-13 Monolithic Power Systems, Inc. Lateral DMOS and the method for forming thereof
US9865729B1 (en) 2016-12-20 2018-01-09 Texas Instruments Incorporated Laterally diffused metal oxide semiconductor with segmented gate oxide
US10103258B2 (en) 2016-12-29 2018-10-16 Texas Instruments Incorporated Laterally diffused metal oxide semiconductor with gate poly contact within source window
US10529804B2 (en) * 2017-08-21 2020-01-07 Texas Instruments Incorporated Integrated circuit, LDMOS with trapezoid JFET, bottom gate and ballast drift and fabrication method
US10103233B1 (en) 2017-09-29 2018-10-16 Nxp Usa, Inc. Transistor die with drain via arrangement, and methods of manufacture thereof
CN116759455A (zh) * 2018-05-25 2023-09-15 矽力杰半导体技术(杭州)有限公司 横向扩散金属氧化物半导体器件和其制造方法
US10672903B2 (en) * 2018-07-25 2020-06-02 Nxp Usa, Inc. Semiconductor device with drain active area
CN114256131B (zh) * 2020-09-23 2025-08-19 无锡华润上华科技有限公司 半导体结构的制备方法及半导体结构
US11658240B2 (en) 2020-10-04 2023-05-23 Globalfoundries Singapore Pte. Ltd. Semiconductor transistors on multi-layered substrates
CN114122113B (zh) * 2022-01-27 2022-05-03 江苏游隼微电子有限公司 一种高可靠的mosfet功率半导体器件结构
US12336220B2 (en) 2022-02-24 2025-06-17 Globalfoundries Singapore Pte. Ltd. Extended-drain metal-oxide-semiconductor devices with a gap between the drain and body wells
CN121001375B (zh) * 2025-10-21 2026-01-30 合肥晶合集成电路股份有限公司 一种ldmos器件的制备方法及ldmos器件

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Publication number Publication date
US20160365412A1 (en) 2016-12-15
CN106030820A (zh) 2016-10-12
US20200066842A1 (en) 2020-02-27
US9455332B2 (en) 2016-09-27
CN110649100B (zh) 2024-05-10
WO2015134909A1 (en) 2015-09-11
US11610968B2 (en) 2023-03-21
US10461156B2 (en) 2019-10-29
US20150255596A1 (en) 2015-09-10
CN110649100A (zh) 2020-01-03
JP2017507502A (ja) 2017-03-16
JP6574792B2 (ja) 2019-09-11
US20230215918A1 (en) 2023-07-06

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