CN105514033A - 阵列基板的制作方法 - Google Patents
阵列基板的制作方法 Download PDFInfo
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- CN105514033A CN105514033A CN201610020299.6A CN201610020299A CN105514033A CN 105514033 A CN105514033 A CN 105514033A CN 201610020299 A CN201610020299 A CN 201610020299A CN 105514033 A CN105514033 A CN 105514033A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 29
- 239000000758 substrate Substances 0.000 title claims abstract description 29
- 238000000034 method Methods 0.000 claims abstract description 54
- 229910052751 metal Inorganic materials 0.000 claims abstract description 16
- 239000002184 metal Substances 0.000 claims abstract description 16
- 239000010410 layer Substances 0.000 claims description 104
- 229920002120 photoresistant polymer Polymers 0.000 claims description 11
- 239000011248 coating agent Substances 0.000 claims description 8
- 238000000576 coating method Methods 0.000 claims description 8
- 239000012212 insulator Substances 0.000 claims description 7
- 239000011229 interlayer Substances 0.000 claims description 7
- 238000000151 deposition Methods 0.000 claims description 6
- 230000006698 induction Effects 0.000 claims description 6
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 230000008021 deposition Effects 0.000 claims description 3
- 230000003467 diminishing effect Effects 0.000 claims description 3
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical group [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 abstract 1
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 11
- 239000004973 liquid crystal related substance Substances 0.000 description 10
- 238000010586 diagram Methods 0.000 description 9
- 239000010409 thin film Substances 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 4
- 150000004706 metal oxides Chemical class 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
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- 229910052581 Si3N4 Inorganic materials 0.000 description 2
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- 238000002360 preparation method Methods 0.000 description 2
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
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- 239000011368 organic material Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
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Abstract
本发明提供一种阵列基板的制作方法,通过在平坦层光罩(40)上用于形成沟槽的条形图案(401)两侧设置坡角改善图案(402),从而可以降低在平坦层(30)上形成的沟槽(32)的坡角(321),使其坡度变缓,防止后续制程中造成金属或ITO残留引起信号线间的短路,提高产品良率;对于内嵌式触控结构的阵列基板的沟槽处,不需对触控感应线进行换线,降低工艺难度,提升产品良率。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种阵列基板的制作方法。
背景技术
随着显示技术的发展,液晶显示器(LiquidCrystalDisplay,LCD)等平面显示装置因具有高画质、省电、机身薄及应用范围广等优点,而被广泛的应用于手机、电视、个人数字助理、数字相机、笔记本电脑、台式计算机等各种消费性电子产品,成为显示装置中的主流。
现有市场上的液晶显示装置大部分为背光型液晶显示器,其包括液晶显示面板及背光模组(backlightmodule)。液晶显示面板的工作原理是在两片平行的玻璃基板当中放置液晶分子,两片玻璃基板中间有许多垂直和水平的细小电线,通过通电与否来控制液晶分子改变方向,将背光模组的光线折射出来产生画面。
通常液晶显示面板由彩膜(CF,ColorFilter)基板、薄膜晶体管(TFT,ThinFilmTransistor)基板、夹于彩膜基板与薄膜晶体管基板之间的液晶(LC,LiquidCrystal)及密封胶框(Sealant)组成,其成型工艺一般包括:前段阵列(Array)制程(薄膜、黄光、蚀刻及剥膜)、中段成盒(Cell)制程(TFT基板与CF基板贴合)及后段模组组装制程(驱动IC与印刷电路板压合)。其中,前段Array制程主要是形成TFT基板,以便于控制液晶分子的运动;中段Cell制程主要是在TFT基板与CF基板之间添加液晶;后段模组组装制程主要是驱动IC压合与印刷电路板的整合,进而驱动液晶分子转动,显示图像。
为了解决现实屏幕的亮度保持不变且背光亮度功耗不提升,技术人员想出了各种办法来提升透过率,现在常规的做法是采用平坦层来减少像素电极和公共电极与信号线或扫描线间的电容,一般平坦层的厚度为1.5μm以上,这使得开口率增大。同时为了实现显示设备窄边框的需求,通常的做法是压缩液晶显示面板的框胶宽度;为了不减小框胶对于TFT基板和CF基板的黏附性,通常会在TFT基板周边的平坦层(PLN)上挖一条沟槽,这样框胶与TFT基板的接触面积不会减小,但这又带来了一个技术上的问题,PLN的沟槽一般是1.5μm以上的较深的沟槽,且沟槽边缘的坡角(Taper)很大,一般大于50度,在后续进行ITO像素电极时通常在沟槽里面有大量的ITO残留,这使得ITO引起了信号线间的短路,引起显示不良,如何解决ITO引起的信号线间的短路是中小尺寸面对的一个问题。
如图1-2所示,现有的阵列基板制作方法包括如下步骤:在基板100上形成TFT层200,在所述TFT层200上涂布有机材料形成平坦层300,并采用黄光制程在所述平坦层300的周边区域中形成沟槽320;在完成平坦层300的制程后,在平坦层300沉积ITO薄膜400,之后采用光刻制程对所述ITO薄膜400进行图形化处理,首先,在所述ITO薄膜400上涂布光阻形成光阻层500,之后对所述光阻层500进行曝光、显影,由于沟槽320的坡角(Taper)过大,因此在曝光、显影后所述沟槽320内通常会形成光阻残留530(如图1所示),由于残留光阻的遮挡,对ITO薄膜400蚀刻之后在沟槽320内形成了ITO残留430(如图2所示)。同理,对于In-cellTouch(内嵌式触控)结构的阵列基板,也会出现M3(触控感应线Rx所在金属层)的金属残留,进而造成触控(Touch)信号错乱,影响产品品质。
发明内容
本发明的目的在于提供一种阵列基板的制作方法,可以降低在平坦层周边区域上形成的沟槽的坡角,使其坡度变缓,防止后续制程中造成金属或ITO残留引起信号线间的短路,提高产品良率。
为实现上述目的,本发明提供一种阵列基板的制作方法,包括如下步骤:
步骤1、提供一基板,在所述基板上形成TFT层,之后在所述TFT层上涂布有机光阻材料,形成平坦层;
步骤2、提供一平坦层光罩,所述平坦层光罩上设有对应于所述平坦层周边区域的数条沟槽图案,所述沟槽图案包括用于在平坦层上形成沟槽的条形图案、以及设于所述条形图案两侧的坡角改善图案,所述坡角改善图案包括沿所述条形图案的边界并列密集排布的数个微型图案,所述微型图案的宽度从所述条形图案的边界向外逐渐变小;
步骤3、采用所述平坦层光罩对所述平坦层进行曝光、显影,在所述平坦层的周边区域形成数条沟槽,由于所述平坦层光罩上用于形成沟槽的条形图案两侧设有坡角改善图案,从而可以降低沟槽的坡角,使其坡度变缓。
所述基板为透明基板;所述TFT层包括缓冲层、栅极绝缘层、层间介电层、以及分布于所述缓冲层、栅极绝缘层、层间介电层、及平坦层之间的有源层、栅极、及源/漏极。
所述微型图案包括从所述条形图案的边界向外依次排列且半径逐渐变小的数个圆形图案。
所述圆形图案的直径为1~3μm。
所述微型图案为三角形图案。
所述三角形图案的宽度为1~3μm。
当所述平坦层为正型有机光阻材料时,所述平坦层光罩上的沟槽图案为透明,其它区域为不透明;当所述平坦层为负型有机光阻材料时,所述平坦层光罩上的沟槽图案为不透明,其它区域为透明。
所述步骤3中得到的沟槽的坡角介于20度与50度之间。
还包括步骤4、在所述平坦层上沉积氧化物导电层,采用光刻制程对所述氧化物导电层进行图案化处理,形成像素电极,由于所述步骤3中形成的沟槽的坡角较缓,从而可以避免氧化物导电层在沟槽中造成残留。
还包括步骤4’、在所述平坦层上沉积金属层,采用光刻制程对所述金属层进行图案化处理,形成触控感应线,由于所述步骤3中形成的沟槽的坡角较缓,从而可以避免金属层在沟槽中造成残留。
本发明的有益效果:本发明提供的一种阵列基板的制作方法,通过在平坦层光罩上用于形成沟槽的条形图案两侧设置坡角改善图案,从而可以降低在平坦层上形成的沟槽的坡角,使其坡度变缓,防止后续制程中造成金属或ITO残留引起信号线间的短路,提高产品良率;对于内嵌式触控结构的阵列基板的沟槽处,不需对触控感应线进行换线,降低工艺难度,提升产品良率。
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。
附图说明
下面结合附图,通过对本发明的具体实施方式详细描述,将使本发明的技术方案及其它有益效果显而易见。
附图中,
图1-2为现有的阵列基板的制作方法的示意图;
图3为本发明的阵列基板的制作方法步骤1的示意图;
图4为本发明的阵列基板的制作方法步骤2所提供的平坦层光罩第一实施例的示意图;
图5为图4中区域A的放大示意图;
图6为本发明的阵列基板的制作方法步骤2所提供的平坦层光罩第二实施例的示意图;
图7为图6中区域B的放大示意图;
图8为本发明的阵列基板的制作方法步骤3的示意图;
图9-10为本发明的阵列基板的制作方法步骤4的示意图;
图11-12为本发明的阵列基板的制作方法步骤4’的示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图3-12,本发明提供一种阵列基板的制作方法,包括如下步骤:
步骤1、如图3所示,提供一基板10,在所述基板10上形成TFT层20,之后在所述TFT层20上涂布有机光阻材料,形成平坦层30。
具体的,所述基板10为透明基板,优选为玻璃基板。
具体的,如图3所示,所述TFT层20包括缓冲层21、栅极绝缘层23、及层间介电层25。进一步的,所述TFT层20还包括分布于所述缓冲层21、栅极绝缘层23、层间介电层25、及平坦层30之间的有源层、栅极、及源/漏极。
具体的,所述缓冲层21、栅极绝缘层23、层间介电层25为氧化硅(SiOx)层、氮化硅(SiNx)层、或者由氧化硅层与氮化硅层叠加构成的复合层。
步骤2、如图4-7所示,提供一平坦层光罩40,所述平坦层光罩40上设有对应于所述平坦层30周边区域的数条沟槽图案41,所述沟槽图案41包括用于在平坦层上形成沟槽的条形图案401、以及设于所述条形图案401两侧的坡角改善图案402,所述坡角改善图案402包括沿所述条形图案401的边界并列密集排布的数个微型图案421,所述微型图案421的宽度从所述条形图案401的边界向外逐渐变小。
具体的,如图4-5所示,所述微型图案421包括从所述条形图案401的边界向外依次排列且半径逐渐变小的数个圆形图案425。具体的,所述圆形图案425的直径为1~3μm。
或者,如图6-7所示,所述微型图案421为三角形图案426。具体的,所述三角形图案426的宽度为1~3μm。
具体的,当所述平坦层30为正型有机光阻材料时,所述平坦层光罩40上的沟槽图案41为透明,其它区域为不透明。
当所述平坦层30为负型有机光阻材料时,所述平坦层光罩40上的沟槽图案41为不透明,其它区域为透明。
步骤3、如图8所示,采用所述平坦层光罩40对所述平坦层30进行曝光、显影,在所述平坦层30的周边区域形成数条沟槽32,由于所述平坦层光罩40上用于形成沟槽的条形图案401两侧设有坡角改善图案402,从而可以降低沟槽32的坡角321,使其坡度变缓。
具体的,所述沟槽32对应液晶显示面板的封框胶设置,用于提高封框胶与阵列基板的接触面积。
具体的,在曝光过程中,所述坡角改善图案402可以达到类似half-tone(半色调)的效果,从而减缓平坦层30周边区域的沟槽32的坡角321,防止在后续制程中造成金属或ITO残留引起信号线间的短路,提高产品良率。
具体的,所述步骤3中得到的沟槽32的坡角321介于20度与50度之间。
对于普通的液晶显示面板来说,所述阵列基板的制备方法还包括步骤4、如图9-10所示,在所述平坦层30上沉积氧化物导电层50,采用光刻制程对所述氧化物导电层50进行图案化处理,形成像素电极51,由于所述步骤3中形成的沟槽32的坡角321较缓,从而在可以避免氧化物导电层50在沟槽32中造成残留,提高阵列基板的产品良率。优选的,所述氧化物导电层50的材料为ITO(氧化铟锡)。
对于内嵌式触控显示面板来说,所述阵列基板的制备方法还包括步骤4’、如图11-12所示,在所述平坦层30上沉积金属层60,采用光刻制程对所述金属层60进行图案化处理,形成触控感应线(Rx)61,由于所述步骤3中形成的沟槽32的坡角321较缓,从而可以避免金属层60在沟槽32中造成残留,提高阵列基板的产品良率。
综上所述,本发明提供的一种阵列基板的制作方法,通过在平坦层光罩40上用于形成沟槽的条形图案401两侧设置坡角改善图案402,从而可以降低在平坦层30上形成的沟槽32的坡角321,使其坡度变缓,防止后续制程中造成金属或ITO残留引起信号线间的短路,提高产品良率;对于内嵌式触控结构的阵列基板的沟槽处,不需对触控感应线进行换线,降低工艺难度,提升产品良率。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明权利要求的保护范围。
Claims (10)
1.一种阵列基板的制作方法,其特征在于,包括如下步骤:
步骤1、提供一基板(10),在所述基板(10)上形成TFT层(20),之后在所述TFT层(20)上涂布有机光阻材料,形成平坦层(30);
步骤2、提供一平坦层光罩(40),所述平坦层光罩(40)上设有对应于所述平坦层(30)周边区域的数条沟槽图案(41),所述沟槽图案(41)包括用于在平坦层上形成沟槽的条形图案(401)、以及设于所述条形图案(401)两侧的坡角改善图案(402),所述坡角改善图案(402)包括沿所述条形图案(401)的边界并列密集排布的数个微型图案(421),所述微型图案(421)的宽度从所述条形图案(401)的边界向外逐渐变小;
步骤3、采用所述平坦层光罩(40)对所述平坦层(30)进行曝光、显影,在所述平坦层(30)的周边区域形成数条沟槽(32),由于所述平坦层光罩(40)上用于形成沟槽的条形图案(401)两侧设有坡角改善图案(402),从而可以降低沟槽(32)的坡角(321),使其坡度变缓。
2.如权利要求1所述的阵列基板的制作方法,其特征在于,所述基板(10)为透明基板;所述TFT层(20)包括缓冲层(21)、栅极绝缘层(23)、层间介电层(25)、以及分布于所述缓冲层(21)、栅极绝缘层(23)、层间介电层(25)、及平坦层(30)之间的有源层、栅极、及源/漏极。
3.如权利要求1所述的阵列基板的制作方法,其特征在于,所述微型图案(421)包括从所述条形图案(401)的边界向外依次排列且半径逐渐变小的数个圆形图案(425)。
4.如权利要求3所述的阵列基板的制作方法,其特征在于,所述圆形图案(425)的直径为1~3μm。
5.如权利要求1所述的阵列基板的制作方法,其特征在于,所述微型图案(421)为三角形图案(426)。
6.如权利要求5所述的阵列基板的制作方法,其特征在于,所述三角形图案(426)的宽度为1~3μm。
7.如权利要求1所述的阵列基板的制作方法,其特征在于,当所述平坦层(30)为正型有机光阻材料时,所述平坦层光罩(40)上的沟槽图案(41)为透明,其它区域为不透明;当所述平坦层(30)为负型有机光阻材料时,所述平坦层光罩(40)上的沟槽图案(41)为不透明,其它区域为透明。
8.如权利要求1所述的阵列基板的制作方法,其特征在于,所述步骤3中得到的沟槽(32)的坡角(321)介于20度与50度之间。
9.如权利要求1所述的阵列基板的制作方法,其特征在于,还包括步骤4、在所述平坦层(30)上沉积氧化物导电层(50),采用光刻制程对所述氧化物导电层(50)进行图案化处理,形成像素电极(51),由于所述步骤3中形成的沟槽(32)的坡角(321)较缓,从而可以避免氧化物导电层(50)在沟槽(32)中造成残留。
10.如权利要求1所述的阵列基板的制作方法,其特征在于,还包括步骤4’、在所述平坦层(30)上沉积金属层(60),采用光刻制程对所述金属层(60)进行图案化处理,形成触控感应线(61),由于所述步骤3中形成的沟槽(32)的坡角(321)较缓,从而可以避免金属层(60)在沟槽(32)中造成残留。
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US20090109364A1 (en) * | 2007-10-29 | 2009-04-30 | Joo Young Yang | Exposing device, methods for forming pattern, channel, and hole by using the same, and liquid crystal display device therewith and method for fabricating the same |
CN103995609A (zh) * | 2013-02-17 | 2014-08-20 | 宸鸿科技(厦门)有限公司 | 触控装置及其形成方法 |
CN104952882A (zh) * | 2015-03-26 | 2015-09-30 | 友达光电股份有限公司 | 主动元件阵列基板 |
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CN106206617A (zh) * | 2016-08-29 | 2016-12-07 | 武汉华星光电技术有限公司 | 基于低温多晶硅的阵列基板及其制作方法 |
CN107748460A (zh) * | 2017-10-25 | 2018-03-02 | 昆山龙腾光电有限公司 | 基板结构及基板结构的制作方法 |
CN107799473A (zh) * | 2017-10-25 | 2018-03-13 | 武汉华星光电技术有限公司 | 阵列基板的制作方法 |
CN108132567B (zh) * | 2017-12-28 | 2020-09-18 | 深圳市华星光电技术有限公司 | 一种阵列基板的过孔结构及光罩 |
CN108132567A (zh) * | 2017-12-28 | 2018-06-08 | 深圳市华星光电技术有限公司 | 一种阵列基板的过孔结构及光罩 |
CN110109279B (zh) * | 2019-04-22 | 2021-04-02 | 武汉华星光电技术有限公司 | 阵列基板 |
CN110109279A (zh) * | 2019-04-22 | 2019-08-09 | 武汉华星光电技术有限公司 | 阵列基板 |
CN111261577A (zh) * | 2020-02-04 | 2020-06-09 | 武汉华星光电技术有限公司 | 阵列基板、显示面板及阵列基板的制作方法 |
WO2021155626A1 (zh) * | 2020-02-04 | 2021-08-12 | 武汉华星光电技术有限公司 | 阵列基板、显示面板及阵列基板的制作方法 |
US11315888B2 (en) | 2020-02-04 | 2022-04-26 | Wuhan China Star Optoelectronics Technology Co., Ltd. | Array substrate, display panel, and manufacturing method of array substrate |
CN111462615A (zh) * | 2020-04-27 | 2020-07-28 | Tcl华星光电技术有限公司 | 显示面板及其制作方法 |
CN111708449A (zh) * | 2020-04-30 | 2020-09-25 | 南昌欧菲显示科技有限公司 | 触控模组及其制备方法、电子设备 |
WO2023184374A1 (zh) * | 2022-03-31 | 2023-10-05 | 京东方科技集团股份有限公司 | 显示面板、阵列基板及其制备方法 |
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US20170200750A1 (en) | 2017-07-13 |
CN105514033B (zh) | 2019-01-15 |
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