CN105304495A - 薄膜晶体管及其制备方法、阵列基板 - Google Patents
薄膜晶体管及其制备方法、阵列基板 Download PDFInfo
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- CN105304495A CN105304495A CN201510604545.8A CN201510604545A CN105304495A CN 105304495 A CN105304495 A CN 105304495A CN 201510604545 A CN201510604545 A CN 201510604545A CN 105304495 A CN105304495 A CN 105304495A
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- graphene oxide
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- graphene
- oxide composite
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- 239000010409 thin film Substances 0.000 title claims abstract description 70
- 239000000758 substrate Substances 0.000 title abstract description 6
- 238000004519 manufacturing process Methods 0.000 title abstract 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 304
- 229910021389 graphene Inorganic materials 0.000 claims abstract description 301
- 239000002131 composite material Substances 0.000 claims description 135
- 239000000463 material Substances 0.000 claims description 73
- 238000000059 patterning Methods 0.000 claims description 55
- 238000000034 method Methods 0.000 claims description 47
- 238000009413 insulation Methods 0.000 claims description 40
- 230000008569 process Effects 0.000 claims description 29
- 238000002360 preparation method Methods 0.000 claims description 26
- 230000015572 biosynthetic process Effects 0.000 claims description 23
- 229920002120 photoresistant polymer Polymers 0.000 claims description 21
- 230000009467 reduction Effects 0.000 claims description 20
- 229920003229 poly(methyl methacrylate) Polymers 0.000 claims description 16
- 239000004926 polymethyl methacrylate Substances 0.000 claims description 16
- 238000001259 photo etching Methods 0.000 claims description 4
- 239000012212 insulator Substances 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 209
- 238000005516 engineering process Methods 0.000 description 9
- 230000008859 change Effects 0.000 description 6
- 239000002994 raw material Substances 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 4
- 239000007789 gas Substances 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- 239000001301 oxygen Substances 0.000 description 4
- 229910052760 oxygen Inorganic materials 0.000 description 4
- 239000010408 film Substances 0.000 description 3
- 229910002804 graphite Inorganic materials 0.000 description 3
- 239000010439 graphite Substances 0.000 description 3
- 239000001257 hydrogen Substances 0.000 description 3
- 229910052739 hydrogen Inorganic materials 0.000 description 3
- 239000002904 solvent Substances 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 2
- OAKJQQAXSVQMHS-UHFFFAOYSA-N Hydrazine Chemical compound NN OAKJQQAXSVQMHS-UHFFFAOYSA-N 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- CPELXLSAUQHCOX-UHFFFAOYSA-N Hydrogen bromide Chemical compound Br CPELXLSAUQHCOX-UHFFFAOYSA-N 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 150000001721 carbon Chemical group 0.000 description 2
- 239000006185 dispersion Substances 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 238000009832 plasma treatment Methods 0.000 description 2
- 239000000725 suspension Substances 0.000 description 2
- MGWGWNFMUOTEHG-UHFFFAOYSA-N 4-(3,5-dimethylphenyl)-1,3-thiazol-2-amine Chemical compound CC1=CC(C)=CC(C=2N=C(N)SC=2)=C1 MGWGWNFMUOTEHG-UHFFFAOYSA-N 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000000460 chlorine Substances 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 239000004811 fluoropolymer Substances 0.000 description 1
- 229920002313 fluoropolymer Polymers 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 229910000042 hydrogen bromide Inorganic materials 0.000 description 1
- XMBWDFGMSWQBCA-UHFFFAOYSA-N hydrogen iodide Chemical compound I XMBWDFGMSWQBCA-UHFFFAOYSA-N 0.000 description 1
- 229910000043 hydrogen iodide Inorganic materials 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 238000001764 infiltration Methods 0.000 description 1
- 230000008595 infiltration Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- JCXJVPUVTGWSNB-UHFFFAOYSA-N nitrogen dioxide Inorganic materials O=[N]=O JCXJVPUVTGWSNB-UHFFFAOYSA-N 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
- OFIYHXOOOISSDN-UHFFFAOYSA-N tellanylidenegallium Chemical compound [Te]=[Ga] OFIYHXOOOISSDN-UHFFFAOYSA-N 0.000 description 1
- -1 this Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 229910001868 water Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/1606—Graphene
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/0405—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising semiconducting carbon, e.g. diamond, diamond-like carbon
- H01L21/041—Making n- or p-doped regions
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/44—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
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- H—ELECTRICITY
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
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- H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66015—Multistep manufacturing processes of devices having a semiconductor body comprising semiconducting carbon, e.g. diamond, diamond-like carbon, graphene
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- H01L29/66015—Multistep manufacturing processes of devices having a semiconductor body comprising semiconducting carbon, e.g. diamond, diamond-like carbon, graphene
- H01L29/66037—Multistep manufacturing processes of devices having a semiconductor body comprising semiconducting carbon, e.g. diamond, diamond-like carbon, graphene the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66045—Field-effect transistors
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- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
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Abstract
本发明提供一种薄膜晶体管及其制备方法、阵列基板,属于薄膜晶体管技术领域,其可解决现有的薄膜晶体管性能不佳的问题。本发明的薄膜晶体管的制备方法包括:形成由石墨烯构成的栅极的步骤,形成由氧化石墨烯构成的栅绝缘层的步骤,形成由掺杂的氧化石墨烯或掺杂的石墨烯构成的有源区的步骤,形成由石墨烯构成的源极、漏极的步骤;其中,构成所述源极、漏极、栅极的石墨烯由氧化石墨烯还原形成;构成所述有源区的掺杂的氧化石墨烯或掺杂的石墨烯由氧化石墨烯处理形成。
Description
技术领域
本发明属于薄膜晶体管技术领域,具体涉及一种薄膜晶体管及其制备方法、阵列基板。
背景技术
在各种显示装置(如液晶显示装置、有机发光二极管显示装置)中,阵列基板都是重要的部件。而在阵列基板中,包括大量的薄膜晶体管,故薄膜晶体管的性能对阵列基板的性能有着重要的影响。但现有的金属氧化物薄膜晶体管、多晶硅薄膜晶体管的性能仍然达不到要求。
发明内容
本发明针对现有的薄膜晶体管性能不佳的问题,提供一种综合性能性能良好的薄膜晶体管及其制备方法、阵列基板。
解决本发明技术问题所采用的技术方案是一种薄膜晶体管的制备方法,其包括:
形成由石墨烯构成的栅极的步骤,形成由氧化石墨烯构成的栅绝缘层的步骤,形成由掺杂的氧化石墨烯或掺杂的石墨烯构成的有源区的步骤,形成由石墨烯构成的源极、漏极的步骤;
其中,构成所述源极、漏极、栅极的石墨烯由氧化石墨烯还原形成;构成所述有源区的掺杂的氧化石墨烯或掺杂的石墨烯由氧化石墨烯处理形成。
优选的是,所述形成由石墨烯构成的栅极的步骤包括:形成第一氧化石墨烯材料层;对第一氧化石墨烯材料层进行还原得到第一石墨烯材料层,将所述第一石墨烯材料层图案化形成栅极;或,将第一氧化石墨烯材料层图案化,对图案化的第一氧化石墨烯材料层进行还原,形成栅极。
优选的是,所述形成由氧化石墨烯构成的栅绝缘层的步骤包括:形成第二氧化石墨烯材料层,以所述第二氧化石墨烯材料层作为栅绝缘层。
优选的是,所述形成由掺杂的氧化石墨烯或掺杂的石墨烯构成的有源区的步骤包括:形成第三氧化石墨烯材料层;对第三氧化石墨烯材料层进行掺杂,得到掺杂的氧化石墨烯材料层,对掺杂的氧化石墨烯材料层进行图案化形成有源区;或,将第三氧化石墨烯材料层图案化,对图案化的第三氧化石墨烯材料层进行掺杂,形成有源区;或,对第三氧化石墨烯材料层进行还原后再掺杂,得到掺杂的石墨烯材料层,对掺杂的石墨烯材料层进行图案化形成有源区;或,将第三氧化石墨烯材料层图案化,对图案化的第三氧化石墨烯材料层进行还原后再掺杂,形成有源区。
优选的是,所述形成由掺杂的氧化石墨烯或掺杂的石墨烯构成的有源区的步骤包括:形成第三氧化石墨烯材料层;在第三氧化石墨烯材料层上形成光刻胶层,所述光刻胶层中含有聚甲基丙烯酸甲酯,且通过加热至50℃~100℃使聚甲基丙烯酸甲酯渗透至第三氧化石墨烯材料层而将其转变为掺杂的氧化石墨烯材料层;或,对第三氧化石墨烯材料层进行还原,得到第二石墨烯材料层,之后在其上形成光刻胶层,所述光刻胶层中含有聚甲基丙烯酸甲酯,且通过加热至50℃~100℃使聚甲基丙烯酸甲酯渗透至第二石墨烯材料层而将其转变为掺杂的石墨烯材料层;通过光刻工艺将掺杂的氧化石墨烯材料层或掺杂的石墨烯材料层图案化,形成有源区。
优选的是,所述形成由石墨烯构成的源极、漏极的步骤包括:形成第四氧化石墨烯材料层;对第四氧化石墨烯材料层进行还原得到第三石墨烯材料层,将所述第三石墨烯材料层图案化形成源极、漏极;或,将第四氧化石墨烯材料层图案化,对图案化的第四氧化石墨烯材料层进行还原,形成源极、漏极。
优选的是,所述形成由氧化石墨烯构成的栅绝缘层的步骤,以及形成由掺杂的氧化石墨烯或掺杂的石墨烯构成的有源区的步骤包括:形成第五氧化石墨烯材料层;对第五氧化石墨烯材料层的表层部分进行包括掺杂、图案化的处理,得到由掺杂的氧化石墨烯构成的有源区;或,对第五氧化石墨烯材料层的表层部分进行包括还原、掺杂、图案化的处理,得到由掺杂的石墨烯构成的有源区;未被处理的第五氧化石墨烯材料层构成栅绝缘层。
优选的是,所述形成由石墨烯构成的源极、漏极的步骤,以及形成由掺杂的氧化石墨烯或掺杂的石墨烯构成的有源区的步骤包括:形成第六氧化石墨烯材料层;对第六氧化石墨烯材料层进行还原得到第四石墨烯材料层;对第四石墨烯材料层进行包括图案化和掺杂的处理,得到源极、漏极、有源区;其中,图案化为使第四石墨烯材料层形成源极、漏极、有源区的图形,掺杂为对与有源区对应的部分进行掺杂。
解决本发明技术问题所采用的技术方案是一种薄膜晶体管,包括源极、漏极、栅极、有源区、栅绝缘层,且
所述源极、漏极、栅极由石墨烯构成;
所述有源区由掺杂的氧化石墨烯或掺杂的石墨烯构成;
所述栅绝缘层由氧化石墨烯构成;
其中,构成所述源极、漏极、栅极的石墨烯由氧化石墨烯还原形成;构成所述有源区的掺杂的氧化石墨烯或掺杂的石墨烯由氧化石墨烯处理形成。
优选的是,构成所述有源区的掺杂的氧化石墨烯由对氧化石墨烯进行掺杂处理形成;或,构成所述有源区的掺杂的石墨烯由对氧化石墨烯进行还原后再进行掺杂处理形成。
优选的是,所述源极、漏极的厚度在1nm~100nm;和/或所述栅极的厚度在1nm~100nm;和/或所述有源区的厚度在1nm~100nm;和/或所述栅绝缘层的厚度在30nm~300nm。
解决本发明技术问题所采用的技术方案是一种阵列基板,其包括上述的薄膜晶体管。
优选的是,所述的阵列基板还包括:像素电极,所述像素电极与所述源极、漏极同层设置;和/或,公共电极,所述公共电极与所述栅极同层设置。
本发明的薄膜晶体管的全部结构均由氧化石墨烯为基础原料形成,故其制备中使用的原料单一,制备简便,且氧化石墨烯便于形成薄膜,故易于用在常规工艺制备中。而且,薄膜晶体管的结构全部由石墨烯或氧化石墨烯构成,其中石墨烯构成的源极、漏极、栅极电阻低、导电性好,氧化石墨烯的栅绝缘层的绝缘性好,掺杂氧化石墨烯或掺杂石墨烯的有源区迁移率高、开关电流比大;同时,由于其中各结构的材料相似,因此各结构间的晶格常数匹配,结合面不产生晶格畸变,有源区与源极、漏极间的接触电阻小,不需要欧姆接触层;因此,本发明的薄膜晶体管具有优异的综合性能。
附图说明
图1为本发明的实施例的一种薄膜晶体管的剖面结构示意图;
图2为本发明的实施例的一种薄膜晶体管形成栅极后的剖面结构示意图;
图2为本发明的实施例的一种薄膜晶体管形成栅极后的剖面结构示意图;
图3为本发明的实施例的一种薄膜晶体管形成第一氧化石墨烯材料层后的剖面结构示意图;
图4为本发明的实施例的一种薄膜晶体管形成第一石墨烯材料层后的剖面结构示意图;
图5为本发明的实施例的一种薄膜晶体管对第一氧化石墨烯材料层进行图案化后的剖面结构示意图;
图6为本发明的实施例的一种薄膜晶体管形成栅绝缘层后的剖面结构示意图;
图7为本发明的实施例的一种薄膜晶体管形成有源区后的剖面结构示意图;
图8为本发明的实施例的一种薄膜晶体管形成第五氧化石墨烯材料层后的剖面结构示意图;
图9为本发明的实施例的一种薄膜晶体管对第五氧化石墨烯材料层的表层进行还原后的剖面结构示意图;
图10为本发明的实施例的一种薄膜晶体管形成第六氧化石墨烯材料层后的剖面结构示意图;
图11为本发明的实施例的一种薄膜晶体管形成第四石墨烯材料层后的剖面结构示意图;
图12为本发明的实施例的一种薄膜晶体管对第四石墨烯材料层图案化后的剖面结构示意图;
图13为本发明的实施例的一种薄膜晶体管形成源极、漏极、有源区后的剖面结构示意图;
其中,附图标记为:11、栅极;12、栅绝缘层;13、有源区;14、源极;15、漏极;21、第一氧化石墨烯材料层;25、第五氧化石墨烯材料层;26、第六氧化石墨烯材料层;31、第一石墨烯材料层;34、第四石墨烯材料层;41、掺杂的石墨烯材料层;9、基底。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案,下面结合附图和具体实施方式对本发明作进一步详细描述。
实施例1:
如图1至图7所示,本实施例提供一种薄膜晶体管,其包括源极14、漏极15、栅极11、有源区13、栅绝缘层12,且源极14、漏极15、栅极11由石墨烯构成;
有源区13由掺杂的氧化石墨烯或掺杂的石墨烯构成;
栅绝缘层12由氧化石墨烯构成;
其中,构成源极14、漏极15、栅极11的石墨烯由氧化石墨烯还原形成;构成有源区13的掺杂的氧化石墨烯或掺杂的石墨烯由对氧化石墨烯进行处理形成。
具体的,构成有源区13的掺杂的氧化石墨烯由对氧化石墨烯进行掺杂处理形成;或,构成有源区13的掺杂的石墨烯由对氧化石墨烯进行还原后再进行掺杂处理形成。
也就是说,如图1所示,本实施例的薄膜晶体管中,所有结构都是由石墨烯或氧化石墨烯材料构成的,且均是由氧化石墨烯为最初的原料而形成的。
其中,石墨烯(Graphene)于2004年由英国曼彻斯特大学安德烈-海姆教授发现,其是一种由碳原子构成的片层状材料,每层中碳原子以类似石墨(Graphite)六角形结构排列;石墨烯具有极好的导电性,常温下电子迁移率超过15000cm2/V·s,电阻率则在10-6Ω/m量级,故其作为源极14、漏极15、栅极11等时,可极大的降低这些结构的电阻。
氧化石墨烯(GO)则可由石墨氧化得到,可作为还原法制石墨烯的原料。氧化石墨烯具有很高的电阻率,故作为栅绝缘层12时,可起到很好的隔绝效果。
氧化石墨烯或石墨烯进行掺杂处理后会成为半导体材料,其具有较高的迁移率和开关电流比,从而适于作为有源区13的材料。
由此可见,本实施例的薄膜晶体管中的各结构的材料均十分符合其要求;同时,由于各结构的材料比较相似,因此各结构间的晶格常数匹配,结合面不产生晶格畸变,有源区13与源极14、漏极15间的接触电阻小,不需要欧姆接触层;因此,本发明的薄膜晶体管具有优异的综合性能。
另外,石墨烯/氧化石墨烯材料都是可弯折的,故其适用于柔性显示装置。
当然,应当理解,图1中薄膜晶体管的形式并非对本发明保护范围的限定,只要是采用以上材料,本实施例的薄膜晶体管也可具有不同的结构。例如,薄膜晶体管可为顶栅型;再如,源极14、漏极15也可位于有源区13下方;再如,有源区13与源极14、漏极15也可不是直接接触,而是之间还设有钝化层(可由氧化石墨烯构成),源极14、漏极15则通过钝化层中的过孔与有源区13连接。
优选的,薄膜晶体管中各结构的厚度范围在:
源极14、漏极15的厚度在1nm~100nm;
栅极11的厚度在1nm~100nm;
有源区13的厚度在1nm~100nm;
栅绝缘层12的厚度在30nm~300nm。
当采用石墨烯/氧化石墨烯材料时,薄膜晶体管的各结构的厚度优选处于以上范围内。这是因为石墨烯的导电性很好,而掺杂的氧化石墨烯或石墨烯的导通性能也好,由此栅极11、源极14、漏极15、有源区13等结构的厚度可很薄,甚至是接近单层石墨烯的厚度(1nm),而这样很薄的结构柔性好,易弯折,适于用在柔性显示装置中。而栅绝缘层12的厚度之所以胶厚,是为了保证绝缘效果。
本实施例还提供一种薄膜晶体管的制备方法,其包括:
形成由石墨烯构成的栅极11的步骤,形成由氧化石墨烯构成的栅绝缘层12的步骤,形成由掺杂的氧化石墨烯或掺杂的石墨烯构成的有源区13的步骤,形成由石墨烯构成的源极14、漏极15的步骤。
也就是说,本实施例提供一种制备上述薄膜晶体管的方法,其中用相应的材料形成薄膜晶体管的各结构。
应当理解,当薄膜晶体管的具体结构不同时,其形成各结构的顺序也不同,因此,以上的各步骤仅仅表示薄膜晶体管的制备方法中需要包括相应步骤,而并不代表制备方法中的各步骤必须按以上顺序进行。例如,制备底栅型薄膜晶体管时,必然是先形成栅极11再形成栅绝缘层12,最后形成有源区13;反之,制备顶栅型薄膜晶体管时,必然是先形成有源区13再形成栅绝缘层12,最后形成栅极11。
下面提供一种薄膜晶体管的制备方法。当然,其具体制备过程也仅仅是作为例子,而不是对本法明的限定,本领域技术人员也可根据需要改变各步骤的顺序,从而制备出具有其他结构的薄膜晶体管,
具体的,该薄膜晶体管的制备过程包括:
S1:形成由石墨烯构成的栅极11,其具体包括:
S101:形成第一氧化石墨烯材料层21。
也就是说,如图3所示,将氧化石墨烯材料分散在溶剂中形成悬浮液,之后将悬浮液涂布在基底9上,最后加热将溶剂蒸干,在基底9上形成的完整的第一氧化石墨烯材料层21。其中,具体的涂布量以形成的第一氧化石墨烯材料层21的厚度在以上栅极11的厚度范围内为准。其中,可选用挥发性较强的乙醇等作为溶剂,而聚甲基丙烯酸甲酯在其中的浓度以能够方便的涂布、成膜为准。
其中,此处之所以先形成氧化石墨烯材料层而非直接形成石墨烯材料层,是因为如前所述,氧化石墨烯比石墨烯更易于分散、成膜;同时,按照本实施例的方法,所有结构的原料均为氧化石墨烯,从而工艺统一,原料便于管理。
S102:对第一氧化石墨烯材料层21进行还原得到第一石墨烯材料层31,将第一石墨烯材料层31图案化形成栅极11,得到如图2所示的结构。
也就是说,如图4所示,在得到第一氧化石墨烯材料层21后,先对第一氧化石墨烯材料层21整体进行还原,使其转变为第一石墨烯材料层31;之后再将第一石墨烯材料层31不需要的部分除去(图案化),使剩余部分形成如图2所示的石墨烯的栅极11。
其中,以上还原可采用已知的方法,其可为以下方法中的任意一种:
a采用还原性的气体进行还原,例如氢气(处理温度在100~200℃)、溴化氢或碘化氢气体(处理温度在25~100℃),联氨(N2H4)蒸汽(处理温度25~100℃);
b真空热还原,即在真空环境下,于100~300℃的温度加热氧化石墨烯材料层1~10秒,使其还原;
c等离子体处理,即用氢、氩等的等离子体处理氧化石墨烯材料层,使其还原。
其中,以上的“图案化”具体可通过构图工艺完成,即:先在石墨烯材料层上涂布一层光刻胶,之后对光刻胶进行曝光显影,将部分光刻胶除去,使石墨烯材料层不需要保留的部分暴露,之后通过干法刻蚀(干刻)工艺将暴露的石墨烯材料层除去,最后剥离剩余的光刻胶,使剩余的石墨烯材料层成为所需结构。
其中,干法刻蚀所用的刻蚀气体可为氧气,气体压力在10~300mTorr,刻蚀功率100~4000W,刻蚀时间以既能将目标层完全除去而又不影响其下方的结构为准。
由于以上的还原、干刻等工艺本身是已知的,故在此不再详细描述。
或者,作为本实施例的另一种方式,本步骤也可为:将第一氧化石墨烯材料层21图案化,对图案化的第一氧化石墨烯材料层21进行还原,形成栅极11。
也就是说,在形成第一氧化石墨烯材料层21后,也可以如图5所示,直接对其进行图案化,使剩余的第一氧化石墨烯材料层21成为对应栅极11的图形,之后再将剩余的第一氧化石墨烯材料层21还原,从而形成如图2所示的石墨烯的栅极11。
具体的,以上过程中的还原、干刻等具体工艺可与之前叙述的先还原再图案化的方法相同,故在此不再详细描述。
可见,形成栅极11的方式有先图案化再还原和先还原再图案化两种,与此类似的,此后形成源极14、漏极15的方式也可以是先图案化再还原或先还原再图案化,而形成有源区13的方式可以是先图案化再掺杂或先掺杂再图案化。
在本步骤中,由于氧化石墨烯材料层下方没有其他的结构,故其先图案化或后图案化都是一样的。但在后续步骤中,如过先进行图案化,则会使被图案化的层(如用于形成有源区13的层)下方的结构(如栅绝缘层12)暴露,由此后续进行工艺(如掺杂)可能影响下方的结构,故还需要用临时的光刻胶对下方暴露的结构进行保护,因此对于后续工艺,优选应当先掺杂(或还原)再图案化。
S2:形成由氧化石墨烯构成的栅绝缘层12,其优选包括:形成第二氧化石墨烯材料层,以第二氧化石墨烯材料层作为栅绝缘层12,得到如图6所示的结构。
也就是说,由于栅绝缘层12一般是完整的,故可按上述方法形成第二氧化石墨烯材料层,并直接以其作为栅绝缘层12。
当然,如果栅绝缘层12中具有过孔等结构,则本步骤中也可包括对第二氧化石墨烯材料层进行图案化以形成过孔的过程。
S3:形成由掺杂的氧化石墨烯或掺杂的石墨烯构成的有源区13,其优选包括:
S301:形成第三氧化石墨烯材料层。
也就是说,按照前述方法,形成完整的第三氧化石墨烯材料层。
S302:对第三氧化石墨烯材料层进行掺杂,得到掺杂的氧化石墨烯材料层,对掺杂的氧化石墨烯材料层进行图案化形成有源区13,得到如图7所示的结构。
也就是说,对第三氧化石墨烯材料层掺杂处理,从而使其转变为P型或N型的半导体,即变为有源区13可用的材料,之后对其进行图案化,形成有源区13。
其中,可使氧化石墨烯转变为P型半导体的掺杂材料包括含氟聚合物、水、氮气、二氧化氮、氧气、硼、氯等;而可使氧化石墨烯转变为N型半导体的掺杂材料则氮、磷、氨气、氢气等。由于通过掺杂使材料成为半导体的工艺是已知的,故在此不再详细描述。
或者,本步骤也可为:将第三氧化石墨烯材料层图案化,对图案化的第三氧化石墨烯材料层进行掺杂,形成有源区13。
也就是说,如前所述,本步骤中也可先图案化再掺杂。
或者,本步骤也可为:对第三氧化石墨烯材料层进行还原后再掺杂,得到掺杂的石墨烯材料层,对掺杂的石墨烯材料层进行图案化形成有源区13。
也就是说,作为本实施例的另一种方式,当要制备由掺杂的石墨烯构成的有源区13时,则可以先将第三氧化石墨烯材料层还原为石墨烯,之后再对其进行掺杂和构图,从而得到有源区13。
这种方式的优点在于,氧化石墨烯中含有较大量的氧,故直接进行掺杂工艺上难度较大,因此优选先将其还原为石墨烯,之后再进行掺杂,最后再图案化。当然,此时具体的还原、掺杂、构图等工艺可与之前描述的相同,故在此不再详细描述。
或者,本步骤也可为:将第三氧化石墨烯材料层图案化,对图案化的第三氧化石墨烯材料层进行还原后再掺杂,形成有源区13。
也就是说,当包括还原步骤时,也可以是先图案化再进行还原和掺杂。
或者,作为本实施例的另一种方式,本S3步骤也可包括:
S301’:形成第三氧化石墨烯材料层。
S302’:在第三氧化石墨烯材料层上形成光刻胶层,光刻胶层中含有聚甲基丙烯酸甲酯,且通过加热至50℃~100℃使聚甲基丙烯酸甲酯渗透至第三氧化石墨烯材料层而将其转变为掺杂的氧化石墨烯材料层。
S303’:通过光刻工艺将掺杂的氧化石墨烯材料层图案化,形成有源区13。
也就是说,作为本实施例的另一种方式,也可以不使用单独的掺杂工艺,而是在构图工艺中,使用含有聚甲基丙烯酸甲酯(PMMA)的光刻胶,这样该光刻胶层与第三氧化石墨烯材料层的接触,由此在加热时可使其中的聚甲基丙烯酸甲酯渗入第三氧化石墨烯材料层中,自然使氧化石墨烯转变为半导体材料(P型),从而使掺杂和图案化一同完成,简化制备工艺。
当然,当要形成由掺杂的石墨烯构成的有源区13时,则以上S302’步骤也可为,对第三氧化石墨烯材料层进行还原,得到第二石墨烯材料层,之后在其上形成光刻胶层,光刻胶层中含有聚甲基丙烯酸甲酯,且通过加热至50℃~100℃使聚甲基丙烯酸甲酯渗透至第二石墨烯材料层而将其转变为掺杂的石墨烯材料层;而S303’步骤可为:通过光刻工艺将掺杂的石墨烯材料层图案化,形成有源区13。
也就是说,也可先将第三氧化石墨烯材料层还原为石墨烯,之后再用光刻胶对其进行掺杂,用以制备由掺杂的石墨烯构成的有源区13。
S4:形成由石墨烯构成的源极14、漏极15,其优选包括:
S401:形成第四氧化石墨烯材料层。
也就是说,按照前述方法,形成完整的氧化石墨烯材料层。
S402:对第四氧化石墨烯材料层进行还原得到第三石墨烯材料层,将第三石墨烯材料层图案化形成源极14、漏极15,得到如图1所示的薄膜晶体管。
也就是说,先将氧化石墨烯材料层还原为石墨烯材料层,之后对其进行图案化,以形成源极14、漏极15。
或者,本步骤也可为:将第四氧化石墨烯材料层图案化,对图案化的第四氧化石墨烯材料层进行还原,形成源极14、漏极15。
也就是说,如前所述,本步骤中也可先图案化再还原,但这种方式比较麻烦,故是非优选的。
实施例2:
如图8、图9所示,本实施例提供一种上述薄膜晶体管的制备方法,其与以上实施例1的制备方法类似,区别在于,其中栅绝缘层12和有源区13是一同形成的。
具体的,形成由氧化石墨烯构成的栅绝缘层12的步骤,以及形成由掺杂的氧化石墨烯或掺杂的石墨烯构成的有源区13的步骤包括:
步骤1:如图8所示,形成第五氧化石墨烯材料层25。
其中,第五氧化石墨烯材料层25的厚度应等于栅绝缘层12与有源区13厚度的和。
步骤2:对第五氧化石墨烯材料层25的表层部分进行包括掺杂、图案化的处理,得到由掺杂的氧化石墨烯构成的有源区13;或,对第五氧化石墨烯材料层25的表层部分进行包括还原、掺杂、图案化的处理,得到由掺杂的石墨烯构成的有源区13。
其中,“表层”是指第五氧化石墨烯材料层25靠近表面的上侧部分,其并不一定代表该层厚度一定很薄。具体的,此处“表层”的厚度应等于有源区13的厚度。
也就是说,本步骤中仅对第五氧化石墨烯材料层25的靠近上侧的一部分进行处理并用其形成有源区13,而第五氧化石墨烯材料层25的下侧部分则仍保持为氧化石墨烯材料。
具体的,作为本实施例的一种方式,可对第五氧化石墨烯材料层25上侧依次进行还原和掺杂,从而使其转变为掺杂的石墨烯材料层41,得到如图9所示的结构;之后,对掺杂的石墨烯材料层41进行图案化,用其形成有源区13,得到如图7所示的结构。在此过程中,可通过控制参数使以上各处理均只影响到第五氧化石墨烯材料层25上侧。
当然,此处用第五氧化石墨烯材料层25的上侧形成有源区13的具体方式是多样的,其可参加实施例1:例如,其可以是先图案化再进行还原和掺杂;再如,有源区13可以是掺杂的氧化石墨烯;再如,其掺杂可通过离子注入实现,也可在构图的同时用光刻胶的渗透实现等;因此,在此不再对以上形成有源区13的具体工艺进行限定。
步骤3:未被处理的第五氧化石墨烯材料层25构成栅绝缘层12。
当以上有源区13形成后,剩余的、未被处理的第五氧化石墨烯材料层25自然就相当于栅绝缘层12了,即其构成栅绝缘层12。
由于本实施例中制备薄膜晶体管其他结构的方法与实施例1类似,故在此不再详细描述。
实施例3:
如图10至图13所示,本实施例提供一种上述薄膜晶体管的制备方法,其与以上实施例1中的制备方法类似,区别在于,其中源极14、漏极15和有源区13是一同形成的。
具体的,形成由石墨烯构成的源极14、漏极15的步骤,以及形成由掺杂的氧化石墨烯或掺杂的石墨烯构成的有源区13的步骤包括:
步骤1:如图10所示,形成第六氧化石墨烯材料层26。
其中,第六氧化石墨烯材料层26的厚度应等于源极14、漏极15、有源区13的厚度。
步骤2:如图11所示,对第六氧化石墨烯材料层26进行还原得到第四石墨烯材料层34。
也就是说,将第六氧化石墨烯材料层26整体还原为第四石墨烯材料层34。
步骤3:对第四石墨烯材料层34进行包括图案化和掺杂的处理,得到源极14、漏极15、有源区13;其中,图案化为使第四石墨烯材料层34形成源极14、漏极15、有源区13的图形,掺杂为对与有源区13对应的部分进行掺杂。
也就是说,可先将第四石墨烯材料层34除源极14、漏极15、有源区13之外的部分除去,得到如图12所示的结构;之后通过掺杂将对应有源区13部分的石墨烯转换为掺杂的石墨烯,即使其成为有源区13,而剩余的第四石墨烯材料层34即成为源极14和漏极15,得到如图13所示的结构。
当然,应当理解,以上掺杂和图案化的过程也可相反,即可先对有源区13部分进行掺杂,再进行图案化。
当然,应当理解,虽然此处以源极14、漏极15、有源区13同层设置为准,但若是源极14、漏极15至少部分位于有源层13上方(即图7所示的结构),或者,源极14、漏极15至少部分位于有源层13下方都是可行的,其只要通过对一个完整层的部分厚度范围进行处理即可实现,在此不再详细描述。
由于本实施例中制备薄膜晶体管其他结构的方法与实施例1类似,故在此不再详细描述。
实施例4:
本实施例还提供一种阵列基板,其包括上述的薄膜晶体管。
当然,根据阵列基板类型的不同,其中薄膜晶体管的结构、数量、连接关系等也有所不同,在此不再详细结构。
同时,阵列基板中还可包括栅极线、数据线等引线,这些引线显然也可与栅极、源极、漏极等一样由石墨烯构成。
优选的,阵列基板中还包括:
像素电极,其与源极、漏极同层设置;
和/或
公共电极,其与栅极同层设置。
也就是说,若阵列基板为液晶显示装置用的阵列基板,则中还具有像素电极、公共电极等,而这些电极优选与源极、漏极、栅极等同层设置;即这些电极可与源极、漏极、栅极等由同一个材料层形成,且在相同的工艺中同步形成,由此它们必然具有相同的成分。
在阵列基板中,要求像素电极和公共电极导电且透明,由于常规的源极、漏极、栅极等由不透明的金属材料构成,故需要用氧化铟锡(ITO)等单独制备像素电极和公共电极。而如前所述,石墨烯材料具有很好的导电性,故其厚度可很薄,在此情况下石墨烯透明,由此可用石墨烯直接构成像素电极和公共电极等。这样,不仅像素电极和公共电极的导电性好,且其可与源极、漏极、栅极等同层设置(即同步形成),从而还可简化阵列基板的制备工艺。
本实施例提供一种显示装置,其包括上述的阵列基板。
具体的,该显示装置可为液晶显示面板、电子纸、OLED面板、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
可以理解的是,以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式,然而本发明并不局限于此。对于本领域内的普通技术人员而言,在不脱离本发明的精神和实质的情况下,可以做出各种变型和改进,这些变型和改进也视为本发明的保护范围。
Claims (13)
1.一种薄膜晶体管的制备方法,其特征在于,包括:
形成由石墨烯构成的栅极的步骤,形成由氧化石墨烯构成的栅绝缘层的步骤,形成由掺杂的氧化石墨烯或掺杂的石墨烯构成的有源区的步骤,形成由石墨烯构成的源极、漏极的步骤;
其中,构成所述源极、漏极、栅极的石墨烯由氧化石墨烯还原形成;构成所述有源区的掺杂的氧化石墨烯或掺杂的石墨烯由氧化石墨烯处理形成。
2.根据权利要求1所述的薄膜晶体管的制备方法,其特征在于,所述形成由石墨烯构成的栅极的步骤包括:
形成第一氧化石墨烯材料层;
对第一氧化石墨烯材料层进行还原得到第一石墨烯材料层,将所述第一石墨烯材料层图案化形成栅极;或,将第一氧化石墨烯材料层图案化,对图案化的第一氧化石墨烯材料层进行还原,形成栅极。
3.根据权利要求1所述的薄膜晶体管的制备方法,其特征在于,所述形成由氧化石墨烯构成的栅绝缘层的步骤包括:
形成第二氧化石墨烯材料层,以所述第二氧化石墨烯材料层作为栅绝缘层。
4.根据权利要求1所述的薄膜晶体管的制备方法,其特征在于,所述形成由掺杂的氧化石墨烯或掺杂的石墨烯构成的有源区的步骤包括:
形成第三氧化石墨烯材料层;
对第三氧化石墨烯材料层进行掺杂,得到掺杂的氧化石墨烯材料层,对掺杂的氧化石墨烯材料层进行图案化形成有源区;或,将第三氧化石墨烯材料层图案化,对图案化的第三氧化石墨烯材料层进行掺杂,形成有源区;或,对第三氧化石墨烯材料层进行还原后再掺杂,得到掺杂的石墨烯材料层,对掺杂的石墨烯材料层进行图案化形成有源区;或,将第三氧化石墨烯材料层图案化,对图案化的第三氧化石墨烯材料层进行还原后再掺杂,形成有源区。
5.根据权利要求1所述的薄膜晶体管的制备方法,其特征在于,所述形成由掺杂的氧化石墨烯或掺杂的石墨烯构成的有源区的步骤包括:
形成第三氧化石墨烯材料层;
在第三氧化石墨烯材料层上形成光刻胶层,所述光刻胶层中含有聚甲基丙烯酸甲酯,且通过加热至50℃~100℃使聚甲基丙烯酸甲酯渗透至第三氧化石墨烯材料层而将其转变为掺杂的氧化石墨烯材料层;或,对第三氧化石墨烯材料层进行还原,得到第二石墨烯材料层,之后在其上形成光刻胶层,所述光刻胶层中含有聚甲基丙烯酸甲酯,且通过加热至50℃~100℃使聚甲基丙烯酸甲酯渗透至第二石墨烯材料层而将其转变为掺杂的石墨烯材料层;
通过光刻工艺将掺杂的氧化石墨烯材料层或掺杂的石墨烯材料层图案化,形成有源区。
6.根据权利要求1所述的薄膜晶体管的制备方法,其特征在于,所述形成由石墨烯构成的源极、漏极的步骤包括:
形成第四氧化石墨烯材料层;
对第四氧化石墨烯材料层进行还原得到第三石墨烯材料层,将所述第三石墨烯材料层图案化形成源极、漏极;或,将第四氧化石墨烯材料层图案化,对图案化的第四氧化石墨烯材料层进行还原,形成源极、漏极。
7.根据权利要求1所述的薄膜晶体管的制备方法,其特征在于,所述形成由氧化石墨烯构成的栅绝缘层的步骤,以及形成由掺杂的氧化石墨烯或掺杂的石墨烯构成的有源区的步骤包括:
形成第五氧化石墨烯材料层;
对第五氧化石墨烯材料层的表层部分进行包括掺杂、图案化的处理,得到由掺杂的氧化石墨烯构成的有源区;或,对第五氧化石墨烯材料层的表层部分进行包括还原、掺杂、图案化的处理,得到由掺杂的石墨烯构成的有源区;
未被处理的第五氧化石墨烯材料层构成栅绝缘层。
8.根据权利要求1所述的薄膜晶体管的制备方法,其特征在于,所述形成由石墨烯构成的源极、漏极的步骤,以及形成由掺杂的氧化石墨烯或掺杂的石墨烯构成的有源区的步骤包括:
形成第六氧化石墨烯材料层;
对第六氧化石墨烯材料层进行还原得到第四石墨烯材料层;
对第四石墨烯材料层进行包括图案化和掺杂的处理,得到源极、漏极、有源区;其中,图案化为使第四石墨烯材料层形成源极、漏极、有源区的图形,掺杂为对与有源区对应的部分进行掺杂。
9.一种薄膜晶体管,包括源极、漏极、栅极、有源区、栅绝缘层,其特征在于,
所述源极、漏极、栅极由石墨烯构成;
所述有源区由掺杂的氧化石墨烯或掺杂的石墨烯构成;
所述栅绝缘层由氧化石墨烯构成;
其中,构成所述源极、漏极、栅极的石墨烯由氧化石墨烯还原形成;构成所述有源区的掺杂的氧化石墨烯或掺杂的石墨烯由氧化石墨烯处理形成。
10.根据权利要求9所述的薄膜晶体管,其特征在于,
构成所述有源区的掺杂的氧化石墨烯由对氧化石墨烯进行掺杂处理形成;
或
构成所述有源区的掺杂的石墨烯由对氧化石墨烯进行还原后再进行掺杂处理形成。
11.根据权利要求9所述的薄膜晶体管,其特征在于,
所述源极、漏极的厚度在1nm~100nm;
和/或
所述栅极的厚度在1nm~100nm;
和/或
所述有源区的厚度在1nm~100nm;
和/或
所述栅绝缘层的厚度在30nm~300nm。
12.一种阵列基板,其特征在于,包括:
权利要求9至11中任意一项所述的薄膜晶体管。
13.根据权利要求12所述的阵列基板,其特征在于,还包括:
像素电极,所述像素电极与所述源极、漏极同层设置;
和/或
公共电极,所述公共电极与所述栅极同层设置。
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