CN1052113C - 在半导体器件间设置隔离的方法 - Google Patents
在半导体器件间设置隔离的方法 Download PDFInfo
- Publication number
- CN1052113C CN1052113C CN95118829A CN95118829A CN1052113C CN 1052113 C CN1052113 C CN 1052113C CN 95118829 A CN95118829 A CN 95118829A CN 95118829 A CN95118829 A CN 95118829A CN 1052113 C CN1052113 C CN 1052113C
- Authority
- CN
- China
- Prior art keywords
- oxide
- layer
- silicon
- film
- silicon nitride
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H10W10/014—
-
- H10W10/17—
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/05—Etch and refill
Landscapes
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
Applications Claiming Priority (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019940039095A KR0140655B1 (ko) | 1994-12-30 | 1994-12-30 | 반도체 장치의 소자 분리방법 |
| KR39095/94 | 1994-12-30 | ||
| KR1019940039093A KR0167599B1 (ko) | 1994-12-30 | 1994-12-30 | 반도체 장치의 소자 분리방법 |
| KR39093/94 | 1994-12-30 | ||
| KR39095/1994 | 1994-12-30 | ||
| KR39093/1994 | 1994-12-30 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1132411A CN1132411A (zh) | 1996-10-02 |
| CN1052113C true CN1052113C (zh) | 2000-05-03 |
Family
ID=26630827
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN95118829A Expired - Fee Related CN1052113C (zh) | 1994-12-30 | 1995-12-30 | 在半导体器件间设置隔离的方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US5786229A (enExample) |
| JP (1) | JP2686735B2 (enExample) |
| CN (1) | CN1052113C (enExample) |
| DE (1) | DE19549155C2 (enExample) |
| TW (1) | TW290713B (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100261170B1 (ko) * | 1998-05-06 | 2000-07-01 | 김영환 | 반도체소자 및 그 제조방법 |
| US6071783A (en) * | 1998-08-13 | 2000-06-06 | Taiwan Semiconductor Manufacturing Company | Pseudo silicon on insulator MOSFET device |
| US6881645B2 (en) * | 2000-08-17 | 2005-04-19 | Samsung Electronics Co., Ltd. | Method of preventing semiconductor layers from bending and semiconductor device formed thereby |
| US6649460B2 (en) | 2001-10-25 | 2003-11-18 | International Business Machines Corporation | Fabricating a substantially self-aligned MOSFET |
| US7132355B2 (en) * | 2004-09-01 | 2006-11-07 | Micron Technology, Inc. | Method of forming a layer comprising epitaxial silicon and a field effect transistor |
| US8673706B2 (en) * | 2004-09-01 | 2014-03-18 | Micron Technology, Inc. | Methods of forming layers comprising epitaxial silicon |
| KR101097469B1 (ko) * | 2009-07-31 | 2011-12-23 | 주식회사 하이닉스반도체 | 반도체 장치 및 그 제조방법 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0313493A2 (en) * | 1987-10-23 | 1989-04-26 | International Business Machines Corporation | Method of producing defect free epitaxially grown silicon |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5108946A (en) * | 1989-05-19 | 1992-04-28 | Motorola, Inc. | Method of forming planar isolation regions |
| US4948456A (en) * | 1989-06-09 | 1990-08-14 | Delco Electronics Corporation | Confined lateral selective epitaxial growth |
| US5135884A (en) * | 1991-03-28 | 1992-08-04 | Sgs-Thomson Microelectronics, Inc. | Method of producing isoplanar isolated active regions |
| US5087586A (en) * | 1991-07-03 | 1992-02-11 | Micron Technology, Inc. | Process for creating fully-recessed field isolation regions by oxidizing a selectively-grown epitaxial silicon layer |
-
1995
- 1995-12-20 JP JP7349078A patent/JP2686735B2/ja not_active Expired - Fee Related
- 1995-12-23 TW TW084113796A patent/TW290713B/zh active
- 1995-12-28 US US08/579,880 patent/US5786229A/en not_active Expired - Lifetime
- 1995-12-29 DE DE19549155A patent/DE19549155C2/de not_active Expired - Fee Related
- 1995-12-30 CN CN95118829A patent/CN1052113C/zh not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0313493A2 (en) * | 1987-10-23 | 1989-04-26 | International Business Machines Corporation | Method of producing defect free epitaxially grown silicon |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2686735B2 (ja) | 1997-12-08 |
| JPH08236611A (ja) | 1996-09-13 |
| TW290713B (enExample) | 1996-11-11 |
| DE19549155C2 (de) | 2001-09-13 |
| US5786229A (en) | 1998-07-28 |
| CN1132411A (zh) | 1996-10-02 |
| DE19549155A1 (de) | 1996-07-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5395790A (en) | Stress-free isolation layer | |
| US4098618A (en) | Method of manufacturing semiconductor devices in which oxide regions are formed by an oxidation mask disposed directly on a substrate damaged by ion implantation | |
| CN1013160B (zh) | 集成电路隔离工艺 | |
| US5294562A (en) | Trench isolation with global planarization using flood exposure | |
| US5457067A (en) | Process for formation of an isolating layer for a semiconductor device | |
| US6479354B2 (en) | Semiconductor device with selective epitaxial growth layer and isolation method in a semiconductor device | |
| CN1052113C (zh) | 在半导体器件间设置隔离的方法 | |
| US5894059A (en) | Dislocation free local oxidation of silicon with suppression of narrow space field oxide thinning effect | |
| CN1073745C (zh) | 隔离半导体器件的元件的方法 | |
| JP2896072B2 (ja) | 半導体素子のフィールド酸化膜の形成方法 | |
| JPS59165434A (ja) | 半導体装置の製造方法 | |
| JPS6257232A (ja) | アイソレ−シヨンデバイス及びその製法 | |
| JPS5812732B2 (ja) | 半導体装置の製法 | |
| KR960000373B1 (ko) | 반도체 표면의 단차 형성방법 | |
| JPS6136381B2 (enExample) | ||
| KR100253268B1 (ko) | 반도체 소자 절연방법 | |
| JP2558289B2 (ja) | 変質層の形成方法 | |
| KR100479172B1 (ko) | 선택적다결정실리콘산화법을이용한필드산화막형성방법 | |
| KR100250226B1 (ko) | 반도체 소자의 격리막 형성방법 | |
| KR0139890B1 (ko) | 반도체 소자의 필드 산화막 제조방법 | |
| KR100400329B1 (ko) | 반도체소자의소자분리산화막형성방법 | |
| JPS6135533A (ja) | 半導体装置の製造方法 | |
| JPH1187336A (ja) | 半導体装置の製造方法 | |
| JPH0399421A (ja) | Soi構造の形成方法 | |
| JPS607146A (ja) | 半導体装置の製造方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C56 | Change in the name or address of the patentee |
Owner name: HYNIX SEMICONDUCTOR INC. Free format text: FORMER NAME OR ADDRESS: HYUNDAI ELECTRONICS INDUSTRIES CO., LTD. |
|
| CP01 | Change in the name or title of a patent holder |
Address after: Gyeonggi Do, South Korea Patentee after: Hairyoksa Semiconductor Co., Ltd. Address before: Gyeonggi Do, South Korea Patentee before: Hyundai Electronics Industries Co., Ltd. |
|
| ASS | Succession or assignment of patent right |
Owner name: MAGNACHIP CO., LTD. Free format text: FORMER OWNER: HYNIX SEMICONDUCTOR INC. Effective date: 20070525 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20070525 Address after: North Chungcheong Province Patentee after: Magnachip Semiconductor Ltd. Address before: Gyeonggi Do, South Korea Patentee before: Hairyoksa Semiconductor Co., Ltd. |
|
| C19 | Lapse of patent right due to non-payment of the annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |