CN104756250B - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN104756250B
CN104756250B CN201280076651.8A CN201280076651A CN104756250B CN 104756250 B CN104756250 B CN 104756250B CN 201280076651 A CN201280076651 A CN 201280076651A CN 104756250 B CN104756250 B CN 104756250B
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Prior art keywords
lead frame
semiconductor device
grafting material
semiconductor element
transistor
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CN104756250A (zh
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浅井林太郎
谷田笃志
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Denso Corp
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Toyota Motor Corp
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  • Die Bonding (AREA)

Abstract

本说明书涉及以树脂模塑半导体元件且该半导体元件与在模塑表面露出的引线框架接合的半导体装置。本说明书提供一种即使疲劳劣化发展而在接合材料产生裂缝,也能够减少裂缝对半导体元件造成的影响的技术。半导体装置(2)具备晶体管(3)、引线框架(8a、8b)、在一个面通过第一接合材料(5)与晶体管(3)接合并且在另一个面通过第二接合材料(6)与引线框架(8b)接合的金属隔离物(4)、以及树脂模塑体(13)。树脂模塑体(13)对晶体管(3)和金属隔离物(4)进行密封。引线框架(8a、8b)的一面与树脂模塑体(13)密接。第二接合材料(6)被选定为其强度比第一接合材料(5)的强度低的材料。

Description

半导体装置
技术领域
本发明涉及半导体装置。尤其涉及半导体元件以树脂模塑且该半导体元件与在模塑表面露出的引线框架接合的半导体装置。这样的半导体装置有时被称为半导体卡或者半导体封装体。
背景技术
已知在对电动车的行驶用马达进行驱动的逆变器、电压转换器中,使用以树脂模塑了处理大电流的半导体元件而成的半导体装置(半导体封装)(例如,参照日本特开2006-179655号公报)。典型的这样的半导体元件是开关电路所使用的晶体管。以下,有时将模塑了半导体元件的树脂的块称为“树脂模塑体”。树脂模塑体通过注塑成形而形成。在树脂模塑体的两侧安装有被称为引线框架的金属板。树脂模塑体的内部的半导体元件与各自的引线框架接合。引线框架有时作为电极使用,有时作为简单的散热板使用。另外,典型的情况下,引线框架与半导体元件的接合使用焊接材料。但是,接合也可以使用焊接材料以外的材料,例如Ni纳米粒子等。以下,将把引线框架与半导体元件接合的材料称为接合材料。
以树脂模塑半导体元件是为了保护半导体元件不受外部的灰尘、水分影响、以及为了抑制将半导体元件和引线框架接合的接合材料的疲劳劣化。由于半导体元件与引线框架的热膨胀率不同,所以由半导体元件产生的热循环反复对接合材料施加应力。通过以树脂来模塑引线框架的一部分和半导体元件,可抑制半导体元件与引线框架的变形。结果,能够抑制施加给接合材料的应力,可抑制接合材料的疲劳劣化。
即使以树脂进行模塑,疲劳劣化也一点点地发展。若疲劳劣化发展到一定程度,则存在将半导体元件接合的接合材料产生裂缝的情况。与半导体元件接触的接合材料所产生的裂缝有可能对半导体元件造成不良。鉴于此,本说明书提供一种即使疲劳劣化发展到接合材料产生裂缝的可能性提高的程度,也会降低裂缝产生对半导体元件造成的影响的技术。
发明内容
当在电流路径中与和半导体元件直接接触的位置不同的位置接合材料破损时,虽然电阻上升,但半导体元件因破损而受到的影响较小。鉴于此,在本说明书公开的技术中,在半导体元件与引线框架之间配置金属隔离物。而且,以第一接合材料将半导体元件和金属隔离物接合,并以第二接合材料将金属隔离物和引线框架接合。这里,第二接合材料使用强度比第一接合材料的强度低的材料。其中,金属隔离物可以是导电性的金属块或者金属板。
根据上述的构成,若在半导体元件与引线框架之间反复施加应力,则与半导体元件和金属隔离物间的接合部相比,引线框架和金属隔离物间的接合部先产生裂缝。但是,引线框架和金属隔离物间的接合部所产生的裂缝不会对半导体元件造成损伤。或者,即使造成损伤也很微小。因此,即使引线框架和金属隔离物之间的接合部受到损伤而电阻上升,半导体元件受到的影响也较小。并且,因引线框架和半导体元件的热膨胀率的不同引起的形变被破损的接合部吸收。从而,在半导体元件与金属隔离物之间的接合部中应力被缓和,该接合部难以发生破损。
换言之,本说明书公开的技术在半导体元件与引线框架之间,在不与半导体元件接触的部位设置相对脆弱的接合部,最先在此处产生裂缝。由此来保护与半导体元件接触的接合部,进而降低因疲劳劣化产生的裂缝对半导体元件造成的影响。
在本说明书公开的技术中,作为第二接合材料,使用与第一接合材料相比强度低的材料。这里,“强度”是指相对于应力集中的强度,物理上能够通过两个不同的指标的任意一个来定义。一个定义是基于预先决定的基准的预测寿命的定义。预测寿命能够通过耐久试验、模拟来决定。例如,实施在规定的温度条件和负载条件下反复赋予负载的试验,到产生裂缝为止的反复次数越多,确定为是强度越高的接合材料。其中,由于不存在全部的半导体装置共用的耐久试验,所以试验条件根据半导体装置被使用的环境来决定。
与“强度”有关的另一个定义是基于屈服强度(屈服应力)的大小的定义。屈服强度越大,能够确定为是强度越高的接合材料。此外,在是无法确定屈服强度的金属的情况下,可以由0.2%屈服强度(proof stress)代替屈服强度。对于不具有明确的屈服强度的金属,以变形量达到0.2%时的应力来决定“0.2%屈服强度”。对于不具有明确的屈服强度的金属采用0.2%屈服强度的值作为屈服强度的代替是在材料力学的技术领域通常广泛使用的手法。在本说明书中,“0.2%屈服强度”也作为“屈服强度”之一来处理。
作为“强度”,是采用预测寿命(例如耐久试验的结果),还是采用屈服强度取决于半导体装置被使用的环境。在持续施加变动较少的平均的反复应力的环境下,优选以预测寿命来决定强度。另一方面,在应力的变动比较大、不经过长时间接合材料便因一次(或者数次)较大的应力而破损的可能性较高的情况下,优选以屈服应力来决定强度。或者,也适合设定融合了预测寿命和屈服强度的特别的评价函数来决定强度。虽然反复进行了叙述,但“强度”并没有唯一的基准,本说明书公开的技术中的“强度”并不限定于特定的基准。本说明书公开的技术思想在于将第二接合材料选定为对于因半导体元件的热量而产生的反复应力比第一接合材料先破损的可能性较高的物质。
第一、第二接合材料可以是种类不同的焊接材料,也可以是焊接材料以外的接合材料。在半导体装置的技术领域中,包含焊接材料的接合材料被统称为“粘晶(die bond)”。粘晶除了焊接材料之外,还包含镍纳米粒子、银纳米粒子。并且,接合材料也可以是扩散接合中的嵌入材料。即,在扩散接合的情况下,嵌入材料扩散后的接合部分本身能够包含于本说明书中的“接合材料”。
本说明书公开的详细技术和进一步的改进在以下的“具体实施方式”中进行说明。
附图说明
图1是第一实施例的半导体装置的示意立体图。
图2是图1的II-II线向视的剖视图。
图3是表示第一接合材料、第二接合材料、元件的表面电极的屈服强度(0.2%屈服强度)的例子的曲线图。
图4是第二实施例的半导体装置的剖视图。
图5是第三实施例的半导体装置的剖视图。
具体实施方式
图1示出了第一实施例的半导体装置2的示意立体图。图2示出了图1的II-II线向视的剖视图。半导体装置2例如被用于向电动汽车的行驶用马达供给电流的逆变器的开关电路。半导体装置2具有以树脂模塑了晶体管3的构成。晶体管3例如是IGBT、使用了SiC基板的MOS晶体管。晶体管3相当于半导体元件的一个例子。
模塑晶体管3的树脂例如可使用环氧类的高强度的材料。将模塑晶体管3的树脂整体称为树脂模塑体13。树脂模塑体13被成形为长方体,在其最宽的两个面固定有引线框架8a、8b(电极板)。如图2所示,对引线框架8a、8b而言,沿厚度方向其一半被埋设于树脂模塑体13。引线框架8a、8b是导电体(金属),与晶体管3的发射极和集电极(或者,漏极和源极)连接。晶体管3的发射极和集电极在晶体管3的表面露出。有时将在晶体管3的表面露出的导电部称为表面电极。引线框架8a、8b相当于用于与外部的器件连接的晶体管3的电极端子。另外,晶体管3的控制电极19从树脂模塑体13延伸突出。由于通向发射极和集电极的引线框架8a、8b中流通大电流,所以这些电极使用面积较大的金属板(引线框架),由于通向栅极的控制电极19不流通大电流,所以使用较细的金属棒。
如图2所示,晶体管3的相当于发射极(或者集电极)的一面(表面电极)经由第一焊接材料5与引线框架8b接合。晶体管3的相当于集电极(或者发射极)的另一个面(表面电极)经由第一焊接材料5与金属隔离物4的一个面接合。金属隔离物4的另一个面经由第二焊接材料6与另一个引线框架8a接合。换言之,金属隔离物4位于引线框架8a与晶体管3之间,在其一个面上通过第一焊接材料5与晶体管3接合,在与一个面相反侧的另一个面上通过第二焊接材料6与引线框架8a接合。在后面将进行详细说明,第二焊接材料6的强度比第一焊接材料5的强度低。在晶体管3与引线框架8a之间,为了在不与晶体管3接触的部位使用焊接材料而插入金属隔离物4。而且,在不与晶体管3接触的位置使用强度较低的第二焊接材料6。
其中,由于树脂模塑体13的厚度相对于晶体管3的厚度比较大,所以金属隔离物4也起到填补其间的距离的作用。金属隔离物4是导电性的金属块,或者金属板。另外,各个位置的焊接材料也能够称为将焊接材料的两侧的材料接合的接合部。
如上述那样,第二焊接材料6使用强度比第一焊接材料5低的材料。“强度”的基准在这里采用0.2%屈服强度。作为0.2%屈服强度比较低的材料,已知有Sn-Cu焊接材料。Sn-Cu焊接材料是以锡(Sn)为主成分,并含有微量~0.7(重量%)左右的铜(Cu)的合金。作为第一焊接材料5的候补,例如有Sn-Sb焊接材料、Zn-Al焊接材料。Sn-Sb焊接材料是以锡(Sn)为主成分,并含有5~13(重量%)左右的锑(Sb)的合金。Zn-Al焊接材料是以锌(Zn)为主成分,并含有4~6(重量%)左右的铝(Al)的合金。Sn-Sb焊接材料、Zn-Al焊接材料的0.2%屈服强度均比Sn-Cu焊接材料的0.2%屈服强度高。
图3示出了示意性表示了晶体管3的表面电极与焊接材料的0.2%屈服强度的不同的曲线图。晶体管3的表面电极是在晶体管3的芯片的表面露出的电极。典型的情况下,表面电极由AlSi合金(铝-硅合金)制成。图3的坐标系的纵轴为0.2%屈服强度,横轴为温度。曲线图G1表示第一焊接材料(Sn-Sb焊接材料、或Zn-Al焊接材料)的0.2%屈服强度,曲线图G2表示表面电极的0.2%屈服强度,曲线图G3表示第二焊接材料(Sn-Cu焊接材料)的0.2%屈服强度。0.2%屈服强度均随着温度的上升而降低,但一直满足第一焊接材料>表面电极>第二焊接材料的关系。(此外,在本说明书公开的技术中,也可以是表面电极>第一焊接材料>第二焊接材料。)
即,无论在什么温度下,第二焊接材料的强度都最低。这表示了在热循环重复时,第二焊接材料劣化最严重而最早产生裂缝的可能性较高。其中,热循环在长时间使用半导体装置的期间,因晶体管3的发热而产生。
若长时间使用半导体装置2,则在强度较低的第二焊接材料6、即金属隔离物4与引线框架8a的接合部最先产生裂缝。若产生裂缝,则金属隔离物4与引线框架8a之间的电阻增加。因此,半导体装置2的性能降低。但是,晶体管3不受裂缝影响,晶体管3不会被破坏。
对导入了第二焊接材料6的其它优点进行说明。在半导体装置2中,在两个引线框架8a、8b之间,通过两种焊接材料5、6层叠并接合晶体管3和金属隔离物4。若晶体管3发热,则根据晶体管、引线框架等的热膨胀率的不同而在各部件产生应力。若在金属隔离物4与引线框架8a之间的接合部、即第二焊接材料6产生裂缝,则接合力降低,金属隔离物4与引线框架8a容易相对偏移。这样一来,金属隔离物4与引线框架8a之间的偏移使其他部分(晶体管3、第一焊接材料5)产生的应力缓和。因此,可抑制将晶体管3接合的第一焊接材料5的劣化。即,通过在第二焊接材料6产生裂缝,可抑制第一焊接材料5的劣化的发展。
参照图4对第二实施例的半导体装置2a进行说明。该半导体装置2a在晶体管3的两侧分别配置了金属隔离物4a、4b。在晶体管3的各侧,晶体管3经由第一焊接材料5与金属隔离物4a(4b)接合,在金属隔离物4a(4b)的相反侧经由第二焊接材料6与引线框架8a(8b)接合。换言之,在半导体装置2a中,在树脂模塑体13的两侧分别固定了引线框架8a、8b,各个引线框架8a、8b与金属隔离物4a、4b分别通过第二接合材料6接合,在两个金属隔离物4a、4b之间配置了晶体管3,两个金属隔离物4a、4b的每一个经由第一焊接材料5与晶体管3接合。在该构成中,引线框架8a与金属隔离物4a之间的接合部(第二焊接材料6)、以及引线框架8b与金属隔离物4b之间的接合部(第二焊接材料6)的强度比晶体管3的两侧的接合部(第一焊接材料5)低。因此,与晶体管3的两侧的接合部相比,能够在引线框架8a与金属隔离物4a之间的接合部、或者引线框架8b与金属隔离物4b之间的接合部先产生裂缝。若与第一实施例的半导体装置2比较,则由于设置了两处强度较低的接合部,所以在晶体管3的两侧更难以产生裂缝。
参照图5对第三实施例的半导体装置2b进行说明。该半导体装置2b在引线框架8b上经由第二焊接材料6接合金属隔离物4,并在其上经由第一焊接材料5接合晶体管3。换言之,在晶体管3与引线框架8b之间配置并接合有金属隔离物4。另外,晶体管3与另一个引线框架8a通过接合引线15电连接。在引线框架8b上,以树脂模塑有晶体管3和金属隔离物4。引线框架8a为细板状的金属棒,其一端埋设于树脂,另一端从树脂露出。一个引线框架8a与晶体管3通过接合引线连接这一点与上述的半导体装置2、2a不同。在第三实施例的半导体装置2b中,也在引线框架8b与晶体管3之间配置金属隔离物4,金属隔离物4与晶体管3通过第一焊接材料5接合,金属隔离物4与引线框架8b通过第二焊接材料6接合。因此,与晶体管3和金属隔离物4的接合部相比,金属隔离物4和引线框架8b之间的接合部容易先产生裂缝,可抑制在与晶体管3接触的位置产生裂缝。第三实施例的半导体装置2b也具有与上述的半导体装置2、2a相同的优点。
对实施例中说明了的技术相关的注意点进行叙述。第一焊接材料5是第一接合材料的一个例子,第二焊接材料6是第二接合材料的一个例子。在实施例中,作为接合材料(焊接材料)的强度的基准,使用了0.2%屈服强度。强度的基准并不限定于0.2%屈服强度。在能够测定接合材料的屈服应力的情况下,也可以应用屈服应力作为强度的基准。或者,也可以应用预先决定的预测寿命作为强度的基准。预测寿命能够通过寿命试验、评价寿命的模拟来得到。其中,材料的“强度”存在各种定义。在本说明书公开的技术中,可以使用任意的强度的定义。
在实施例中,作为第一焊接材料5的候补,示出了Sn-Sb焊接材料、Zn-Al焊接材料,作为第二焊接材料6的候补,示出了Sn-Cu焊接材料。第一接合材料、第二接合材料并不限定于这些焊接材料。只要第二接合材料的强度比第一接合材料低即可。作为第一接合材料的其他候补,能够列举Ni纳米粒子、Ag纳米粒子。这些纳米粒子作为将两种金属接合的接合材料而被公知。另外,作为接合材料的Ni纳米粒子、Ag纳米粒子与Sn-Cu焊接材料相比0.2%屈服强度较高。并且,晶体管与金属隔离物的结合也适合采用使用Cu(铜)作为母材并使用Sn(锡)作为嵌入材料来形成CuSn的液相扩散结合(TLP:Transient Liquid PhaseDiffusion Bonding)、或使用Ni(镍)作为母材并使用Sn(锡)作为嵌入材料来形成NiSn的液相扩散结合。它们的强度也比Sn-Cu焊接材料的强度高。其中,在液相扩散结合的情况下,嵌入材料扩散后的区域相当于“接合材料”。
本说明书公开的技术并不限定于模塑晶体管的半导体装置。除了晶体管以外,例如也合适应用于模塑二极管的半导体装置。
以上,对本发明的具体例进行了详细说明,但这些具体例仅是例示,并不对权利要求书进行限定。权利要求书所记载的技术包含对以上例示的具体例进行各种变形、变更后的技术。本说明书或者附图所说明的技术要素单独或者通过各种组合来发挥技术的有用性,并不限定于申请时权利要求记载的组合。另外,本说明书或者附图所例示的技术能够同时实现多个目的,实现其中的一个目的本身具有技术的有用性。

Claims (14)

1.一种半导体装置,其特征在于,具备:
半导体元件;
引线框架;
金属隔离物,其被配置在半导体元件与引线框架之间;以及
树脂模塑体,其对半导体元件和金属隔离物进行密封并且与引线框架的一面密接,
金属隔离物与半导体元件通过第一接合材料接合,并且金属隔离物与引线框架通过第二接合材料接合,
第二接合材料的强度比第一接合材料的强度低。
2.根据权利要求1所述的半导体装置,其特征在于,
所述强度以基于预先决定的基准的预测寿命来决定。
3.根据权利要求1所述的半导体装置,其特征在于,
所述强度以屈服应力或者0.2%屈服强度来决定。
4.根据权利要求1所述的半导体装置,其特征在于,
在树脂模塑体的两侧分别固定有引线框架,至少一方的引线框架与所述金属隔离物通过第二接合材料接合。
5.根据权利要求2所述的半导体装置,其特征在于,
在树脂模塑体的两侧分别固定有引线框架,至少一方的引线框架与所述金属隔离物通过第二接合材料接合。
6.根据权利要求3所述的半导体装置,其特征在于,
在树脂模塑体的两侧分别固定有引线框架,至少一方的引线框架与所述金属隔离物通过第二接合材料接合。
7.根据权利要求4所述的半导体装置,其特征在于,
另一方的引线框架与其他的金属隔离物通过第二接合材料接合,所述其他的金属隔离物与半导体元件通过第一接合材料接合。
8.根据权利要求5所述的半导体装置,其特征在于,
另一方的引线框架与其他的金属隔离物通过第二接合材料接合,所述其他的金属隔离物与半导体元件通过第一接合材料接合。
9.根据权利要求6所述的半导体装置,其特征在于,
另一方的引线框架与其他的金属隔离物通过第二接合材料接合,所述其他的金属隔离物与半导体元件通过第一接合材料接合。
10.根据权利要求1~9中任意一项所述的半导体装置,其特征在于,
第二接合材料为Sn-Cu焊接材料。
11.根据权利要求1~9中任意一项所述的半导体装置,其特征在于,
第一接合材料为Sn-Sb焊接材料、Zn-Al焊接材料、镍纳米粒子、银纳米粒子中的任意一种。
12.根据权利要求10所述的半导体装置,其特征在于,
第一接合材料为Sn-Sb焊接材料、Zn-Al焊接材料、镍纳米粒子、银纳米粒子中的任意一种。
13.根据权利要求1~9中任意一项所述的半导体装置,其特征在于,
半导体元件与金属隔离物通过使用嵌入材料作为第一接合材料的扩散接合来接合。
14.根据权利要求10所述的半导体装置,其特征在于,
半导体元件与金属隔离物通过使用嵌入材料作为第一接合材料的扩散接合来接合。
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Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
MY181753A (en) * 2013-05-03 2021-01-06 Honeywell Int Inc Lead frame construct for lead-free solder connections
JP6354954B2 (ja) * 2015-05-15 2018-07-11 トヨタ自動車株式会社 半導体装置の製造方法及び半導体装置
WO2017086324A1 (ja) * 2015-11-16 2017-05-26 株式会社豊田中央研究所 接合構造体およびその製造方法
JP6480856B2 (ja) * 2015-12-14 2019-03-13 株式会社東芝 半導体モジュール
JP6477517B2 (ja) * 2016-01-20 2019-03-06 トヨタ自動車株式会社 半導体装置の製造方法
JP6750263B2 (ja) * 2016-03-18 2020-09-02 富士電機株式会社 電力用半導体モジュール
CN109643661B (zh) * 2016-08-05 2022-09-09 三菱电机株式会社 功率半导体装置
JP6907546B2 (ja) * 2017-01-17 2021-07-21 三菱マテリアル株式会社 パワーモジュール
JP6878930B2 (ja) * 2017-02-08 2021-06-02 株式会社デンソー 半導体装置
US10886251B2 (en) * 2017-04-21 2021-01-05 Toyota Motor Engineering & Manufacturing North America, Inc. Multi-layered composite bonding materials and power electronics assemblies incorporating the same
FR3092698B1 (fr) * 2019-02-11 2021-05-07 St Microelectronics Tours Sas Assemblage comportant un composant vertical de puissance monté sur une plaque métallique de connexion
US11908822B2 (en) * 2019-04-09 2024-02-20 Mitsubishi Electric Corporation Power semiconductor module and power conversion apparatus
EP3817044A1 (en) * 2019-11-04 2021-05-05 Infineon Technologies Austria AG Semiconductor package with a silicon carbide power semiconductor chip diffusion soldered to a copper leadframe part and a corresponding manufacturing method
CN114982391A (zh) * 2019-12-16 2022-08-30 阿莫善斯有限公司 用于功率模块的陶瓷衬底及包括其的功率模块
JP7579224B2 (ja) * 2021-09-13 2024-11-07 株式会社東芝 半導体装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1561542A (zh) * 2001-11-12 2005-01-05 株式会社新王磁材 电子部件用封装体、其盖体、其盖体用盖材以及其盖材的制法
CN102714198A (zh) * 2010-01-13 2012-10-03 丰田自动车株式会社 电力模块制造方法以及由之制造的电力模块

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003110064A (ja) * 2001-07-26 2003-04-11 Denso Corp 半導体装置
US6803667B2 (en) * 2001-08-09 2004-10-12 Denso Corporation Semiconductor device having a protective film
JP3627738B2 (ja) * 2001-12-27 2005-03-09 株式会社デンソー 半導体装置
JP3879647B2 (ja) * 2002-10-02 2007-02-14 トヨタ自動車株式会社 線膨張係数が相違する部材の接合体
US7193326B2 (en) * 2003-06-23 2007-03-20 Denso Corporation Mold type semiconductor device
JP2005019699A (ja) 2003-06-26 2005-01-20 Fuji Photo Film Co Ltd 固体撮像素子
JP3750680B2 (ja) * 2003-10-10 2006-03-01 株式会社デンソー パッケージ型半導体装置
JP4254527B2 (ja) * 2003-12-24 2009-04-15 株式会社デンソー 半導体装置
JP4363324B2 (ja) 2004-12-22 2009-11-11 トヨタ自動車株式会社 半導体モジュール
DE102005047566C5 (de) 2005-10-05 2011-06-09 Semikron Elektronik Gmbh & Co. Kg Anordnung mit einem Leistungshalbleiterbauelement und mit einem Gehäuse sowie Herstellungsverfahren hierzu
DE102005054872B4 (de) 2005-11-15 2012-04-19 Infineon Technologies Ag Vertikales Leistungshalbleiterbauelement, Halbleiterbauteil und Verfahren zu deren Herstellung
JP5141076B2 (ja) 2006-06-05 2013-02-13 株式会社デンソー 半導体装置
JP5050440B2 (ja) 2006-08-01 2012-10-17 日産自動車株式会社 半導体装置及びその製造方法
JP2009231716A (ja) * 2008-03-25 2009-10-08 Mitsubishi Electric Corp 接合材および半導体モジュールの製造方法
JP5131148B2 (ja) * 2008-10-24 2013-01-30 株式会社デンソー 半導体装置
JP5018909B2 (ja) * 2009-06-30 2012-09-05 株式会社デンソー 半導体装置
JP5449958B2 (ja) * 2009-09-30 2014-03-19 株式会社日立製作所 半導体装置と接続構造及びその製造方法
JP5545000B2 (ja) * 2010-04-14 2014-07-09 富士電機株式会社 半導体装置の製造方法
JP5947537B2 (ja) * 2011-04-19 2016-07-06 トヨタ自動車株式会社 半導体装置及びその製造方法
JP5699882B2 (ja) 2011-09-22 2015-04-15 三菱マテリアル株式会社 パワーモジュール用基板、パワーモジュール用基板の製造方法、ヒートシンク付パワーモジュール用基板及びパワーモジュール
JP6033011B2 (ja) 2012-09-12 2016-11-30 三菱電機株式会社 電力用半導体装置および電力用半導体装置の製造方法
JP5713032B2 (ja) * 2013-01-21 2015-05-07 トヨタ自動車株式会社 半導体装置の製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1561542A (zh) * 2001-11-12 2005-01-05 株式会社新王磁材 电子部件用封装体、其盖体、其盖体用盖材以及其盖材的制法
CN102714198A (zh) * 2010-01-13 2012-10-03 丰田自动车株式会社 电力模块制造方法以及由之制造的电力模块

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